Searched refs:regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | imu_v11_0.c | 202 … IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
262 … IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
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| H A D | imu_v11_0_3.c | 55 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0x000fffff, 0xe0000000),
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| H A D | imu_v12_0.c | 203 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xfffff, 0x1c0000),
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_11_5_0_offset.h | 1827 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
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| H A D | gc_12_0_0_offset.h | 2738 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
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| H A D | gc_11_0_3_offset.h | 2842 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
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| H A D | gc_11_0_0_offset.h | 2702 #define regGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
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