Searched refs:regCP_RB_WPTR_POLL_CNTL (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | imu_v12_0.c | 188 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCP_RB_WPTR_POLL_CNTL, 0x600100, 0x1c0000),
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| H A D | gfx_v12_0.c | 4105 def = data = RREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL); in gfx_v12_0_update_coarse_grain_clock_gating()
4112 WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_CNTL, data); in gfx_v12_0_update_coarse_grain_clock_gating()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 216 #define regCP_RB_WPTR_POLL_CNTL … macro
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| H A D | gc_9_4_2_offset.h | 259 #define regCP_RB_WPTR_POLL_CNTL … macro
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| H A D | gc_12_0_0_offset.h | 2154 #define regCP_RB_WPTR_POLL_CNTL … macro
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| H A D | gc_11_0_3_offset.h | 2062 #define regCP_RB_WPTR_POLL_CNTL … macro
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| H A D | gc_11_0_0_offset.h | 2000 #define regCP_RB_WPTR_POLL_CNTL … macro
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