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Searched refs:reg0 (Results 1 – 25 of 49) sorted by relevance

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/linux/drivers/media/dvb-frontends/
H A Da8293.c29 u8 reg0, reg1; in a8293_set_voltage_slew() local
105 reg0 = idx_to_reg[this_volt_idx+1]; in a8293_set_voltage_slew()
106 reg0 |= A8293_FLAG_ODT; in a8293_set_voltage_slew()
108 ret = i2c_master_send(client, &reg0, 1); in a8293_set_voltage_slew()
111 dev->reg[0] = reg0; in a8293_set_voltage_slew()
116 reg0 = idx_to_reg[new_volt_idx]; in a8293_set_voltage_slew()
117 reg0 |= A8293_FLAG_ODT; in a8293_set_voltage_slew()
118 ret = i2c_master_send(client, &reg0, 1); in a8293_set_voltage_slew()
121 dev->reg[0] = reg0; in a8293_set_voltage_slew()
148 u8 reg0, reg1; in a8293_set_voltage_noslew() local
[all …]
H A Dves1820.c30 u8 reg0; member
82 u8 reg0, enum fe_spectral_inversion inversion) in ves1820_setup_reg0() argument
84 reg0 |= state->reg0 & 0x62; in ves1820_setup_reg0()
87 if (!state->config->invert) reg0 |= 0x20; in ves1820_setup_reg0()
88 else reg0 &= ~0x20; in ves1820_setup_reg0()
90 if (!state->config->invert) reg0 &= ~0x20; in ves1820_setup_reg0()
91 else reg0 |= 0x20; in ves1820_setup_reg0()
94 ves1820_writereg(state, 0x00, reg0 & 0xfe); in ves1820_setup_reg0()
95 ves1820_writereg(state, 0x00, reg0 | 0x01); in ves1820_setup_reg0()
97 state->reg0 = reg0; in ves1820_setup_reg0()
[all …]
H A Dtda10021.c31 u8 reg0; member
119 static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, in tda10021_setup_reg0() argument
122 reg0 |= state->reg0 & 0x63; in tda10021_setup_reg0()
125 reg0 &= ~0x20; in tda10021_setup_reg0()
127 reg0 |= 0x20; in tda10021_setup_reg0()
129 _tda10021_writereg (state, 0x00, reg0 & 0xfe); in tda10021_setup_reg0()
130 _tda10021_writereg (state, 0x00, reg0 | 0x01); in tda10021_setup_reg0()
132 state->reg0 = reg0; in tda10021_setup_reg0()
404 …p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVE… in tda10021_get_frontend()
405 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10021_get_frontend()
[all …]
H A Dtua6100.c43 u8 reg0[] = { 0x00, 0x00 }; in tua6100_sleep() local
44 struct i2c_msg msg = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_sleep()
63 u8 reg0[] = { 0x00, 0x00 }; in tua6100_set_params() local
66 struct i2c_msg msg0 = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_set_params()
76 reg0[1] = 0x03; in tua6100_set_params()
78 reg0[1] = 0x07; in tua6100_set_params()
H A Dtda10023.c38 u8 reg0; member
144 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0) in tda10023_setup_reg0() argument
146 reg0 |= state->reg0 & 0x63; in tda10023_setup_reg0()
148 tda10023_writereg (state, 0x00, reg0 & 0xfe); in tda10023_setup_reg0()
149 tda10023_writereg (state, 0x00, reg0 | 0x01); in tda10023_setup_reg0()
151 state->reg0 = reg0; in tda10023_setup_reg0()
466 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10023_get_frontend()
529 state->reg0 = REG0_INIT_VAL; in tda10023_attach()
H A Dm88rs2000.c241 u8 reg0, reg1; in m88rs2000_send_diseqc_burst() local
245 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_send_diseqc_burst()
249 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_send_diseqc_burst()
259 u8 reg0, reg1; in m88rs2000_set_tone() local
261 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_set_tone()
268 reg0 |= 0x4; in m88rs2000_set_tone()
269 reg0 &= 0xbc; in m88rs2000_set_tone()
278 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_set_tone()
H A Dstv6110.c384 u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e }; in stv6110_attach() local
390 .buf = reg0, in stv6110_attach()
397 reg0[2] &= ~0xc0; in stv6110_attach()
398 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
421 memcpy(&priv->regs, &reg0[1], 8); in stv6110_attach()
/linux/arch/arm64/crypto/
H A Daes-cipher-core.S20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift
22 ubfiz \reg0, \in0, #2, #8
25 ubfx \reg0, \in0, #\shift, #8
37 ldr \reg0, [tt, \reg0, uxtw #2]
41 lsl \reg0, \reg0, #2
44 ldrb \reg0, [tt, \reg0, uxtw]
49 .macro __pair0, sz, op, reg0, reg1, in0, in1e, in1d, shift
50 ubfx \reg0, \in0, #\shift, #8
52 ldr\op \reg0, [tt, \reg0, uxtw #\sz]
/linux/arch/s390/include/asm/
H A Dfacility.h93 unsigned long reg0 = size - 1; in __stfle_asm() local
99 : [reg0] "+&d" (reg0), [list] "+Q" (*fac_list) in __stfle_asm()
102 return reg0; in __stfle_asm()
H A Dtimex.h149 unsigned int reg0 = func; \
159 : [reg0] "d" (reg0), [reg1] "d" (reg1) \
/linux/tools/perf/arch/x86/tests/
H A Dintel-pt-test.c404 unsigned int m, reg, reg0; in compare_caps() local
412 reg0 = m & caps0->subleaf[i].reg[j]; in compare_caps()
413 if ((reg & reg0) != reg0) { in compare_caps()
415 cpu, i, j, reg, reg0); in compare_caps()
423 reg0 = m & caps0->subleaf[1].eax; in compare_caps()
424 if (reg < reg0) { in compare_caps()
426 cpu, reg, reg0); in compare_caps()
/linux/drivers/net/wireless/ath/ath10k/
H A Dspectral.c71 u32 reg0, reg1; in ath10k_spectral_process_fft() local
82 reg0 = __le32_to_cpu(fftr->reg0); in ath10k_spectral_process_fft()
119 fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX); in ath10k_spectral_process_fft()
122 total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB); in ath10k_spectral_process_fft()
123 base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB); in ath10k_spectral_process_fft()
132 chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX); in ath10k_spectral_process_fft()
/linux/drivers/net/ethernet/8390/
H A Dwd.c261 int reg0 = inb(ioaddr); in wd_probe1() local
262 if (reg0 == 0xff || reg0 == 0) { in wd_probe1()
271 dev->mem_start = ((reg0&0x3f) << 13) + (high_addr_bits << 19); in wd_probe1()
378 ei_status.reg0 = ((dev->mem_start>>13) & 0x3f) | WD_MEMENB; in wd_open()
383 outb(ei_status.reg0, ioaddr); /* WD_CMDREG */ in wd_open()
493 outb(ei_status.reg0 & ~WD_MEMENB, wd_cmdreg); in wd_close()
H A Dne2k-pci.c100 #define ne2k_flags reg0
222 int irq, reg0, chip_idx = ent->driver_data; in ne2k_pci_init_one() local
248 reg0 = inb(ioaddr); in ne2k_pci_init_one()
249 if (reg0 == 0xFF) in ne2k_pci_init_one()
263 outb(reg0, ioaddr); in ne2k_pci_init_one()
H A D8390.h100 unsigned char reg0; /* Register '0' in a WD8013 */ member
/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cnxk_pf.c405 u64 reg0; in octep_poll_pfvf_mailbox_cnxk_pf() local
407 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_MBOX_RINT(0)); in octep_poll_pfvf_mailbox_cnxk_pf()
408 if (reg0) { in octep_poll_pfvf_mailbox_cnxk_pf()
413 if (!(reg0 & (0x1UL << vf_mbox_queue))) in octep_poll_pfvf_mailbox_cnxk_pf()
422 if (reg0) in octep_poll_pfvf_mailbox_cnxk_pf()
423 octep_write_csr64(oct, CNXK_SDP_EPF_MBOX_RINT(0), reg0); in octep_poll_pfvf_mailbox_cnxk_pf()
438 u64 reg0; in octep_poll_oei_cnxk_pf() local
441 reg0 = octep_read_csr64(oct, CNXK_SDP_EPF_OEI_RINT); in octep_poll_oei_cnxk_pf()
442 if (reg0) { in octep_poll_oei_cnxk_pf()
443 octep_write_csr64(oct, CNXK_SDP_EPF_OEI_RINT, reg0); in octep_poll_oei_cnxk_pf()
[all …]
H A Doctep_cn9k_pf.c376 u64 reg0, reg1; in octep_poll_pfvf_mailbox() local
378 reg0 = octep_read_csr64(oct, CN93_SDP_EPF_MBOX_RINT(0)); in octep_poll_pfvf_mailbox()
380 if (reg0 || reg1) { in octep_poll_pfvf_mailbox()
387 if (!(reg0 & (0x1UL << vf_mbox_queue))) in octep_poll_pfvf_mailbox()
400 if (reg0) in octep_poll_pfvf_mailbox()
401 octep_write_csr64(oct, CN93_SDP_EPF_MBOX_RINT(0), reg0); in octep_poll_pfvf_mailbox()
/linux/drivers/pci/controller/
H A Dpcie-altera.c144 u32 reg0; member
226 cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); in tlp_write_tx()
231 static void s10_tlp_write_tx(struct altera_pcie *pcie, u32 reg0, u32 ctrl) in s10_tlp_write_tx() argument
233 cra_writel(pcie, reg0, RP_TX_REG0); in s10_tlp_write_tx()
258 u32 reg0, reg1; in tlp_read_packet() local
268 reg0 = cra_readl(pcie, RP_RXCPL_REG0); in tlp_read_packet()
281 *value = reg0; in tlp_read_packet()
344 tlp_rp_regdata.reg0 = headers[0]; in tlp_write_packet()
350 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
355 tlp_rp_regdata.reg0 = data; in tlp_write_packet()
[all …]
/linux/drivers/net/ethernet/netronome/nfp/bpf/
H A Dverifier.c314 const struct bpf_reg_state *reg0 = cur_regs(env) + BPF_REG_0; in nfp_bpf_check_exit() local
320 if (!(reg0->type == SCALAR_VALUE && tnum_is_const(reg0->var_off))) { in nfp_bpf_check_exit()
323 tnum_strn(tn_buf, sizeof(tn_buf), reg0->var_off); in nfp_bpf_check_exit()
325 reg0->type, tn_buf); in nfp_bpf_check_exit()
329 imm = reg0->var_off.value; in nfp_bpf_check_exit()
335 reg0->type, imm); in nfp_bpf_check_exit()
/linux/drivers/net/ethernet/adaptec/
H A Dstarfire.c1057 u16 reg0; in check_duplex() local
1070 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in check_duplex()
1073 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART; in check_duplex()
1075 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART); in check_duplex()
1077 reg0 |= BMCR_SPEED100; in check_duplex()
1079 reg0 |= BMCR_FULLDPLX; in check_duplex()
1085 mdio_write(dev, np->phys[0], MII_BMCR, reg0); in check_duplex()
1612 u16 reg0, reg1, reg4, reg5; in netdev_media_change() local
1620 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in netdev_media_change()
1625 if (reg0 & BMCR_ANENABLE) { in netdev_media_change()
[all …]
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pko.h198 uint64_t reg0:11; member
255 uint64_t reg0:11;
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mes.h328 uint32_t reg0; member
430 uint32_t reg0, uint32_t reg1,
H A Damdgpu_mes.c503 uint32_t reg0, uint32_t reg1, in amdgpu_mes_reg_write_reg_wait() argument
510 op_input.wrm_reg.reg0 = reg0; in amdgpu_mes_reg_write_reg_wait()
H A Damdgpu_gmc.c804 uint32_t reg0, uint32_t reg1, in amdgpu_gmc_fw_reg_write_reg_wait() argument
815 amdgpu_mes_reg_write_reg_wait(adev, reg0, reg1, in amdgpu_gmc_fw_reg_write_reg_wait()
822 amdgpu_ring_emit_reg_write_reg_wait(ring, reg0, reg1, in amdgpu_gmc_fw_reg_write_reg_wait()
854 dev_err(adev->dev, "failed to write reg %x wait reg %x\n", reg0, reg1); in amdgpu_gmc_fw_reg_write_reg_wait()
/linux/arch/sparc/lib/
H A Dcopy_page.S38 #define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \ argument
39 fsrc2 %reg0, %f48; fsrc2 %reg1, %f50; \

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