Searched refs:reference_div (Results 1 – 6 of 6) sorted by relevance
122 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; in radeon_read_clocks_OF()123 if (p1pll->reference_div < 2) in radeon_read_clocks_OF()124 p1pll->reference_div = 12; in radeon_read_clocks_OF()125 p2pll->reference_div = p1pll->reference_div; in radeon_read_clocks_OF()151 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()198 if (p1pll->reference_div < 2) { in radeon_get_clock_info()202 p1pll->reference_div = in radeon_get_clock_info()205 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; in radeon_get_clock_info()206 if (p1pll->reference_div < 2) in radeon_get_clock_info()207 p1pll->reference_div = 12; in radeon_get_clock_info()[all …]
731 p1pll->reference_div = RBIOS16(pll_info + 0x10); in radeon_combios_get_clock_info()748 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()763 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info()
1147 p1pll->reference_div = 0; in radeon_atom_get_clock_info()1193 spll->reference_div = 0; in radeon_atom_get_clock_info()1220 mpll->reference_div = 0; in radeon_atom_get_clock_info()
151 ref_div_min = pll->reference_div; in amdgpu_pll_compute()157 ref_div_max = pll->reference_div; in amdgpu_pll_compute()
196 uint32_t reference_div; member
850 pll->reference_div = amdgpu_crtc->pll_reference_div; in amdgpu_atombios_crtc_set_pll()