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Searched refs:ref_clk_mpllb_div (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_link_encoder.c58 .ref_clk_mpllb_div = 1,
86 .ref_clk_mpllb_div = 1,
114 .ref_clk_mpllb_div = 1,
142 .ref_clk_mpllb_div = 1,
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn20/
H A Ddcn20_link_encoder.c63 .ref_clk_mpllb_div = 2,
91 .ref_clk_mpllb_div = 2,
119 .ref_clk_mpllb_div = 2,
147 .ref_clk_mpllb_div = 2,
H A Ddcn20_link_encoder.h255 uint32_t ref_clk_mpllb_div; member
/linux/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c2308 unsigned int ref_clk_mpllb_div; in intel_c20pll_calc_port_clock() local
2322 ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mpllb[6]); in intel_c20pll_calc_port_clock()
2332 ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mplla[6]); in intel_c20pll_calc_port_clock()
2341 ref = DIV_ROUND_CLOSEST(refclk * (1 << (1 + fb_clk_div4_en)), 1 << ref_clk_mpllb_div); in intel_c20pll_calc_port_clock()