/linux/arch/x86/hyperv/ |
H A D | hv_init.c | 69 rdmsrl(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa); in hyperv_init_ghcb() 102 rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); in hv_cpu_init() 147 rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); in hv_reenlightenment_notify() 160 rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&emu_status); in hyperv_stop_tsc_emulation() 164 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); in hyperv_stop_tsc_emulation() 224 rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&re_ctrl); in clear_hv_tscchange_cb() 258 rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64); in hv_cpu_die() 267 rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&re_ctrl)); in hv_cpu_die() 338 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_suspend() 355 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_resume() [all …]
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/linux/arch/x86/kernel/cpu/mce/ |
H A D | intel.c | 96 rdmsrl(MSR_IA32_MCG_CAP, cap); in cmci_supported() 108 rdmsrl(MSR_IA32_MCG_CAP, tmp); in lmce_supported() 125 rdmsrl(MSR_IA32_FEAT_CTL, tmp); in lmce_supported() 143 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_set_threshold() 186 rdmsrl(MSR_IA32_MCx_CTL2(bank), *val); in cmci_skip_bank() 235 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_claim_bank() 326 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in __cmci_disable_bank() 432 rdmsrl(MSR_IA32_MCG_EXT_CTL, val); in intel_init_lmce() 445 rdmsrl(MSR_IA32_MCG_EXT_CTL, val); in intel_clear_lmce()
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/linux/arch/x86/kernel/cpu/ |
H A D | tsx.c | 27 rdmsrl(MSR_IA32_TSX_CTRL, tsx); in tsx_disable() 47 rdmsrl(MSR_IA32_TSX_CTRL, tsx); in tsx_enable() 118 rdmsrl(MSR_TSX_FORCE_ABORT, msr); in tsx_clear_cpuid() 122 rdmsrl(MSR_IA32_TSX_CTRL, msr); in tsx_clear_cpuid() 149 rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl); in tsx_dev_mode_disable()
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H A D | aperfmperf.c | 43 rdmsrl(MSR_IA32_APERF, aperf); in init_counter_refs() 44 rdmsrl(MSR_IA32_MPERF, mperf); in init_counter_refs() 477 rdmsrl(MSR_IA32_APERF, aperf); in arch_scale_freq_tick() 478 rdmsrl(MSR_IA32_MPERF, mperf); in arch_scale_freq_tick()
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H A D | intel_epb.c | 82 rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); in intel_epb_save() 97 rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); in intel_epb_restore()
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/linux/arch/x86/platform/olpc/ |
H A D | olpc-xo1-rtc.c | 67 rdmsrl(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm); in xo1_rtc_init() 68 rdmsrl(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm); in xo1_rtc_init() 69 rdmsrl(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century); in xo1_rtc_init()
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/linux/arch/x86/events/amd/ |
H A D | power.c | 51 rdmsrl(MSR_F15H_CU_PWR_ACCUMULATOR, new_pwr_acc); in event_update() 52 rdmsrl(MSR_F15H_PTSC, new_ptsc); in event_update() 78 rdmsrl(MSR_F15H_PTSC, event->hw.ptsc); in __pmu_event_start() 79 rdmsrl(MSR_F15H_CU_PWR_ACCUMULATOR, event->hw.pwr_acc); in __pmu_event_start()
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H A D | lbr.c | 76 rdmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2, val); in amd_pmu_lbr_get_from() 85 rdmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val); in amd_pmu_lbr_get_to() 402 rdmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl); in amd_pmu_lbr_enable_all() 406 rdmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg); in amd_pmu_lbr_enable_all()
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/linux/arch/x86/power/ |
H A D | cpu.c | 46 rdmsrl(msr->info.msr_no, msr->info.reg.q); in msr_save_context() 112 rdmsrl(MSR_FS_BASE, ctxt->fs_base); in __save_processor_state() 113 rdmsrl(MSR_GS_BASE, ctxt->kernelmode_gs_base); in __save_processor_state() 114 rdmsrl(MSR_KERNEL_GS_BASE, ctxt->usermode_gs_base); in __save_processor_state() 117 rdmsrl(MSR_EFER, ctxt->efer); in __save_processor_state()
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/linux/drivers/video/fbdev/geode/ |
H A D | video_gx.c | 145 rdmsrl(MSR_GLCP_SYS_RSTPLL, sys_rstpll); in gx_set_dclk_frequency() 146 rdmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 170 rdmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 183 rdmsrl(MSR_GX_MSR_PADSEL, val); in gx_configure_tft()
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H A D | suspend_gx.c | 24 rdmsrl(MSR_GX_MSR_PADSEL, par->msr.padsel); in gx_save_regs() 25 rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); in gx_save_regs() 46 rdmsrl(MSR_GLCP_DOTPLL, dotpll_lo); in gx_set_dotpll() 53 rdmsrl(MSR_GLCP_DOTPLL, dotpll_lo); in gx_set_dotpll()
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H A D | lxfb_ops.c | 361 rdmsrl(MSR_LX_GLD_MSR_CONFIG, msrval); in lx_set_mode() 422 rdmsrl(MSR_LX_SPARE_MSR, msrval); in lx_set_mode() 594 rdmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel); in lx_save_regs() 595 rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); in lx_save_regs() 596 rdmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg); in lx_save_regs() 597 rdmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare); in lx_save_regs()
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/linux/arch/x86/virt/svm/ |
H A D | sev.c | 83 rdmsrl(MSR_AMD64_SYSCFG, val); in __mfd_enable() 104 rdmsrl(MSR_AMD64_SYSCFG, val); in __snp_enable() 125 rdmsrl(MSR_AMD64_RMP_BASE, rmp_base); in snp_probe_rmptable_info() 126 rdmsrl(MSR_AMD64_RMP_END, rmp_end); in snp_probe_rmptable_info() 234 rdmsrl(MSR_AMD64_SYSCFG, val); in snp_rmptable_init()
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/linux/drivers/platform/x86/intel/speed_select_if/ |
H A D | isst_if_mbox_msr.c | 42 rdmsrl(MSR_OS_MAILBOX_INTERFACE, data); in isst_if_send_mbox_cmd() 67 rdmsrl(MSR_OS_MAILBOX_INTERFACE, data); in isst_if_send_mbox_cmd() 77 rdmsrl(MSR_OS_MAILBOX_DATA, data); in isst_if_send_mbox_cmd()
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/linux/arch/x86/kernel/apic/ |
H A D | apic_numachip.c | 34 rdmsrl(MSR_FAM10H_NODE_ID, value); in numachip1_get_apic_id() 45 rdmsrl(MSR_FAM10H_MMIO_CONF_BASE, mcfg); in numachip2_get_apic_id() 153 rdmsrl(MSR_FAM10H_NODE_ID, val); in fixup_cpu_id()
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/linux/arch/x86/kernel/ |
H A D | mmconf-fam10h_64.c | 100 rdmsrl(address, val); in get_fam10h_pci_mmconf_base() 108 rdmsrl(address, val); in get_fam10h_pci_mmconf_base() 180 rdmsrl(address, val); in fam10h_check_enable_mmcfg()
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H A D | process_64.c | 98 rdmsrl(MSR_FS_BASE, fs); in __show_regs() 99 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs); in __show_regs() 110 rdmsrl(MSR_FS_BASE, fs); in __show_regs() 111 rdmsrl(MSR_GS_BASE, gs); in __show_regs() 112 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs); in __show_regs() 198 rdmsrl(MSR_KERNEL_GS_BASE, gsbase); in __rdgsbase_inactive() 466 rdmsrl(MSR_KERNEL_GS_BASE, gsbase); in x86_gsbase_read_cpu_inactive()
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H A D | tsc_sync.c | 68 rdmsrl(MSR_IA32_TSC_ADJUST, curval); in tsc_verify_tsc_adjust() 168 rdmsrl(MSR_IA32_TSC_ADJUST, bootval); in tsc_store_and_check_tsc_adjust() 190 rdmsrl(MSR_IA32_TSC_ADJUST, bootval); in tsc_store_and_check_tsc_adjust()
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/linux/drivers/platform/x86/intel/ifs/ |
H A D | load.c | 131 rdmsrl(msrs->copy_hashes_status, hashes_status.data); in copy_hashes_authenticate_chunks() 153 rdmsrl(msrs->copy_chunks_status, chunk_status.data); in copy_hashes_authenticate_chunks() 199 rdmsrl(msrs->copy_hashes_status, hashes_status.data); in copy_hashes_authenticate_chunks_gen2() 220 rdmsrl(msrs->copy_chunks_status, chunk_status.data); in copy_hashes_authenticate_chunks_gen2() 243 rdmsrl(msrs->copy_chunks_status, chunk_status.data); in copy_hashes_authenticate_chunks_gen2()
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/linux/arch/x86/pci/ |
H A D | amd_bus.c | 205 rdmsrl(address, val); in early_root_info_init() 296 rdmsrl(address, val); in early_root_info_init() 301 rdmsrl(address, val); in early_root_info_init() 344 rdmsrl(MSR_AMD64_NB_CFG, reg); in amd_bus_cpu_online()
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/linux/arch/x86/events/intel/ |
H A D | knc.c | 162 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_disable_all() 171 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_enable_all() 203 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status); in knc_pmu_get_status()
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/linux/drivers/cpufreq/ |
H A D | powernow-k7.c | 222 rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val); in change_FID() 237 rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val); in change_VID() 263 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_target() 560 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_get() 601 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_cpu_init()
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/linux/drivers/platform/x86/ |
H A D | intel_ips.c | 373 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_cpu_raise() 408 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_cpu_lower() 440 rdmsrl(IA32_PERF_CTL, perf_ctl); in do_enable_cpu_turbo() 478 rdmsrl(IA32_PERF_CTL, perf_ctl); in do_disable_cpu_turbo() 1218 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in cpu_clamp_show() 1293 rdmsrl(IA32_MISC_ENABLE, misc_en); in ips_detect_cpu() 1315 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_power); in ips_detect_cpu() 1499 rdmsrl(PLATFORM_INFO, platform_info); in ips_probe() 1532 rdmsrl(TURBO_POWER_CURRENT_LIMIT, ips->orig_turbo_limit); in ips_probe() 1599 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_remove()
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/linux/drivers/thermal/intel/ |
H A D | intel_hfi.c | 287 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr); in intel_hfi_process_event() 359 rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); in hfi_enable() 380 rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); in hfi_disable() 391 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); in hfi_disable()
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/linux/drivers/idle/ |
H A D | intel_idle.c | 1859 rdmsrl(MSR_PKGC6_IRTL, msr); in bxt_idle_state_table_update() 1866 rdmsrl(MSR_PKGC7_IRTL, msr); in bxt_idle_state_table_update() 1873 rdmsrl(MSR_PKGC8_IRTL, msr); in bxt_idle_state_table_update() 1880 rdmsrl(MSR_PKGC9_IRTL, msr); in bxt_idle_state_table_update() 1887 rdmsrl(MSR_PKGC10_IRTL, msr); in bxt_idle_state_table_update() 1915 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr); in sklh_idle_state_table_update() 1927 rdmsrl(MSR_IA32_FEAT_CTL, msr); in sklh_idle_state_table_update() 1946 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr); in skx_idle_state_table_update() 1999 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr); in spr_idle_state_table_update() 2161 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); in auto_demotion_disable() [all …]
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