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Searched refs:radeon_crtc (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dradeon_cursor.c35 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_lock_cursor() local
39 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
44 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
46 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
51 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
53 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
58 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
64 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_hide_cursor() local
68 WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
72 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
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H A Drs600.c121 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip() local
122 struct drm_framebuffer *fb = radeon_crtc->base.primary->fb; in rs600_page_flip()
123 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rs600_page_flip()
128 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
131 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rs600_page_flip()
134 WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, in rs600_page_flip()
137 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
139 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
144 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rs600_page_flip()
152 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
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H A Dradeon_legacy_encoders.c192 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_lvds_mode_set() local
230 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_lvds_mode_set()
251 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
253 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
583 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_primary_dac_mode_set() local
589 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_primary_dac_mode_set()
629 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
631 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
780 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tmds_int_mode_set() local
847 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_tmds_int_mode_set()
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H A Ddce6_afmt.h32 struct radeon_crtc;
48 struct radeon_crtc *crtc, unsigned int clock);
50 struct radeon_crtc *crtc, unsigned int clock);
H A Devergreen_hdmi.h37 struct radeon_crtc;
60 struct radeon_crtc *crtc, unsigned int clock);
62 struct radeon_crtc *crtc, unsigned int clock);
H A Datombios_encoders.c457 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_atom_get_bpc() local
458 bpc = radeon_crtc->bpc; in radeon_atom_get_bpc()
1043 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_dig_transmitter_setup2() local
1044 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup2()
1531 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_yuv_setup() local
1547 (radeon_crtc->crtc_id << 18))); in atombios_yuv_setup()
1549 WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24))); in atombios_yuv_setup()
1555 args.ucCRTC = radeon_crtc->crtc_id; in atombios_yuv_setup()
1850 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_set_encoder_crtc_source() local
1867 args.v1.ucCRTC = radeon_crtc->crtc_id; in atombios_set_encoder_crtc_source()
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H A Dr600.h34 struct radeon_crtc;
47 struct radeon_crtc *crtc, unsigned int clock);
H A Dradeon_legacy_tv.c241 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_get_std_mode() local
246 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_get_std_mode()
247 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_get_std_mode()
532 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_mode_set() local
549 radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tv_mode_set()
595 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_mode_set()
598 if (radeon_crtc->rmx_type != RMX_OFF) in radeon_legacy_tv_mode_set()
H A Drv770.c802 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip() local
803 struct drm_framebuffer *fb = radeon_crtc->base.primary->fb; in rv770_page_flip()
804 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rv770_page_flip()
809 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
812 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rv770_page_flip()
815 WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, in rv770_page_flip()
818 if (radeon_crtc->crtc_id) { in rv770_page_flip()
825 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
827 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
832 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rv770_page_flip()
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H A Dr600_dpm.c158 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vblank_time() local
164 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vblank_time()
165 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vblank_time()
167 radeon_crtc->hw_mode.crtc_htotal * in r600_dpm_get_vblank_time()
168 (radeon_crtc->hw_mode.crtc_vblank_end - in r600_dpm_get_vblank_time()
169 radeon_crtc->hw_mode.crtc_vdisplay + in r600_dpm_get_vblank_time()
170 (radeon_crtc->v_border * 2)); in r600_dpm_get_vblank_time()
172 vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; in r600_dpm_get_vblank_time()
185 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vrefresh() local
190 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vrefresh()
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H A Devergreen_hdmi.c77 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr() local
78 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
230 struct radeon_crtc *crtc, unsigned int clock) in dce4_hdmi_audio_set_dto()
273 struct radeon_crtc *crtc, unsigned int clock) in dce4_dp_audio_set_dto()
H A Dradeon_audio.h55 struct radeon_crtc *crtc, unsigned int clock);
91 struct radeon_crtc *crtc, unsigned int clock);
H A Dr100.c166 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip() local
168 struct drm_framebuffer *fb = radeon_crtc->base.primary->fb; in r100_page_flip()
174 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
181 WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch); in r100_page_flip()
185 if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET) in r100_page_flip()
193 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
208 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip_pending() local
211 return !!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & in r100_page_flip_pending()
464 struct radeon_crtc *radeon_crtc; in r100_pm_prepare() local
469 radeon_crtc = to_radeon_crtc(crtc); in r100_pm_prepare()
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H A Ddce6_afmt.c271 struct radeon_crtc *crtc, unsigned int clock) in dce6_hdmi_audio_set_dto()
290 struct radeon_crtc *crtc, unsigned int clock) in dce6_dp_audio_set_dto()
H A Dradeon_audio.c444 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); in radeon_audio_set_dto()
602 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_hdmi_set_color_depth() local
603 bpc = radeon_crtc->bpc; in radeon_hdmi_set_color_depth()
H A Dradeon_kms.c269 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_info_ioctl() local
270 *value = radeon_crtc->crtc_id; in radeon_info_ioctl()
H A Drs780_dpm.c54 struct radeon_crtc *radeon_crtc; in rs780_get_pm_mode_parameters() local
64 radeon_crtc = to_radeon_crtc(crtc); in rs780_get_pm_mode_parameters()
65 pi->crtc_id = radeon_crtc->crtc_id; in rs780_get_pm_mode_parameters()
H A Ddce3_1_afmt.c118 struct radeon_crtc *crtc, unsigned int clock) in dce3_2_audio_set_dto()
H A Dr600_cs.c832 struct radeon_crtc *radeon_crtc; in r600_cs_common_vline_parse() local
897 radeon_crtc = to_radeon_crtc(crtc); in r600_cs_common_vline_parse()
898 crtc_id = radeon_crtc->crtc_id; in r600_cs_common_vline_parse()
H A Dsi_dpm.c5262 struct radeon_crtc *radeon_crtc = NULL; in si_upload_smc_data() local
5270 radeon_crtc = rdev->mode_info.crtcs[i]; in si_upload_smc_data()
5275 if (radeon_crtc == NULL) in si_upload_smc_data()
5278 if (radeon_crtc->line_time <= 0) in si_upload_smc_data()
5283 radeon_crtc->crtc_id) != PPSMC_Result_OK) in si_upload_smc_data()
5288 radeon_crtc->wm_high / radeon_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()
5293 radeon_crtc->wm_low / radeon_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()
H A Drv515.c680 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc) in atom_rv515_force_tv_scaler()
924 struct radeon_crtc *crtc, in rv515_crtc_bandwidth_compute()
H A Dradeon_connectors.c713 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_connector_set_property()
715 radeon_crtc->output_csc = radeon_encoder->output_csc; in radeon_connector_set_property()
721 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); radeon_connector_set_property() local
H A Drs690.c273 struct radeon_crtc *crtc, in rs690_crtc_bandwidth_compute()
H A Dr600.c301 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in dce3_program_fmt() local
346 WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp); in dce3_program_fmt()