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Searched refs:queue_mask (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/soc/ti/
H A Dknav_qmss_acc.c283 cmd->command, cmd->queue_mask, cmd->list_dma, in knav_acc_write()
289 writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask); in knav_acc_write()
308 u32 queue_mask; in knav_acc_setup_cmd() local
313 queue_mask = BIT(range->num_queues) - 1; in knav_acc_setup_cmd()
317 queue_mask = 0; in knav_acc_setup_cmd()
322 cmd->queue_mask = queue_mask; in knav_acc_setup_cmd()
H A Dknav_qmss.h89 u32 queue_mask; member
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_packet_manager_vi.c136 packet->queue_mask_lo = lower_32_bits(res->queue_mask); in pm_set_resources_vi()
137 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_vi()
H A Dkfd_packet_manager_v9.c212 packet->queue_mask_lo = lower_32_bits(res->queue_mask); in pm_set_resources_v9()
213 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_v9()
H A Dkfd_priv.h636 uint64_t queue_mask; member
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Didpf.rst121 # ethtool --per-queue <ethX> queue_mask 0xa --coalesce adaptive-rx off
126 # ethtool --per-queue <ethX> queue_mask 0xa --show-coalesce
/linux/drivers/net/ethernet/marvell/
H A Dmv643xx_eth.c2255 u8 queue_mask; in mv643xx_eth_poll() local
2266 queue_mask = mp->work_tx | mp->work_tx_end | mp->work_rx; in mv643xx_eth_poll()
2268 queue_mask |= mp->work_rx_refill; in mv643xx_eth_poll()
2270 if (!queue_mask) { in mv643xx_eth_poll()
2276 queue = fls(queue_mask) - 1; in mv643xx_eth_poll()
2277 queue_mask = 1 << queue; in mv643xx_eth_poll()
2283 if (mp->work_tx_end & queue_mask) { in mv643xx_eth_poll()
2285 } else if (mp->work_tx & queue_mask) { in mv643xx_eth_poll()
2288 } else if (mp->work_rx & queue_mask) { in mv643xx_eth_poll()
2290 } else if (!mp->oom && (mp->work_rx_refill & queue_mask)) { in mv643xx_eth_poll()
/linux/net/ethtool/
H A Dioctl.c2834 DECLARE_BITMAP(queue_mask, MAX_NUM_QUEUE); in ethtool_get_per_queue_coalesce()
2841 bitmap_from_arr32(queue_mask, per_queue_opt->queue_mask, in ethtool_get_per_queue_coalesce()
2844 for_each_set_bit(bit, queue_mask, MAX_NUM_QUEUE) { in ethtool_get_per_queue_coalesce()
2867 DECLARE_BITMAP(queue_mask, MAX_NUM_QUEUE); in ethtool_set_per_queue_coalesce()
2875 bitmap_from_arr32(queue_mask, per_queue_opt->queue_mask, MAX_NUM_QUEUE); in ethtool_set_per_queue_coalesce()
2876 n_queue = bitmap_weight(queue_mask, MAX_NUM_QUEUE); in ethtool_set_per_queue_coalesce()
2881 for_each_set_bit(bit, queue_mask, MAX_NUM_QUEUE) { in ethtool_set_per_queue_coalesce()
2910 for_each_set_bit(i, queue_mask, bit) { in ethtool_set_per_queue_coalesce()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gfx.c619 uint64_t queue_mask = ~0ULL; in amdgpu_gfx_mes_enable_kcq() local
633 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask); in amdgpu_gfx_mes_enable_kcq()
657 uint64_t queue_mask = 0; in amdgpu_gfx_enable_kcq() local
673 if (WARN_ON(i > (sizeof(queue_mask)*8))) { in amdgpu_gfx_enable_kcq()
678 queue_mask |= (1ull << amdgpu_queue_mask_bit_to_set_resource_bit(adev, i)); in amdgpu_gfx_enable_kcq()
696 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask); in amdgpu_gfx_enable_kcq()
H A Damdgpu_gfx.h128 uint64_t queue_mask);
H A Dgfx_v8_0.c4315 uint64_t queue_mask = 0; in gfx_v8_0_kiq_kcq_enable() local
4325 if (WARN_ON(i >= (sizeof(queue_mask)*8))) { in gfx_v8_0_kiq_kcq_enable()
4330 queue_mask |= (1ull << i); in gfx_v8_0_kiq_kcq_enable()
4341 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable()
4342 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable()
H A Dgfx_v12_0.c246 uint64_t queue_mask) in gfx_v12_0_kiq_set_resources() argument
251 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v12_0_kiq_set_resources()
252 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v12_0_kiq_set_resources()
H A Dgfx_v11_0.c295 static void gfx11_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx11_kiq_set_resources() argument
307 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx11_kiq_set_resources()
308 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx11_kiq_set_resources()
H A Dgfx_v9_0.c901 uint64_t queue_mask) in gfx_v9_0_kiq_set_resources() argument
915 lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v9_0_kiq_set_resources()
917 upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v9_0_kiq_set_resources()
H A Dgfx_v10_0.c3678 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx10_kiq_set_resources() argument
3689 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx10_kiq_set_resources()
3690 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx10_kiq_set_resources()
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_sched.c1282 u32 queue_mask = 0, i; in csg_slot_prog_locked() local
1302 queue_mask |= BIT(i); in csg_slot_prog_locked()
1328 panthor_fw_toggle_reqs(csg_iface, doorbell_req, doorbell_ack, queue_mask); in csg_slot_prog_locked()
2521 static void group_schedule_locked(struct panthor_group *group, u32 queue_mask) in group_schedule_locked() argument
2534 if ((queue_mask & group->blocked_queues) == queue_mask) in group_schedule_locked()
2538 group->idle_queues &= ~queue_mask; in group_schedule_locked()
/linux/drivers/net/ethernet/cadence/
H A Dmacb_main.c3979 unsigned int *queue_mask, in macb_probe_queues() argument
3982 *queue_mask = 0x1; in macb_probe_queues()
3995 *queue_mask |= readl_relaxed(mem + GEM_DCFG6) & 0xff; in macb_probe_queues()
3996 *num_queues = hweight32(*queue_mask); in macb_probe_queues()
4115 if (!(bp->queue_mask & (1 << hw_q))) in macb_init()
5006 unsigned int queue_mask, num_queues; in macb_probe() local
5042 macb_probe_queues(mem, native_io, &queue_mask, &num_queues); in macb_probe()
5066 bp->queue_mask = queue_mask; in macb_probe()
H A Dmacb.h1271 unsigned int queue_mask; member
/linux/net/sched/
H A Dsch_taprio.c1423 u32 i, queue_mask = 0; in tc_map_to_queue_mask() local
1434 queue_mask |= GENMASK(offset + count - 1, offset); in tc_map_to_queue_mask()
1437 return queue_mask; in tc_map_to_queue_mask()
/linux/include/uapi/linux/
H A Dethtool.h1776 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; member