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Searched refs:queue_mask (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/soc/ti/
H A Dknav_qmss_acc.c283 cmd->command, cmd->queue_mask, cmd->list_dma, in knav_acc_write()
289 writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask); in knav_acc_write()
308 u32 queue_mask; in knav_acc_setup_cmd() local
313 queue_mask = BIT(range->num_queues) - 1; in knav_acc_setup_cmd()
317 queue_mask = 0; in knav_acc_setup_cmd()
322 cmd->queue_mask = queue_mask; in knav_acc_setup_cmd()
H A Dknav_qmss.h89 u32 queue_mask; member
/linux/kernel/sched/
H A Dstop_task.c101 .queue_mask = 16,
H A Didle.c540 .queue_mask = 0,
H A Dsched.h1124 unsigned int queue_mask; member
2439 unsigned int queue_mask; member
2603 rq->queue_mask = 0; in rq_modified_clear()
2608 unsigned int mask = class->queue_mask; in rq_modified_above()
2609 return rq->queue_mask & ~((mask << 1) - 1); in rq_modified_above()
H A Dcore.c2093 rq->queue_mask |= p->sched_class->queue_mask; in enqueue_task()
2126 rq->queue_mask |= p->sched_class->queue_mask; in dequeue_task()
H A Drt.c2572 .queue_mask = 4,
H A Ddeadline.c3350 .queue_mask = 8,
H A Dext.c3356 .queue_mask = 1,
H A Dfair.c13886 .queue_mask = 2,
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Didpf.rst121 # ethtool --per-queue <ethX> queue_mask 0xa --coalesce adaptive-rx off
126 # ethtool --per-queue <ethX> queue_mask 0xa --show-coalesce
H A Dice.rst1159 # ethtool --per-queue <ethX> queue_mask 0xa --coalesce adaptive-rx off
1164 # ethtool --per-queue <ethX> queue_mask 0xa --show-coalesce
/linux/drivers/net/ethernet/marvell/
H A Dmv643xx_eth.c2256 u8 queue_mask; in mv643xx_eth_poll() local
2267 queue_mask = mp->work_tx | mp->work_tx_end | mp->work_rx; in mv643xx_eth_poll()
2269 queue_mask |= mp->work_rx_refill; in mv643xx_eth_poll()
2271 if (!queue_mask) { in mv643xx_eth_poll()
2277 queue = fls(queue_mask) - 1; in mv643xx_eth_poll()
2278 queue_mask = 1 << queue; in mv643xx_eth_poll()
2284 if (mp->work_tx_end & queue_mask) { in mv643xx_eth_poll()
2286 } else if (mp->work_tx & queue_mask) { in mv643xx_eth_poll()
2289 } else if (mp->work_rx & queue_mask) { in mv643xx_eth_poll()
2291 } else if (!mp->oom && (mp->work_rx_refill & queue_mask)) { in mv643xx_eth_poll()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_packet_manager_v9.c215 packet->queue_mask_lo = lower_32_bits(res->queue_mask); in pm_set_resources_v9()
216 packet->queue_mask_hi = upper_32_bits(res->queue_mask); in pm_set_resources_v9()
H A Dkfd_device_queue_manager.c1718 res.queue_mask = 0; in set_sched_resources()
1734 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) { in set_sched_resources()
1739 res.queue_mask |= 1ull in set_sched_resources()
1749 res.vmid_mask, res.queue_mask); in set_sched_resources()
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_sched.c1421 u32 queue_mask = 0, i; in csg_slot_prog_locked() local
1442 queue_mask |= BIT(i); in csg_slot_prog_locked()
1470 panthor_fw_toggle_reqs(csg_iface, doorbell_req, doorbell_ack, queue_mask); in csg_slot_prog_locked()
2654 static void group_schedule_locked(struct panthor_group *group, u32 queue_mask) in group_schedule_locked() argument
2667 if ((queue_mask & group->blocked_queues) == queue_mask) in group_schedule_locked()
2671 group->idle_queues &= ~queue_mask; in group_schedule_locked()
/linux/net/sched/
H A Dsch_taprio.c1441 u32 i, queue_mask = 0; in tc_map_to_queue_mask()
1452 queue_mask |= GENMASK(offset + count - 1, offset); in tc_map_to_queue_mask()
1455 return queue_mask; in tc_map_to_queue_mask()
1440 u32 i, queue_mask = 0; tc_map_to_queue_mask() local
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c294 uint64_t queue_mask) in gfx_v12_0_kiq_set_resources() argument
299 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v12_0_kiq_set_resources()
300 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v12_0_kiq_set_resources()
H A Dgfx_v11_0.c347 static void gfx11_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx11_kiq_set_resources() argument
359 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx11_kiq_set_resources()
360 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx11_kiq_set_resources()