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Searched refs:qos_level_high_wm (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/
H A Ddcn21_hubp.c480 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
485 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp21_validate_dml_output()
487 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp21_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/
H A Ddcn20_hubp.c148 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp2_program_deadline()
1244 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp2_read_state_common()
1308 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp2_read_state_common()
1589 QoS_LEVEL_HIGH_WM, &ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
1594 if (ttu_attr.qos_level_high_wm != dml_ttu_attr->qos_level_high_wm) in hubp2_validate_dml_output()
1596 dml_ttu_attr->qos_level_high_wm, ttu_attr.qos_level_high_wm); in hubp2_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_dchub_registers.h63 uint32_t qos_level_high_wm; member
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c281 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp401_program_deadline()
899 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp401_read_state()
963 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp401_read_state()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.c337 ttu_regs->qos_level_high_wm); in print__ttu_regs_st()
H A Ddisplay_mode_structs.h677 unsigned int qos_level_high_wm; member
H A Ddml1_display_rq_dlg_calc.c1905 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml1_rq_dlg_get_dlg_params()
1907 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml1_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/
H A Ddcn10_hubp.c673 QoS_LEVEL_HIGH_WM, ttu_attr->qos_level_high_wm); in hubp1_program_deadline()
1013 QoS_LEVEL_HIGH_WM, &ttu_attr->qos_level_high_wm); in hubp1_read_state_common()
1077 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); in hubp1_read_state_common()
H A Ddcn10_hubp.h688 uint32_t qos_level_high_wm; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.c543 ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); in dml32_rq_dlg_get_dlg_reg()
608 ASSERT(ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml32_rq_dlg_get_dlg_reg()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml_display_rq_dlg_calc.c492 disp_ttu_regs->qos_level_high_wm = (dml_uint_t)(4.0 * (dml_float_t)htotal * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_reg()
556 ASSERT(disp_ttu_regs->qos_level_high_wm < (dml_uint_t) dml_pow(2, 14)); in dml_rq_dlg_get_dlg_reg()
H A Ddml2_translation_helper.c1524 out->ttu_regs.qos_level_high_wm = disp_ttu_regs->qos_level_high_wm; in dml2_update_pipe_ctx_dchub_regs()
H A Ddisplay_mode_util.c305 dml_print("DML: qos_level_high_wm = 0x%x\n", ttu_regs->qos_level_high_wm); in dml_print_ttu_regs_st()
H A Ddisplay_mode_core_structs.h1980 dml_uint_t qos_level_high_wm; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c1618 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml_rq_dlg_get_dlg_params()
1620 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c1707 disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)htotal in dml_rq_dlg_get_dlg_params()
1709 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c1510 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20_rq_dlg_get_dlg_params()
H A Ddisplay_rq_dlg_calc_20v2.c1511 disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal in dml20v2_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared.c11865 …disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)l->htotal * l->ref_freq_to_pix_fre… in rq_dlg_get_dlg_reg()
11922 DML2_ASSERT(disp_ttu_regs->qos_level_high_wm < (unsigned int)math_pow(2, 14)); in rq_dlg_get_dlg_reg()
H A Ddml2_core_dcn4_calcs.c12615 …disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)l->htotal * l->ref_freq_to_pix_fre… in rq_dlg_get_dlg_reg()
12672 DML2_ASSERT(disp_ttu_regs->qos_level_high_wm < (unsigned int)math_pow(2, 14)); in rq_dlg_get_dlg_reg()