Home
last modified time | relevance | path

Searched refs:ptoi_supported (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c75 .ptoi_supported = false,
220 .ptoi_supported = false,
319 .ptoi_supported = false,
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h332 unsigned int ptoi_supported; member
H A Ddisplay_mode_vba.c509 mode_lib->vba.ProgressiveToInterlaceUnitInOPP = ip->ptoi_supported; in fetch_ip_params()
595 if (dst->interlaced && !ip->ptoi_supported) { in fetch_pipe_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_translation_helper.c97 out->ptoi_supported = false; in dml2_init_ip_params()
174 out->ptoi_supported = 0; in dml2_init_ip_params()
232 out->ptoi_supported = false; in dml2_init_ip_params()
666 out->ptoi_supported = in_ip_params->ptoi_supported; in dml2_translate_ip_params()
H A Ddisplay_mode_core.c374 static void PixelClockAdjustmentForProgressiveToInterlaceUnit(struct dml_display_cfg_st *display_cfg, dml_bool_t ptoi_supported);
2706 static void PixelClockAdjustmentForProgressiveToInterlaceUnit(struct dml_display_cfg_st *display_cfg, dml_bool_t ptoi_supported) in PixelClockAdjustmentForProgressiveToInterlaceUnit()
2713 if (display_cfg->timing.Interlace[k] == 1 && ptoi_supported == true) { in PixelClockAdjustmentForProgressiveToInterlaceUnit()
6282 dml_bool_t ptoi_supported, in set_calculate_prefetch_schedule_params()
6310 if (timing->Interlace[plane_idx] && !ptoi_supported) in dml_prefetch_check()
6495 myPipe->ProgressiveToInterlaceUnitInOPP = mode_lib->ms.ip.ptoi_supported; in dml_prefetch_check()
6919 PixelClockAdjustmentForProgressiveToInterlaceUnit(&mode_lib->ms.cache_display_cfg, mode_lib->ms.ip.ptoi_supported); in dml_core_mode_support()
7501 if (mode_lib->ms.cache_display_cfg.output.OutputFormat[k] == dml_420 && mode_lib->ms.cache_display_cfg.timing.Interlace[k] == 1 && mode_lib->ms.ip.ptoi_supported == true) in dml_core_mode_support()
7846 s->SurfParameters[k].ProgressiveToInterlaceUnitInOPP = mode_lib->ms.ip.ptoi_supported; in dml_core_mode_support()
8004 mode_lib->ms.ip.ptoi_supported, in dml_core_mode_support()
2704 PixelClockAdjustmentForProgressiveToInterlaceUnit(struct dml_display_cfg_st * display_cfg,dml_bool_t ptoi_supported) PixelClockAdjustmentForProgressiveToInterlaceUnit() argument
6190 CalculateMaxVStartup(dml_uint_t plane_idx,dml_bool_t ptoi_supported,dml_uint_t vblank_nom_default_us,struct dml_timing_cfg_st * timing,dml_float_t write_back_delay_us) CalculateMaxVStartup() argument
[all...]
H A Ddisplay_mode_core_structs.h436 dml_bool_t ptoi_supported; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c64 .ptoi_supported = false,
134 .ptoi_supported = false,
H A Ddml2_core_dcn4_calcs.c430 static void PixelClockAdjustmentForProgressiveToInterlaceUnit(const struct dml2_display_cfg *display_cfg, bool ptoi_supported, double *PixelClockBackEnd) in PixelClockAdjustmentForProgressiveToInterlaceUnit()
437 if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced == 1 && ptoi_supported == true) { in PixelClockAdjustmentForProgressiveToInterlaceUnit()
3701 bool ptoi_supported, in CalculateMaxVStartup()
3716 if (timing->interlaced && !ptoi_supported) in CalculateSwathAndDETConfiguration()
7509 myPipe->ProgressiveToInterlaceUnitInOPP = mode_lib->ip.ptoi_supported; in dml_core_ms_prefetch_check()
8069 PixelClockAdjustmentForProgressiveToInterlaceUnit(display_cfg, mode_lib->ip.ptoi_supported, s->PixelClockBackEnd); in dml_core_mode_support()
8739 if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].output.output_format == dml2_420 && display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced == 1 && mode_lib->ip.ptoi_supported == true) in dml_core_mode_support()
8986 s->SurfParameters[k].ProgressiveToInterlaceUnitInOPP = mode_lib->ip.ptoi_supported; in dml_core_mode_support()
9258 bool isInterlaceTiming = (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.interlaced && !mode_lib->ip.ptoi_supported); in dml_core_mode_support()
9260 mode_lib->ip.ptoi_supported, in dml_core_mode_support()
429 PixelClockAdjustmentForProgressiveToInterlaceUnit(const struct dml2_display_cfg * display_cfg,bool ptoi_supported,double * PixelClockBackEnd) PixelClockAdjustmentForProgressiveToInterlaceUnit() argument
3674 CalculateMaxVStartup(bool ptoi_supported,unsigned int vblank_nom_default_us,const struct dml2_timing_cfg * timing,double write_back_delay_us) CalculateMaxVStartup() argument
[all...]
H A Ddml2_core_shared_types.h73 bool ptoi_supported;
72 bool ptoi_supported; global() member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c216 .ptoi_supported = 0,
620 .ptoi_supported = 0,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c78 .ptoi_supported = false,