| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a2xx_gpummu.c | 17 dma_addr_t pt_base; member 81 dma_free_attrs(mmu->dev, TABLE_SIZE + 32, gpummu->table, gpummu->pt_base, in a2xx_gpummu_destroy() 102 gpummu->table = dma_alloc_attrs(dev, TABLE_SIZE + 32, &gpummu->pt_base, in a2xx_gpummu_new() 115 void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base, in a2xx_gpummu_params() argument 118 dma_addr_t base = to_a2xx_gpummu(mmu)->pt_base; in a2xx_gpummu_params() 120 *pt_base = base; in a2xx_gpummu_params()
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| H A D | a2xx_gpu.h | 25 void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
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| H A D | a2xx_gpu.c | 115 dma_addr_t pt_base, tran_error; in a2xx_hw_init() local 119 a2xx_gpummu_params(to_msm_vm(gpu->vm)->mmu, &pt_base, &tran_error); in a2xx_hw_init() 161 gpu_write(gpu, REG_A2XX_MH_MMU_PT_BASE, pt_base); in a2xx_hw_init()
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| /linux/arch/x86/xen/ |
| H A D | mmu_pv.c | 1253 addr = xen_start_info->pt_base; in xen_pagetable_p2m_setup() 1257 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base)); in xen_pagetable_p2m_setup() 1744 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, in check_pt_base() 1747 if (*pt_base == PFN_DOWN(__pa(addr))) { in check_pt_base() 1750 (*pt_base)++; 1773 unsigned long pt_base, pt_end; in xen_setup_kernel_pagetable() 1785 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base)); in xen_setup_kernel_pagetable() 1786 pt_end = pt_base in xen_setup_kernel_pagetable() 1736 check_pt_base(unsigned long * pt_base,unsigned long * pt_end,unsigned long addr) check_pt_base() argument 1765 unsigned long pt_base, pt_end; xen_setup_kernel_pagetable() local [all...] |
| H A D | enlighten_pv.c | 1475 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, in xen_start_kernel()
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| /linux/drivers/iommu/ |
| H A D | exynos-iommu.c | 266 u32 pt_base; /* page table base address (physical) */ member 370 .pt_base = 0x14, 379 .pt_base = 0x0c, 393 .pt_base = 0x0c, 409 .pt_base = 0x800c, 475 u32 pt_base; in __sysmmu_set_ptbase() local 478 pt_base = pgd; in __sysmmu_set_ptbase() 480 pt_base = pgd >> SPAGE_ORDER; in __sysmmu_set_ptbase() 482 writel(pt_base, SYSMMU_REG(data, pt_base)); in __sysmmu_set_ptbase()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v1_0.c | 56 uint64_t pt_base; in gfxhub_v1_0_init_gart_aperture_regs() local 59 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in gfxhub_v1_0_init_gart_aperture_regs() 61 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v1_0_init_gart_aperture_regs() 63 gfxhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v1_0_init_gart_aperture_regs()
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| H A D | mmhub_v1_0.c | 70 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v1_0_init_gart_aperture_regs() local 72 mmhub_v1_0_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v1_0_init_gart_aperture_regs() 234 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v1_0_init_saw() local 239 lower_32_bits(pt_base >> 12)); in mmhub_v1_0_init_saw() 243 upper_32_bits(pt_base >> 12)); in mmhub_v1_0_init_saw()
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| H A D | gfxhub_v1_2.c | 79 uint64_t pt_base; in gfxhub_v1_2_xcc_init_gart_aperture_regs() local 83 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in gfxhub_v1_2_xcc_init_gart_aperture_regs() 85 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v1_2_xcc_init_gart_aperture_regs() 87 gfxhub_v1_2_xcc_setup_vm_pt_regs(adev, 0, pt_base, xcc_mask); in gfxhub_v1_2_xcc_init_gart_aperture_regs()
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| H A D | gfxhub_v12_1.c | 96 uint64_t pt_base; in gfxhub_v12_1_xcc_init_gart_aperture_regs() local 100 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in gfxhub_v12_1_xcc_init_gart_aperture_regs() 102 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v12_1_xcc_init_gart_aperture_regs() 104 gfxhub_v12_1_xcc_setup_vm_pt_regs(adev, 0, pt_base, xcc_mask); in gfxhub_v12_1_xcc_init_gart_aperture_regs()
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| H A D | mmhub_v4_2_0.c | 173 uint64_t pt_base; in mmhub_v4_2_0_mid_init_gart_aperture_regs() local 177 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in mmhub_v4_2_0_mid_init_gart_aperture_regs() 179 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v4_2_0_mid_init_gart_aperture_regs() 181 mmhub_v4_2_0_mid_setup_vm_pt_regs(adev, 0, pt_base, mid_mask); in mmhub_v4_2_0_mid_init_gart_aperture_regs()
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| H A D | gfxhub_v3_0_3.c | 138 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v3_0_3_init_gart_aperture_regs() local 140 gfxhub_v3_0_3_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v3_0_3_init_gart_aperture_regs()
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| H A D | gfxhub_v2_0.c | 136 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v2_0_init_gart_aperture_regs() local 138 gfxhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v2_0_init_gart_aperture_regs()
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| H A D | mmhub_v3_0_2.c | 144 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v3_0_2_init_gart_aperture_regs() local 146 mmhub_v3_0_2_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v3_0_2_init_gart_aperture_regs()
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| H A D | gfxhub_v12_0.c | 143 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v12_0_init_gart_aperture_regs() local 145 gfxhub_v12_0_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v12_0_init_gart_aperture_regs()
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| H A D | gfxhub_v3_0.c | 135 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v3_0_init_gart_aperture_regs() local 137 gfxhub_v3_0_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v3_0_init_gart_aperture_regs()
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| H A D | gfxhub_v11_5_0.c | 140 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v11_5_0_init_gart_aperture_regs() local 142 gfxhub_v11_5_0_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v11_5_0_init_gart_aperture_regs()
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| H A D | mmhub_v3_0_1.c | 152 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v3_0_1_init_gart_aperture_regs() local 154 mmhub_v3_0_1_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v3_0_1_init_gart_aperture_regs()
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| H A D | mmhub_v3_0.c | 144 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v3_0_init_gart_aperture_regs() local 146 mmhub_v3_0_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v3_0_init_gart_aperture_regs()
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| H A D | mmhub_v2_0.c | 188 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v2_0_init_gart_aperture_regs() local 190 mmhub_v2_0_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v2_0_init_gart_aperture_regs()
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| H A D | mmhub_v2_3.c | 126 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v2_3_init_gart_aperture_regs() local 128 mmhub_v2_3_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v2_3_init_gart_aperture_regs()
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| H A D | mmhub_v4_1_0.c | 137 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v4_1_0_init_gart_aperture_regs() local 139 mmhub_v4_1_0_setup_vm_pt_regs(adev, 0, pt_base); in mmhub_v4_1_0_init_gart_aperture_regs()
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| H A D | gfxhub_v2_1.c | 139 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in gfxhub_v2_1_init_gart_aperture_regs() local 141 gfxhub_v2_1_setup_vm_pt_regs(adev, 0, pt_base); in gfxhub_v2_1_init_gart_aperture_regs()
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| /linux/include/xen/interface/ |
| H A D | xen.h | 639 unsigned long pt_base; /* VIRTUAL address of page directory. */ member
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 1473 u64 pt_base; in mmhub_read_system_context() 1516 pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_read_system_context() 1526 page_table_base.high_part = upper_32_bits(pt_base); in mmhub_read_system_context() 1527 page_table_base.low_part = lower_32_bits(pt_base); in mmhub_read_system_context() 1468 u64 pt_base; mmhub_read_system_context() local
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