Home
last modified time | relevance | path

Searched refs:pstate_latency_us (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c223 .pstate_latency_us = 11.72,
231 .pstate_latency_us = 11.72,
239 .pstate_latency_us = 11.72,
247 .pstate_latency_us = 11.72,
260 .pstate_latency_us = 11.65333,
268 .pstate_latency_us = 11.65333,
276 .pstate_latency_us = 11.65333,
284 .pstate_latency_us = 11.65333,
307 dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; in calculate_wm_set_for_vlevel()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn401/
H A Ddcn401_fpu.c16 double pstate_latency_us = clk_mgr->ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn401_build_wm_range_table_fpu() local
39 clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn401_build_wm_range_table_fpu()
51 clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us; in dcn401_build_wm_range_table_fpu()
64 clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn401_build_wm_range_table_fpu()
85 …clk_mgr->bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = clk_mgr->bw_params->du… in dcn401_build_wm_range_table_fpu()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c270 .pstate_latency_us = 11.72,
278 .pstate_latency_us = 11.72,
286 .pstate_latency_us = 11.72,
294 .pstate_latency_us = 11.72,
307 .pstate_latency_us = 11.65333,
315 .pstate_latency_us = 11.65333,
323 .pstate_latency_us = 11.65333,
331 .pstate_latency_us = 11.65333,
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c348 .pstate_latency_us = 11.72,
356 .pstate_latency_us = 11.72,
364 .pstate_latency_us = 11.72,
372 .pstate_latency_us = 11.72,
385 .pstate_latency_us = 11.65333,
393 .pstate_latency_us = 11.65333,
401 .pstate_latency_us = 11.65333,
409 .pstate_latency_us = 11.65333,
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c308 .pstate_latency_us = 129.0,
316 .pstate_latency_us = 129.0,
324 .pstate_latency_us = 129.0,
332 .pstate_latency_us = 129.0,
345 .pstate_latency_us = 129.0,
353 .pstate_latency_us = 129.0,
361 .pstate_latency_us = 129.0,
369 .pstate_latency_us = 129.0,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c773 .pstate_latency_us = 11.72,
781 .pstate_latency_us = 11.72,
789 .pstate_latency_us = 11.72,
797 .pstate_latency_us = 11.72,
810 .pstate_latency_us = 11.65333,
818 .pstate_latency_us = 11.65333,
826 .pstate_latency_us = 11.65333,
834 .pstate_latency_us = 11.65333,
847 .pstate_latency_us = 11.65333,
855 .pstate_latency_us = 11.65333,
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c373 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_update_soc_for_wm_a()
417 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()
441 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()
591 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()
735 double pstate_latency_us = base->ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn3_fpu_build_wm_range_table() local
744 base->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_fpu_build_wm_range_table()
766 base->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 0; in dcn3_fpu_build_wm_range_table()
785 base->bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_fpu_build_wm_range_table()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c408 .pstate_latency_us = 11.72,
416 .pstate_latency_us = 11.72,
424 .pstate_latency_us = 11.72,
432 .pstate_latency_us = 11.72,
445 .pstate_latency_us = 11.65333,
453 .pstate_latency_us = 11.65333,
461 .pstate_latency_us = 11.65333,
469 .pstate_latency_us = 11.65333,
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h140 double pstate_latency_us; member
158 double pstate_latency_us; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c547 .pstate_latency_us = 11.72,
555 .pstate_latency_us = 11.72,
563 .pstate_latency_us = 11.72,
571 .pstate_latency_us = 11.72,
584 .pstate_latency_us = 11.65333,
592 .pstate_latency_us = 11.65333,
600 .pstate_latency_us = 11.65333,
608 .pstate_latency_us = 11.65333,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c189 double pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn32_build_wm_range_table_fpu() local
212 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()
224 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()
237 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn32_build_wm_range_table_fpu()
258 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = clk_mgr->base.bw_… in dcn32_build_wm_range_table_fpu()
2343 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()
2381 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()
2434 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()
2570 …_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()
2620 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn32_calculate_wm_and_dlg_fpu()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c459 …oc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us; in dcn31_update_soc_for_wm_a()
474 …oc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us; in dcn315_update_soc_for_wm_a()