Home
last modified time | relevance | path

Searched refs:primary (Results 1 – 25 of 436) sorted by relevance

12345678910>>...18

/linux/drivers/mfd/
H A Dwm8350-irq.c35 int primary; member
43 .primary = WM8350_OC_INT,
49 .primary = WM8350_UV_INT,
54 .primary = WM8350_UV_INT,
59 .primary = WM8350_UV_INT,
64 .primary = WM8350_UV_INT,
69 .primary = WM8350_UV_INT,
74 .primary = WM8350_UV_INT,
79 .primary = WM8350_UV_INT,
84 .primary = WM8350_UV_INT,
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dsd.c21 bool primary; member
51 return sd->primary ? dev : sd->primary_dev; in mlx5_sd_get_primary()
55 mlx5_sd_primary_get_peer(struct mlx5_core_dev *primary, int idx) in mlx5_sd_primary_get_peer() argument
60 return primary; in mlx5_sd_primary_get_peer()
62 if (idx >= mlx5_sd_get_host_buses(primary)) in mlx5_sd_primary_get_peer()
65 sd = mlx5_get_sd(primary); in mlx5_sd_primary_get_peer()
79 struct mlx5_core_dev *mlx5_sd_ch_ix_get_dev(struct mlx5_core_dev *primary, int ch_ix) in mlx5_sd_ch_ix_get_dev() argument
81 int mdev_idx = mlx5_sd_ch_ix_get_dev_ix(primary, ch_ix); in mlx5_sd_ch_ix_get_dev()
83 return mlx5_sd_primary_get_peer(primary, mdev_idx); in mlx5_sd_ch_ix_get_dev()
214 struct mlx5_core_dev *peer, *primary; in sd_register() local
[all …]
H A Dsd.h11 struct mlx5_core_dev *mlx5_sd_primary_get_peer(struct mlx5_core_dev *primary, int idx);
14 struct mlx5_core_dev *mlx5_sd_ch_ix_get_dev(struct mlx5_core_dev *primary, int ch_ix);
22 #define mlx5_sd_for_each_dev_from_to(i, primary, ix_from, to, pos) \ argument
24 (pos = mlx5_sd_primary_get_peer(primary, i)) && pos != (to); i++)
26 #define mlx5_sd_for_each_dev(i, primary, pos) \ argument
27 mlx5_sd_for_each_dev_from_to(i, primary, 0, NULL, pos)
29 #define mlx5_sd_for_each_dev_to(i, primary, to, pos) \ argument
30 mlx5_sd_for_each_dev_from_to(i, primary, 0, to, pos)
32 #define mlx5_sd_for_each_secondary(i, primary, pos) \ argument
33 mlx5_sd_for_each_dev_from_to(i, primary, 1, NULL, pos)
[all …]
/linux/sound/soc/sof/
H A Dipc4.c191 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK; in sof_ipc4_log_header()
192 type = SOF_IPC4_MSG_TYPE_GET(msg->primary); in sof_ipc4_log_header()
209 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary); in sof_ipc4_log_header()
226 text, msg->primary, msg->extension, str, str2, in sof_ipc4_log_header()
229 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary, in sof_ipc4_log_header()
234 text, msg->primary, msg->extension, str, in sof_ipc4_log_header()
237 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary, in sof_ipc4_log_header()
267 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) && in sof_ipc4_log_header()
268 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION && in sof_ipc4_log_header()
269 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) in sof_ipc4_log_header()
[all...]
H A Dsof-client-probes-ipc4.c151 msg.primary = mentry->id; in ipc4_probes_init()
152 msg.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_INIT_INSTANCE); in ipc4_probes_init()
153 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); in ipc4_probes_init()
154 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); in ipc4_probes_init()
182 msg.primary = mentry->id; in ipc4_probes_deinit()
183 msg.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_DELETE_INSTANCE); in ipc4_probes_deinit()
184 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); in ipc4_probes_deinit()
185 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); in ipc4_probes_deinit()
234 msg.primary = mentry->id; in ipc4_probes_points_info()
235 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); in ipc4_probes_points_info()
[all …]
H A Dipc4-pcm.c94 u32 primary, ipc_size; in sof_ipc4_set_multi_pipeline_state() local
107 primary = state; in sof_ipc4_set_multi_pipeline_state()
108 primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_SET_PIPELINE_STATE); in sof_ipc4_set_multi_pipeline_state()
109 primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); in sof_ipc4_set_multi_pipeline_state()
110 primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_FW_GEN_MSG); in sof_ipc4_set_multi_pipeline_state()
111 msg.primary = primary; in sof_ipc4_set_multi_pipeline_state()
127 u32 primary; in sof_ipc4_set_pipeline_state() local
132 primary = state; in sof_ipc4_set_pipeline_state()
133 primary |= SOF_IPC4_GLB_PIPE_STATE_ID(instance_id); in sof_ipc4_set_pipeline_state()
134 primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_SET_PIPELINE_STATE); in sof_ipc4_set_pipeline_state()
[all …]
/linux/drivers/gpu/drm/v3d/
H A Dv3d_trace.h26 __entry->dev = dev->primary->index;
52 __entry->dev = dev->primary->index;
78 __entry->dev = dev->primary->index;
98 __entry->dev = dev->primary->index;
118 __entry->dev = dev->primary->index;
138 __entry->dev = dev->primary->index;
157 __entry->dev = dev->primary->index;
177 __entry->dev = dev->primary->index;
197 __entry->dev = dev->primary->index;
219 __entry->dev = dev->primary->index;
[all …]
/linux/drivers/gpu/drm/fsl-dcu/
H A Dfsl_dcu_drm_plane.c209 struct drm_plane *primary; in fsl_dcu_drm_primary_create_plane() local
212 primary = kzalloc_obj(*primary); in fsl_dcu_drm_primary_create_plane()
213 if (!primary) { in fsl_dcu_drm_primary_create_plane()
219 ret = drm_universal_plane_init(dev, primary, 0, in fsl_dcu_drm_primary_create_plane()
225 kfree(primary); in fsl_dcu_drm_primary_create_plane()
226 primary = NULL; in fsl_dcu_drm_primary_create_plane()
228 drm_plane_helper_add(primary, &fsl_dcu_drm_plane_helper_funcs); in fsl_dcu_drm_primary_create_plane()
230 return primary; in fsl_dcu_drm_primary_create_plane()
H A Dfsl_dcu_drm_crtc.c172 struct drm_plane *primary; in fsl_dcu_drm_crtc_create() local
178 primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm); in fsl_dcu_drm_crtc_create()
179 if (!primary) in fsl_dcu_drm_crtc_create()
182 ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL, in fsl_dcu_drm_crtc_create()
185 primary->funcs->destroy(primary); in fsl_dcu_drm_crtc_create()
/linux/drivers/gpu/drm/
H A Ddrm_crtc.c255 struct drm_plane *primary, in __drm_crtc_init_with_planes() argument
263 WARN_ON(primary && primary->type != DRM_PLANE_TYPE_PRIMARY); in __drm_crtc_init_with_planes()
305 crtc->primary = primary; in __drm_crtc_init_with_planes()
307 if (primary && !primary->possible_crtcs) in __drm_crtc_init_with_planes()
308 primary->possible_crtcs = drm_crtc_mask(crtc); in __drm_crtc_init_with_planes()
361 struct drm_plane *primary, in drm_crtc_init_with_planes() argument
372 ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs, in drm_crtc_init_with_planes()
391 struct drm_plane *primary, in __drmm_crtc_init_with_planes() argument
401 ret = __drm_crtc_init_with_planes(dev, crtc, primary, cursor, funcs, in __drmm_crtc_init_with_planes()
443 struct drm_plane *primary, in drmm_crtc_init_with_planes() argument
[all …]
/linux/Documentation/virt/
H A Dne_overview.rst16 application then runs in a separate VM than the primary VM, namely an enclave.
24 carved out of the primary VM. Each enclave is mapped to a process running in the
25 primary VM, that communicates with the NE kernel driver via an ioctl interface.
29 1. An enclave abstraction process - a user space process running in the primary
33 There is a NE emulated PCI device exposed to the primary VM. The driver for this
39 hypervisor running on the host where the primary VM is running. The Nitro
42 2. The enclave itself - a VM running on the same host as the primary VM that
43 spawned it. Memory and CPUs are carved out of the primary VM and are dedicated
46 The memory regions carved out of the primary VM and given to an enclave need to
53 available for the primary VM. A CPU pool has to be set for NE purposes by an
[all …]
/linux/drivers/mtd/chips/
H A Dgen_probe.c199 int primary) in cfi_cmdset_unknown() argument
202 __u16 type = primary?cfi->cfiq->P_ID:cfi->cfiq->A_ID; in cfi_cmdset_unknown()
221 mtd = (*probe_function)(map, primary); in cfi_cmdset_unknown()
232 static struct mtd_info *check_cmd_set(struct map_info *map, int primary) in check_cmd_set() argument
235 __u16 type = primary?cfi->cfiq->P_ID:cfi->cfiq->A_ID; in check_cmd_set()
247 return cfi_cmdset_0001(map, primary); in check_cmd_set()
253 return cfi_cmdset_0002(map, primary); in check_cmd_set()
257 return cfi_cmdset_0020(map, primary); in check_cmd_set()
260 return cfi_cmdset_unknown(map, primary); in check_cmd_set()
/linux/sound/soc/sof/intel/
H A Dhda-ipc.c77 static inline bool hda_dsp_ipc4_pm_msg(u32 primary) in hda_dsp_ipc4_pm_msg() argument
80 if (SOF_IPC4_MSG_IS_MODULE_MSG(primary) != SOF_IPC4_MODULE_MSG) in hda_dsp_ipc4_pm_msg()
83 if (SOF_IPC4_MSG_TYPE_GET(primary) == SOF_IPC4_MOD_SET_DX || in hda_dsp_ipc4_pm_msg()
84 SOF_IPC4_MSG_TYPE_GET(primary) == SOF_IPC4_MOD_SET_D0IX) in hda_dsp_ipc4_pm_msg()
96 if (hda_dsp_ipc4_pm_msg(msg_data->primary)) in hda_dsp_ipc4_schedule_d0i3_work()
123 msg_data->primary | HDA_DSP_REG_HIPCI_BUSY); in hda_dsp_ipc4_send_msg()
192 u32 primary = hipct & HDA_DSP_REG_HIPCT_MSG_MASK; in hda_dsp_ipc4_irq_thread() local
199 if (primary & SOF_IPC4_MSG_DIR_MASK) { in hda_dsp_ipc4_irq_thread()
204 data->primary = primary; in hda_dsp_ipc4_irq_thread()
[all...]
H A Dcnl.c61 u32 primary = hipctdr & CNL_DSP_REG_HIPCTDR_MSG_MASK; in cnl_ipc4_irq_thread() local
64 if (primary & SOF_IPC4_MSG_DIR_MASK) { in cnl_ipc4_irq_thread()
69 data->primary = primary; in cnl_ipc4_irq_thread()
75 snd_sof_ipc_reply(sdev, data->primary); in cnl_ipc4_irq_thread()
79 primary, extension); in cnl_ipc4_irq_thread()
83 notification_data.primary = primary; in cnl_ipc4_irq_thread()
276 msg_data->primary | CNL_DSP_REG_HIPCIDR_BUSY); in cnl_ipc4_send_msg()
H A Dhda-sdw-bpt.c64 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_GLB_CHAIN_DMA); in chain_dma_trigger()
65 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); in chain_dma_trigger()
66 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_FW_GEN_MSG); in chain_dma_trigger()
73 msg.primary |= SOF_IPC4_GLB_CHAIN_DMA_HOST_ID(dma_id); in chain_dma_trigger()
74 msg.primary |= SOF_IPC4_GLB_CHAIN_DMA_LINK_ID(dma_id); in chain_dma_trigger()
85 msg.primary |= SOF_IPC4_GLB_CHAIN_DMA_ALLOCATE_MASK; in chain_dma_trigger()
88 msg.primary |= SOF_IPC4_GLB_CHAIN_DMA_ENABLE_MASK; in chain_dma_trigger()
/linux/arch/um/drivers/
H A Dchan_kern.c22 static int not_configged_open(int input, int output, int primary, void *data, in not_configged_open() argument
99 else fd = (*chan->ops->open)(chan->input, chan->output, chan->primary, in open_one_chan()
153 if (chan->primary) in open_chan()
161 if (chan && chan->primary && chan->ops->winch) in chan_enable_winch()
185 if (chan->primary) in enable_chan()
298 if (chan->primary) { in write_chan()
312 if (chan->primary) in console_write_chan()
336 if (chan && chan->primary) { in chan_window_size()
343 if (chan && chan->primary) { in chan_window_size()
361 if (chan->primary && chan->output) in free_one_chan()
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-colorimetry.rst66 primary component c of the mastering display in increments of 0.00002.
69 primary, c equal to 1 corresponds to Blue primary and c equal to 2
70 corresponds to the Red color primary.
74 primary component c of the mastering display in increments of 0.00002.
77 primary, c equal to 1 corresponds to Blue primary and c equal to 2
78 corresponds to Red color primary.
/linux/drivers/gpu/drm/vc4/
H A Dvc4_trace.h28 __entry->dev = dev->primary->index;
47 __entry->dev = dev->primary->index;
67 __entry->dev = dev->primary->index;
95 __entry->dev = dev->primary->index;
121 __entry->dev = dev->primary->index;
141 __entry->dev = dev->primary->index;
/linux/drivers/sh/intc/
H A Dcore.c80 unsigned int data[2], primary; in intc_register_irq() local
98 primary = 0; in intc_register_irq()
100 primary = 1; in intc_register_irq()
109 if (!data[primary]) in intc_register_irq()
110 primary ^= 1; in intc_register_irq()
112 BUG_ON(!data[primary]); /* must have primary masking method */ in intc_register_irq()
119 irq_set_chip_data(irq, (void *)data[primary]); in intc_register_irq()
127 if (data[!primary]) in intc_register_irq()
128 _intc_enable(irq_data, data[!primary]); in intc_register_irq()
136 if (primary) { in intc_register_irq()
/linux/Documentation/security/tpm/
H A Dtpm-security.rst88 The mechanism chosen for the Linux Kernel is to derive the primary
102 certifying the null seed primary with that key) which is too complex
103 to run within the kernel, so we keep a copy of the null primary key
106 that if the null primary key certifies correctly, you know all your
114 In the current null primary scenario, the TPM must be completely
137 kernel must be created using the null primary key as the salt key
139 derivation. Thus, the kernel creates the null primary key once (as a
150 For every in-kernel operation we use null primary salted HMAC to
159 primary endorsement key. This document assumes that the Elliptic
163 The first step in the certification is primary creation using the
[all …]
/linux/drivers/gpu/drm/kmb/
H A Dkmb_crtc.c232 struct kmb_plane *primary; in kmb_setup_crtc() local
235 primary = kmb_plane_init(drm); in kmb_setup_crtc()
236 if (IS_ERR(primary)) in kmb_setup_crtc()
237 return PTR_ERR(primary); in kmb_setup_crtc()
239 ret = drm_crtc_init_with_planes(drm, &kmb->crtc, &primary->base_plane, in kmb_setup_crtc()
242 kmb_plane_destroy(&primary->base_plane); in kmb_setup_crtc()
/linux/arch/powerpc/kvm/
H A Dbook3s_32_mmu.c95 bool primary) in kvmppc_mmu_book3s_32_get_pteg() argument
105 if (!primary) in kvmppc_mmu_book3s_32_get_pteg()
121 static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary) in kvmppc_mmu_book3s_32_get_ptem() argument
124 (primary ? 0 : 0x40) | 0x80000000; in kvmppc_mmu_book3s_32_get_ptem()
184 bool iswrite, bool primary) in kvmppc_mmu_book3s_32_xlate_pte() argument
201 ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary); in kvmppc_mmu_book3s_32_xlate_pte()
207 ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary); in kvmppc_mmu_book3s_32_xlate_pte()
/linux/drivers/gpu/drm/i915/
H A Di915_trace.h49 __entry->dev = i915->drm.primary->index;
209 __entry->dev = vm->i915->drm.primary->index;
235 __entry->dev = vm->i915->drm.primary->index;
259 __entry->dev = vm->i915->drm.primary->index;
280 __entry->dev = rq->i915->drm.primary->index;
307 __entry->dev = rq->i915->drm.primary->index;
356 __entry->dev = rq->i915->drm.primary->index;
385 __entry->dev = rq->i915->drm.primary->index;
626 __entry->dev = rq->i915->drm.primary->index;
666 __entry->dev = vm->i915->drm.primary->index;
[all …]
/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_ldu.c101 fb = crtc->primary->state->fb; in vmw_ldu_commit_list()
110 fb = entry->base.crtc.primary->state->fb; in vmw_ldu_commit_list()
414 struct drm_plane *primary; in vmw_ldu_init() local
427 primary = &ldu->base.primary; in vmw_ldu_init()
443 ret = drm_universal_plane_init(dev, primary, in vmw_ldu_init()
453 drm_plane_helper_add(primary, &vmw_ldu_primary_plane_helper_funcs); in vmw_ldu_init()
467 drm_plane_cleanup(&ldu->base.primary); in vmw_ldu_init()
500 ret = drm_crtc_init_with_planes(dev, crtc, primary, in vmw_ldu_init()
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dpamu.txt57 - fsl,primary-cache-geometry
59 Two cells that specify the geometry of the primary PAMU
107 fsl,primary-cache-geometry = <32 1>;
113 fsl,primary-cache-geometry = <32 1>;
119 fsl,primary-cache-geometry = <32 1>;
125 fsl,primary-cache-geometry = <32 1>;
131 fsl,primary-cache-geometry = <32 1>;

12345678910>>...18