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Searched refs:pre_div (Results 1 – 25 of 26) sorted by relevance

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/linux/drivers/clk/sunxi/
H A Dclk-sun9i-cpus.c72 u8 div, pre_div = 1; in sun9i_a80_cpus_clk_round() local
87 pre_div = div; in sun9i_a80_cpus_clk_round()
90 pre_div = DIV_ROUND_UP(div, 2); in sun9i_a80_cpus_clk_round()
93 pre_div = DIV_ROUND_UP(div, 3); in sun9i_a80_cpus_clk_round()
96 pre_div = DIV_ROUND_UP(div, 4); in sun9i_a80_cpus_clk_round()
104 *pre_divp = pre_div - 1; in sun9i_a80_cpus_clk_round()
107 return parent_rate / pre_div / div; in sun9i_a80_cpus_clk_round()
154 u8 div, pre_div, parent; in sun9i_a80_cpus_clk_set_rate() local
163 sun9i_a80_cpus_clk_round(rate, &div, &pre_div, parent, parent_rate); in sun9i_a80_cpus_clk_set_rate()
166 reg = SUN9I_CPUS_PLL4_DIV_SET(reg, pre_div); in sun9i_a80_cpus_clk_set_rate()
/linux/drivers/clk/qcom/
H A Dclk-rcg2.c161 f->pre_div *= 2; in convert_to_reg_val()
162 f->pre_div -= 1; in convert_to_reg_val()
263 if (f->pre_div) { in _freq_tbl_determine_rate()
267 rate *= f->pre_div + 1; in _freq_tbl_determine_rate()
315 rate = calc_rate(parent_rate, conf->n, conf->m, conf->n, conf->pre_div); in __clk_rcg2_select_conf()
370 if (conf->pre_div) { in _freq_tbl_fm_determine_rate()
374 rate *= conf->pre_div + 1; in _freq_tbl_fm_determine_rate()
427 static inline void clk_rcg2_split_div(int multiplier, unsigned int *pre_div, in clk_rcg2_split_div() argument
430 *n = mult_frac(multiplier * *n, *pre_div, pre_div_max); in clk_rcg2_split_div()
431 *pre_div = pre_div_max; in clk_rcg2_split_div()
[all …]
H A Dclk-rcg.c113 static u32 ns_to_pre_div(struct pre_div *p, u32 ns) in ns_to_pre_div()
120 static u32 pre_div_to_ns(struct pre_div *p, u8 pre_div, u32 ns) in pre_div_to_ns() argument
128 ns |= pre_div << p->pre_div_shift; in pre_div_to_ns()
203 struct pre_div *p; in configure_bank()
267 ns = pre_div_to_ns(p, f->pre_div - 1, ns); in configure_bank()
312 f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; in clk_dyn_rcg_set_parent()
326 calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 pre_div) in calc_rate() argument
328 if (pre_div) in calc_rate()
329 rate /= pre_div + 1; in calc_rate()
345 u32 pre_div, m = 0, n = 0, ns, md, mode = 0; in clk_rcg_recalc_rate() local
[all …]
/linux/drivers/clk/bcm/
H A Dclk-kona-setup.c64 div = &peri->pre_div; in clk_requires_trigger()
130 div = &peri->pre_div; in peri_clk_data_offsets_valid()
364 struct bcm_clk_div *pre_div; in kona_dividers_valid() local
369 if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div)) in kona_dividers_valid()
373 pre_div = &peri->pre_div; in kona_dividers_valid()
374 if (divider_is_fixed(div) || divider_is_fixed(pre_div)) in kona_dividers_valid()
379 return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; in kona_dividers_valid()
400 struct bcm_clk_div *pre_div; in peri_clk_data_valid() local
442 pre_div = &peri->pre_div; in peri_clk_data_valid()
447 if (divider_exists(pre_div)) in peri_clk_data_valid()
[all …]
H A Dclk-kona.c669 struct bcm_clk_div *div, struct bcm_clk_div *pre_div, in clk_recalc_rate() argument
691 if (pre_div && divider_exists(pre_div)) { in clk_recalc_rate()
694 scaled_rate = scale_rate(pre_div, parent_rate); in clk_recalc_rate()
696 scaled_div = divider_read_scaled(ccu, pre_div); in clk_recalc_rate()
724 struct bcm_clk_div *pre_div, in round_rate() argument
749 if (divider_exists(pre_div)) { in round_rate()
753 scaled_rate = scale_rate(pre_div, parent_rate); in round_rate()
755 scaled_pre_div = divider_read_scaled(ccu, pre_div); in round_rate()
979 return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div, in kona_peri_clk_recalc_rate()
993 return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div, in kona_peri_clk_round_rate()
[all …]
H A Dclk-bcm281xx.c170 .pre_div = FIXED_DIVIDER(2),
H A Dclk-kona.h387 struct bcm_clk_div pre_div; member
/linux/drivers/clk/
H A Dclk-sparx5.c53 u8 pre_div; member
65 int divt = sel_rates[conf->rot_sel] * (1 + conf->pre_div); in s5_calc_freq()
91 conf->pre_div = i; in s5_search_fractional()
183 val |= FIELD_PREP(PLL_PRE_DIV, conf.pre_div); in s5_pll_set_rate()
203 conf.pre_div = FIELD_GET(PLL_PRE_DIV, val); in s5_pll_recalc_rate()
/linux/drivers/clk/spacemit/
H A Dccu_ddn.h21 unsigned int pre_div; member
38 .pre_div = _pre_div, \
/linux/drivers/clk/sophgo/
H A Dclk-cv18xx-pll.c58 for_each_pll_limit_range(pre, &limit->pre_div) { in ipll_find_rate()
250 unsigned long pre_div, in fpll_find_synthesizer() argument
262 trate = fpll_calc_rate(parent, pre_div, div, post_div, in fpll_find_synthesizer()
297 for_each_pll_limit_range(pre, &limit->pre_div) { in fpll_find_rate()
H A Dclk-cv18xx-pll.h15 } pre_div, div, post_div, ictrl, mode; member
/linux/sound/soc/codecs/
H A Drt5514.c756 int pre_div, bclk_ms, frame_size; in rt5514_hw_params()
760 pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck); in rt5514_hw_params()
761 if (pre_div < 0) { in rt5514_hw_params()
777 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt5514_hw_params()
778 bclk_ms, pre_div, dai->id); in rt5514_hw_params()
800 (pre_div + 1) << RT5514_CLK_AD_ANA1_SEL_SFT); in rt5514_hw_params()
803 pre_div << RT5514_CLK_SYS_DIV_OUT_SFT | in rt5514_hw_params()
804 pre_div << RT5514_SEL_ADC_OSR_SFT); in rt5514_hw_params()
755 int pre_div, bclk_ms, frame_size; rt5514_hw_params() local
H A Dwm8974.c263 unsigned int pre_div:1; member
284 pll_div->pre_div = 1; in pll_factors()
287 pll_div->pre_div = 0; in pll_factors()
332 snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n); in wm8974_set_dai_pll()
H A Drt5660.c839 int pre_div, bclk_ms, frame_size; in rt5660_hw_params() local
842 pre_div = rl6231_get_clk_info(rt5660->sysclk, rt5660->lrck[dai->id]); in rt5660_hw_params()
843 if (pre_div < 0) { in rt5660_hw_params()
864 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt5660_hw_params()
865 bclk_ms, pre_div, dai->id); in rt5660_hw_params()
887 pre_div << RT5660_I2S_PD1_SFT; in rt5660_hw_params()
H A Drt1011.c1575 int pre_div, bclk_ms, frame_size; in rt1011_hw_params() local
1578 pre_div = rt1011_get_clk_info(rt1011->sysclk, rt1011->lrck); in rt1011_hw_params()
1579 if (pre_div < 0) { in rt1011_hw_params()
1585 pre_div = 0; in rt1011_hw_params()
1598 bclk_ms, pre_div, dai->id); in rt1011_hw_params()
1601 rt1011->lrck, pre_div, dai->id); in rt1011_hw_params()
1641 val_clk = pre_div << RT1011_FS_SYS_DIV_SFT; in rt1011_hw_params()
H A Drt5682.c2138 int pre_div, frame_size; in rt5682_hw_params() local
2141 pre_div = rl6231_get_clk_info(rt5682->sysclk, rt5682->lrck[dai->id]); in rt5682_hw_params()
2150 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5682_hw_params()
2151 rt5682->lrck[dai->id], pre_div, dai->id); in rt5682_hw_params()
2184 pre_div << RT5682_I2S_M_DIV_SFT | in rt5682_hw_params()
2202 pre_div << RT5682_I2S2_M_PD_SFT); in rt5682_hw_params()
2710 int pre_div; in rt5682_wclk_set_rate() local
2748 pre_div = rl6231_get_clk_info(rt5682->sysclk, rate); in rt5682_wclk_set_rate()
2752 pre_div << RT5682_I2S_M_DIV_SFT | in rt5682_wclk_set_rate()
H A Drt5665.c4011 int pre_div, frame_size; in rt5665_hw_params() local
4014 pre_div = rl6231_get_clk_info(rt5665->sysclk, rt5665->lrck[dai->id]); in rt5665_hw_params()
4015 if (pre_div < 0) { in rt5665_hw_params()
4021 pre_div = 1; in rt5665_hw_params()
4029 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5665_hw_params()
4030 rt5665->lrck[dai->id], pre_div, dai->id); in rt5665_hw_params()
4059 val_clk = pre_div << RT5665_I2S_PD1_SFT; in rt5665_hw_params()
4067 val_clk = pre_div << RT5665_I2S_PD2_SFT; in rt5665_hw_params()
4074 val_clk = pre_div << RT5665_I2S_PD3_SFT; in rt5665_hw_params()
4106 RT5665_I2S2_M_PD_MASK, pre_div << RT5665_I2S2_M_PD_SF in rt5665_hw_params()
[all...]
H A Drt5668.c1881 int pre_div, frame_size; in rt5668_hw_params()
1884 pre_div = rl6231_get_clk_info(rt5668->sysclk, rt5668->lrck[dai->id]); in rt5668_hw_params()
1893 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n", in rt5668_hw_params()
1894 rt5668->lrck[dai->id], pre_div, dai->id); in rt5668_hw_params()
1926 pre_div << RT5668_I2S_M_DIV_SFT); in rt5668_hw_params()
1943 pre_div << RT5668_I2S2_M_PD_SFT); in rt5668_hw_params()
1882 int pre_div, frame_size; rt5668_hw_params() local
H A Drt5640.c1702 int dai_sel, pre_div, bclk_ms, frame_size; in rt5640_hw_params() local
1705 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]); in rt5640_hw_params()
1706 if (pre_div < 0) { in rt5640_hw_params()
1724 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt5640_hw_params()
1725 bclk_ms, pre_div, dai->id); in rt5640_hw_params()
1751 pre_div << RT5640_I2S_PD1_SFT; in rt5640_hw_params()
1759 pre_div << RT5640_I2S_PD2_SFT; in rt5640_hw_params()
H A Drt5677.c4293 int pre_div, bclk_ms, frame_size; in rt5677_hw_params() local
4296 pre_div = rl6231_get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]); in rt5677_hw_params()
4297 if (pre_div < 0) { in rt5677_hw_params()
4312 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt5677_hw_params()
4313 bclk_ms, pre_div, dai->id); in rt5677_hw_params()
4334 val_clk = pre_div << RT5677_I2S_PD1_SFT; in rt5677_hw_params()
4342 val_clk = pre_div << RT5677_I2S_PD2_SFT; in rt5677_hw_params()
4351 pre_div << RT5677_I2S_PD3_SFT; in rt5677_hw_params()
4360 pre_div << RT5677_I2S_PD4_SFT; in rt5677_hw_params()
H A Drt5645.c2758 int pre_div, bclk_ms, frame_size; in rt5645_hw_params() local
2761 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]); in rt5645_hw_params()
2762 if (pre_div < 0) { in rt5645_hw_params()
2786 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", in rt5645_hw_params()
2787 bclk_ms, pre_div, dai->id); in rt5645_hw_params()
2808 val_clk = pre_div << RT5645_I2S_PD1_SFT; in rt5645_hw_params()
2816 pre_div << RT5645_I2S_PD2_SFT; in rt5645_hw_params()
H A Drt5682s.c1282 int pre_div; in rt5682s_set_i2s() local
1303 pre_div = get_clk_info(rt5682s->sysclk, rt5682s->lrck[id]); in rt5682s_set_i2s()
1304 if (pre_div < 0) { in rt5682s_set_i2s()
1305 dev_err(component->dev, "get pre_div failed\n"); in rt5682s_set_i2s()
1309 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d master\n", in rt5682s_set_i2s()
1310 rt5682s->lrck[id], pre_div, id); in rt5682s_set_i2s()
1311 snd_soc_component_update_bits(component, c_reg, c_mask, pre_div << c_sft); in rt5682s_set_i2s()
/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1547 unsigned int pre_div; in ti_sn_pwm_apply() local
1624 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1626 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1640 (u64)NSEC_PER_SEC * pre_div); in ti_sn_pwm_apply()
1644 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1676 unsigned int pre_div; in ti_sn_pwm_get_state() local
1693 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1703 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1705 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
/linux/drivers/atm/
H A Deni.c1253 static const int pre_div[] = { 4,16,128,2048 }; in comp_tx() local
1262 if (TS_CLOCK/pre_div[*pre]/64 <= *pcr) break; in comp_tx()
1263 div = pre_div[*pre]**pcr; in comp_tx()
1272 if (TS_CLOCK/pre_div[*pre]/64 > -*pcr) break; in comp_tx()
1274 div = pre_div[*pre]*-*pcr; in comp_tx()
1281 *pcr = TS_CLOCK/pre_div[*pre]/(*res+1); in comp_tx()
/linux/drivers/leds/rgb/
H A Dleds-qcom-lpg.c1264 unsigned int pre_div; in lpg_pwm_get_state() local
1288 pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)]; in lpg_pwm_get_state()
1296 pre_div * (1 << m), refclk); in lpg_pwm_get_state()
1297 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk); in lpg_pwm_get_state()

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