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Searched refs:port_clock (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_alpm.c52 return SILENCE_PERIOD_TIME * intel_dp_link_symbol_clock(crtc_state->port_clock) / in get_silence_period_symbols()
59 if (crtc_state->port_clock < 540000) { in get_lfps_cycle_min_max_time()
80 return get_lfps_cycle_time(crtc_state) * crtc_state->port_clock / 1000 / in get_lfps_half_cycle_clocks()
109 int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock; in _lnl_compute_aux_less_wake_time()
H A Dintel_pmdemand.h28 enum pipe pipe, int port_clock);
H A Dg4x_dp.c83 if (pipe_config->port_clock == divisor[i].dot) { in g4x_dp_set_clock()
102 pipe_config->port_clock, in intel_dp_prepare()
205 pipe_config->port_clock); in ilk_edp_pll_on()
209 if (pipe_config->port_clock == 162000) in ilk_edp_pll_on()
395 pipe_config->port_clock = 162000; in intel_dp_get_config()
397 pipe_config->port_clock = 270000; in intel_dp_get_config()
401 intel_dotclock_calculate(pipe_config->port_clock, in intel_dp_get_config()
H A Dintel_dp.c131 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
1667 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, in intel_dp_compute_rate() argument
1673 if (display->platform.g4x && port_clock == 268800) in intel_dp_compute_rate()
1674 port_clock = 270000; in intel_dp_compute_rate()
1680 intel_dp_rate_select(intel_dp, port_clock); in intel_dp_compute_rate()
1682 *link_bw = drm_dp_link_rate_to_bw_code(port_clock); in intel_dp_compute_rate()
1868 pipe_config->port_clock = link_rate; in intel_dp_compute_link_config_wide()
2092 pipe_config->port_clock = link_rate; in dsc_compute_link_config()
2306 pipe_config->port_clock = limits->max_rate; in dsc_compute_compressed_bpp()
2829 return intel_dp_link_required(crtc_state->port_clock, crtc_state->lane_count, in intel_dp_config_required_rate()
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H A Dintel_tv.c1126 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1153 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); in intel_tv_get_config()
1219 pipe_config->port_clock = tv_mode->clock; in intel_tv_compute_config()
1227 intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock); in intel_tv_compute_config()
H A Dintel_dvo.c182 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
H A Dintel_lvds.c154 crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock; in intel_lvds_get_config()
H A Dintel_display.c3165 pipe_config->port_clock / pipe_config->pixel_multiplier; in i9xx_get_pipe_config()
4114 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in intel_crtc_dotclock()
4117 dotclock = DIV_ROUND_CLOSEST(pipe_config->port_clock * 24, in intel_crtc_dotclock()
4120 dotclock = pipe_config->port_clock; in intel_crtc_dotclock()
4771 crtc_state->port_clock = 0; in intel_modeset_pipe_config()
4802 if (!crtc_state->port_clock) in intel_modeset_pipe_config()
4803 crtc_state->port_clock = crtc_state->hw.adjusted_mode.crtc_clock in intel_modeset_pipe_config()
5416 PIPE_CONF_CHECK_I(port_clock); in intel_pipe_config_compare()
H A Dintel_display_types.h1199 int port_clock; member
H A Dicl_dsi.c1700 pipe_config->port_clock = afe_clk(encoder, pipe_config) / 5; in gen11_dsi_compute_config()
H A Dintel_sdvo.c1751 dotclock = pipe_config->port_clock; in intel_sdvo_get_config()
H A Dintel_cdclk.c3239 switch (crtc_state->port_clock / 2) { in skl_dpll0_vco()
H A Dintel_psr.c1405 req_ns = ((60 / crtc_state->lane_count) + 11) * 1000 / (crtc_state->port_clock / 1000); in _compute_psr2_sdp_prior_scanline_indication()