/linux/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_gen4_pfvf.c | 38 static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in adf_gen4_enable_vf2pf_interrupts() argument 42 val = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK) & ~vf_mask; in adf_gen4_enable_vf2pf_interrupts() 43 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val); in adf_gen4_enable_vf2pf_interrupts() 46 static void adf_gen4_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen4_disable_all_vf2pf_interrupts() argument 48 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_all_vf2pf_interrupts() 51 static u32 adf_gen4_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen4_disable_pending_vf2pf_interrupts() argument 56 sources = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_SOU); in adf_gen4_disable_pending_vf2pf_interrupts() 61 disabled = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts() 75 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts() 76 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, disabled | sources); in adf_gen4_disable_pending_vf2pf_interrupts() [all …]
|
H A D | adf_gen2_hw_data.c | 29 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen2_enable_error_correction() local 36 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i)); in adf_gen2_enable_error_correction() 38 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i), val); in adf_gen2_enable_error_correction() 39 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i)); in adf_gen2_enable_error_correction() 41 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i), val); in adf_gen2_enable_error_correction() 46 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_UERRSSMSH(i)); in adf_gen2_enable_error_correction() 48 ADF_CSR_WR(pmisc_addr, ADF_GEN2_UERRSSMSH(i), val); in adf_gen2_enable_error_correction() 49 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_CERRSSMSH(i)); in adf_gen2_enable_error_correction() 51 ADF_CSR_WR(pmisc_addr, ADF_GEN2_CERRSSMSH(i), val); in adf_gen2_enable_error_correction() 59 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen2_cfg_iov_thds() local [all …]
|
H A D | adf_gen2_pfvf.c | 54 static void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in adf_gen2_enable_vf2pf_interrupts() argument 58 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_enable_vf2pf_interrupts() 60 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_enable_vf2pf_interrupts() 64 static void adf_gen2_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen2_disable_all_vf2pf_interrupts() argument 67 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_disable_all_vf2pf_interrupts() 69 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_disable_all_vf2pf_interrupts() 72 static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen2_disable_pending_vf2pf_interrupts() argument 78 errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3); in adf_gen2_disable_pending_vf2pf_interrupts() 85 errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3); in adf_gen2_disable_pending_vf2pf_interrupts() 101 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); in adf_gen2_disable_pending_vf2pf_interrupts() [all …]
|
H A D | adf_isr.c | 61 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_enable_vf2pf_interrupts() local 65 GET_PFVF_OPS(accel_dev)->enable_vf2pf_interrupts(pmisc_addr, vf_mask); in adf_enable_vf2pf_interrupts() 71 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_all_vf2pf_interrupts() local 75 GET_PFVF_OPS(accel_dev)->disable_all_vf2pf_interrupts(pmisc_addr); in adf_disable_all_vf2pf_interrupts() 81 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_pending_vf2pf_interrupts() local 85 pending = GET_PFVF_OPS(accel_dev)->disable_pending_vf2pf_interrupts(pmisc_addr); in adf_disable_pending_vf2pf_interrupts()
|
H A D | adf_vf_isr.c | 34 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_enable_pf2vf_interrupts() local 36 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x0); in adf_enable_pf2vf_interrupts() 41 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_pf2vf_interrupts() local 43 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x2); in adf_disable_pf2vf_interrupts()
|
H A D | adf_rl.c | 296 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_rps_to_leaf() local 304 ADF_CSR_WR(pmisc_addr, offset, node_id); in assign_rps_to_leaf() 312 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_leaf_to_cluster() local 319 ADF_CSR_WR(pmisc_addr, offset, parent_id); in assign_leaf_to_cluster() 326 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_cluster_to_root() local 333 ADF_CSR_WR(pmisc_addr, offset, parent_id); in assign_cluster_to_root() 1119 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_rl_start() local 1134 ADF_CSR_WR(pmisc_addr, rl_hw_data->pciin_tb_offset, in adf_rl_start() 1136 ADF_CSR_WR(pmisc_addr, rl_hw_data->pciout_tb_offset, in adf_rl_start()
|
H A D | adf_admin.c | 542 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_init_admin_comms() local 576 mailbox = pmisc_addr + mailbox_offset; in adf_init_admin_comms() 581 ADF_CSR_WR(pmisc_addr, adminmsg_u, upper_32_bits(reg_val)); in adf_init_admin_comms() 582 ADF_CSR_WR(pmisc_addr, adminmsg_l, lower_32_bits(reg_val)); in adf_init_admin_comms()
|
H A D | adf_gen4_hw_data.c | 146 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen4_set_ssm_wdtimer() local 162 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTL_OFFSET, ssm_wdt_low); in adf_gen4_set_ssm_wdtimer() 163 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTH_OFFSET, ssm_wdt_high); in adf_gen4_set_ssm_wdtimer() 165 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ssm_wdt_pke_low); in adf_gen4_set_ssm_wdtimer() 166 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEH_OFFSET, ssm_wdt_pke_high); in adf_gen4_set_ssm_wdtimer()
|
H A D | adf_accel_devices.h | 249 void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask); 250 void (*disable_all_vf2pf_interrupts)(void __iomem *pmisc_addr); 251 u32 (*disable_pending_vf2pf_interrupts)(void __iomem *pmisc_addr);
|
/linux/drivers/crypto/intel/qat/qat_dh895xcc/ |
H A D | adf_dh895xcc_hw_data.c | 125 static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in enable_vf2pf_interrupts() argument 129 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in enable_vf2pf_interrupts() 131 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in enable_vf2pf_interrupts() 136 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in enable_vf2pf_interrupts() 138 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in enable_vf2pf_interrupts() 142 static void disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in disable_all_vf2pf_interrupts() argument 147 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in disable_all_vf2pf_interrupts() 149 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in disable_all_vf2pf_interrupts() 152 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in disable_all_vf2pf_interrupts() 154 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in disable_all_vf2pf_interrupts() [all …]
|