| /linux/drivers/clk/samsung/ |
| H A D | clk-exynosautov920.c | 993 .pll_clks = top_pll_clks,
1123 .pll_clks = cpucl0_pll_clks,
1225 .pll_clks = cpucl1_pll_clks,
1327 .pll_clks = cpucl2_pll_clks,
1815 .pll_clks = hsi2_pll_clks,
1983 .pll_clks = g3d_pll_clks,
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| H A D | clk-exynos7870.c | 724 .pll_clks = mif_pll_clks,
1002 .pll_clks = dispaud_pll_clks,
1127 .pll_clks = fsys_pll_clks,
1239 .pll_clks = g3d_pll_clks,
1426 .pll_clks = isp_pll_clks,
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| H A D | clk-artpec8.c | 364 .pll_clks = cmu_cmu_pll_clks,
542 .pll_clks = cmu_cpucl_pll_clks,
774 .pll_clks = cmu_fsys_pll_clks,
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| H A D | clk.c | 472 if (cmu->pll_clks) in samsung_cmu_register_clocks()
473 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks); in samsung_cmu_register_clocks()
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| H A D | clk-exynos850.c | 563 .pll_clks = top_pll_clks,
990 .pll_clks = aud_pll_clks,
1295 .pll_clks = cpucl0_pll_clks,
1450 .pll_clks = cpucl1_pll_clks,
1558 .pll_clks = g3d_pll_clks,
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| H A D | clk-exynos7885.c | 343 .pll_clks = top_pll_clks,
798 .pll_clks = fsys_pll_clks,
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| H A D | clk.h | 365 const struct samsung_pll_clock *pll_clks; member
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| H A D | clk-fsd.c | 303 .pll_clks = cmu_pll_clks,
1541 .pll_clks = mfc_pll_clks,
1745 .pll_clks = cam_csi_pll_clks,
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| H A D | clk-exynos3250.c | 800 .pll_clks = exynos3250_plls,
922 .pll_clks = exynos3250_dmc_plls,
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| H A D | clk-exynos5433.c | 809 .pll_clks = top_pll_clks,
892 .pll_clks = cpif_pll_clks,
1544 .pll_clks = mif_pll_clks,
2898 .pll_clks = disp_pll_clks,
3355 .pll_clks = g3d_pll_clks,
3705 .pll_clks = apollo_pll_clks,
3949 .pll_clks = atlas_pll_clks,
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| H A D | clk-exynosautov9.c | 945 .pll_clks = top_pll_clks,
1511 .pll_clks = fsys1_pll_clks,
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| H A D | clk-gs101.c | 1427 .pll_clks = top_pll_clks,
2662 .pll_clks = hsi0_pll_clks,
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| H A D | clk-exynos990.c | 1160 .pll_clks = top_pll_clks,
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| H A D | clk-exynos8895.c | 1288 .pll_clks = top_pll_clks,
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| H A D | clk-exynos2200.c | 1917 .pll_clks = top_pll_clks,
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| /linux/drivers/clk/mmp/ |
| H A D | clk-of-mmp2.c | 105 static struct mmp_param_pll_clk pll_clks[] = { variable
192 mmp_register_pll_clks(unit, pll_clks, in mmp2_main_clk_init()
194 ARRAY_SIZE(pll_clks)); in mmp2_main_clk_init()
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| /linux/drivers/clk/sophgo/ |
| H A D | clk-sg2042-pll.c | 466 struct sg2042_pll_clock pll_clks[], in sg2042_clk_register_plls() argument
474 pll = &pll_clks[i]; in sg2042_clk_register_plls()
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| /linux/drivers/phy/cadence/ |
| H A D | phy-cadence-sierra.c | 410 struct clk *pll_clks[SIERRA_NUM_CMN_PLLC]; member
790 sp->pll_clks[clk_index] = devm_clk_hw_get_clk(dev, &mux->hw, in cdns_sierra_pll_mux_register()
1203 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1207 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_enable_clocks()
1214 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1221 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_disable_clocks()
1222 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_disable_clocks()
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