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Searched refs:pll_clks (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/clk/mmp/
H A Dclk-of-mmp2.c105 static struct mmp_param_pll_clk pll_clks[] = { variable
192 mmp_register_pll_clks(unit, pll_clks, in mmp2_main_clk_init()
194 ARRAY_SIZE(pll_clks)); in mmp2_main_clk_init()
/linux/drivers/clk/sophgo/
H A Dclk-sg2042-pll.c466 struct sg2042_pll_clock pll_clks[], in sg2042_clk_register_plls() argument
474 pll = &pll_clks[i]; in sg2042_clk_register_plls()
/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c410 struct clk *pll_clks[SIERRA_NUM_CMN_PLLC]; member
790 sp->pll_clks[clk_index] = devm_clk_hw_get_clk(dev, &mux->hw, in cdns_sierra_pll_mux_register()
1203 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1207 ret = clk_prepare_enable(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_enable_clocks()
1214 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_enable_clocks()
1221 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC1]); in cdns_sierra_phy_disable_clocks()
1222 clk_disable_unprepare(sp->pll_clks[CDNS_SIERRA_PLL_CMNLC]); in cdns_sierra_phy_disable_clocks()
/linux/drivers/clk/samsung/
H A Dclk-artpec8.c364 .pll_clks = cmu_cmu_pll_clks,
542 .pll_clks = cmu_cpucl_pll_clks,
774 .pll_clks = cmu_fsys_pll_clks,
H A Dclk.c472 if (cmu->pll_clks) in samsung_cmu_register_clocks()
473 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks); in samsung_cmu_register_clocks()
H A Dclk-fsd.c304 .pll_clks = cmu_pll_clks,
1542 .pll_clks = mfc_pll_clks,
1746 .pll_clks = cam_csi_pll_clks,
H A Dclk-exynos990.c1161 .pll_clks = top_pll_clks,