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Searched refs:plane_state (Results 1 – 25 of 58) sorted by relevance

123

/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_surface.c40 void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state) in dc_plane_construct() argument
42 plane_state->ctx = ctx; in dc_plane_construct()
44 plane_state->gamma_correction.is_identity = true; in dc_plane_construct()
46 plane_state->in_transfer_func.type = TF_TYPE_BYPASS; in dc_plane_construct()
48 plane_state->in_shaper_func.type = TF_TYPE_BYPASS; in dc_plane_construct()
50 plane_state->lut3d_func.state.raw = 0; in dc_plane_construct()
52 plane_state->blend_tf.type = TF_TYPE_BYPASS; in dc_plane_construct()
54 plane_state->pre_multiplied_alpha = true; in dc_plane_construct()
58 void dc_plane_destruct(struct dc_plane_state *plane_state) in dc_plane_destruct() argument
68 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state) in dc_plane_get_pipe_mask() argument
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H A Ddc_resource.c1153 &pipe_ctx->plane_state->clip_rect); in calculate_recout()
1182 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_scaling_ratios() local
1184 struct rect surf_src = plane_state->src_rect; in calculate_scaling_ratios()
1191 if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 || in calculate_scaling_ratios()
1192 pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) in calculate_scaling_ratios()
1197 plane_state->dst_rect.width); in calculate_scaling_ratios()
1200 plane_state->dst_rect.height); in calculate_scaling_ratios()
1298 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_inits_and_viewports() local
1300 struct rect src = plane_state->src_rect; in calculate_inits_and_viewports()
1313 pipe_ctx, &plane_state->dst_rect); in calculate_inits_and_viewports()
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H A Ddc.c1231 (pipe_ctx->plane_state || old_pipe_ctx->plane_state)) in apply_ctx_interdependent_lock()
1241 memcpy(&pipe_ctx->visual_confirm_color, &pipe_ctx->plane_state->visual_confirm_color, in dc_update_visual_confirm_color()
1287 struct dc_plane_state *plane_state = NULL; in dc_get_visual_confirm_for_stream() local
1308 plane_state = stream_status->plane_states[i]; in dc_get_visual_confirm_for_stream()
1310 if (!plane_state) in dc_get_visual_confirm_for_stream()
1316 if (pipe->plane_state == plane_state) { in dc_get_visual_confirm_for_stream()
1366 if (old_pipe->plane_state && !new_pipe->plane_state) in disable_dangling_plane()
1394 if (pipe->stream && pipe->plane_state) { in disable_dangling_plane()
2009 struct dc_plane_state *plane_state) in should_update_pipe_for_plane() argument
2011 return (pipe_ctx->plane_state == plane_state); in should_update_pipe_for_plane()
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/linux/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane.c268 const struct intel_plane_state *plane_state) in icl_plane_min_cdclk() argument
270 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in icl_plane_min_cdclk()
277 glk_plane_ratio(const struct intel_plane_state *plane_state, in glk_plane_ratio() argument
280 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_ratio()
292 const struct intel_plane_state *plane_state) in glk_plane_min_cdclk() argument
294 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in glk_plane_min_cdclk()
297 glk_plane_ratio(plane_state, &num, &den); in glk_plane_min_cdclk()
304 skl_plane_ratio(const struct intel_plane_state *plane_state, in skl_plane_ratio() argument
307 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ratio()
319 const struct intel_plane_state *plane_state) in skl_plane_min_cdclk() argument
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H A Dintel_plane.c66 static void intel_plane_state_reset(struct intel_plane_state *plane_state, in intel_plane_state_reset() argument
69 memset(plane_state, 0, sizeof(*plane_state)); in intel_plane_state_reset()
71 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
73 plane_state->scaler_id = -1; in intel_plane_state_reset()
78 struct intel_plane_state *plane_state; in intel_plane_alloc() local
85 plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL); in intel_plane_alloc()
86 if (!plane_state) { in intel_plane_alloc()
91 intel_plane_state_reset(plane_state, plane); in intel_plane_alloc()
93 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
163 struct intel_plane_state *plane_state = to_intel_plane_state(state); in intel_plane_destroy_state() local
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H A Dintel_fb.c1053 const struct intel_plane_state *plane_state, in intel_plane_adjust_aligned_offset() argument
1057 return intel_adjust_aligned_offset(x, y, plane_state->hw.fb, color_plane, in intel_plane_adjust_aligned_offset()
1058 plane_state->hw.rotation, in intel_plane_adjust_aligned_offset()
1059 plane_state->view.color_plane[color_plane].mapping_stride, in intel_plane_adjust_aligned_offset()
1133 const struct intel_plane_state *plane_state, in intel_plane_compute_aligned_offset() argument
1136 struct intel_display *display = to_intel_display(plane_state); in intel_plane_compute_aligned_offset()
1137 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_compute_aligned_offset()
1138 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_plane_compute_aligned_offset()
1139 unsigned int rotation = plane_state->hw.rotation; in intel_plane_compute_aligned_offset()
1140 unsigned int pitch = plane_state->view.color_plane[color_plane].mapping_stride; in intel_plane_compute_aligned_offset()
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/linux/drivers/gpu/drm/
H A Ddrm_gem_atomic_helper.c222 struct drm_plane_state *plane_state = plane->state; in __drm_gem_duplicate_shadow_plane_state() local
224 to_drm_shadow_plane_state(plane_state); in __drm_gem_duplicate_shadow_plane_state()
253 struct drm_plane_state *plane_state = plane->state; in drm_gem_duplicate_shadow_plane_state() local
256 if (!plane_state) in drm_gem_duplicate_shadow_plane_state()
292 struct drm_plane_state *plane_state) in drm_gem_destroy_shadow_plane_state() argument
295 to_drm_shadow_plane_state(plane_state); in drm_gem_destroy_shadow_plane_state()
360 int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state) in drm_gem_begin_shadow_fb_access() argument
362 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); in drm_gem_begin_shadow_fb_access()
363 struct drm_framebuffer *fb = plane_state->fb; in drm_gem_begin_shadow_fb_access()
382 void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state) in drm_gem_end_shadow_fb_access() argument
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H A Ddrm_atomic_state_helper.c246 void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state, in __drm_atomic_helper_plane_state_reset() argument
251 plane_state->plane = plane; in __drm_atomic_helper_plane_state_reset()
252 plane_state->rotation = DRM_MODE_ROTATE_0; in __drm_atomic_helper_plane_state_reset()
254 plane_state->alpha = DRM_BLEND_ALPHA_OPAQUE; in __drm_atomic_helper_plane_state_reset()
255 plane_state->pixel_blend_mode = DRM_MODE_BLEND_PREMULTI; in __drm_atomic_helper_plane_state_reset()
261 plane_state->color_encoding = val; in __drm_atomic_helper_plane_state_reset()
268 plane_state->color_range = val; in __drm_atomic_helper_plane_state_reset()
273 plane_state->color_pipeline = NULL; in __drm_atomic_helper_plane_state_reset()
280 plane_state->zpos = val; in __drm_atomic_helper_plane_state_reset()
281 plane_state->normalized_zpos = val; in __drm_atomic_helper_plane_state_reset()
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H A Ddrm_atomic_helper.c81 struct drm_plane_state *plane_state, in drm_atomic_helper_plane_changed() argument
96 if (plane_state->crtc) { in drm_atomic_helper_plane_changed()
97 crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); in drm_atomic_helper_plane_changed()
892 int drm_atomic_helper_check_plane_state(struct drm_plane_state *plane_state, in drm_atomic_helper_check_plane_state() argument
899 struct drm_framebuffer *fb = plane_state->fb; in drm_atomic_helper_check_plane_state()
900 struct drm_rect *src = &plane_state->src; in drm_atomic_helper_check_plane_state()
901 struct drm_rect *dst = &plane_state->dst; in drm_atomic_helper_check_plane_state()
902 unsigned int rotation = plane_state->rotation; in drm_atomic_helper_check_plane_state()
906 WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state->crtc); in drm_atomic_helper_check_plane_state()
908 *src = drm_plane_state_src(plane_state); in drm_atomic_helper_check_plane_state()
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H A Ddrm_atomic.c551 struct drm_plane_state *plane_state; in drm_atomic_get_plane_state() local
561 plane_state = drm_atomic_get_new_plane_state(state, plane); in drm_atomic_get_plane_state()
562 if (plane_state) in drm_atomic_get_plane_state()
563 return plane_state; in drm_atomic_get_plane_state()
569 plane_state = plane->funcs->atomic_duplicate_state(plane); in drm_atomic_get_plane_state()
570 if (!plane_state) in drm_atomic_get_plane_state()
573 state->planes[index].state_to_destroy = plane_state; in drm_atomic_get_plane_state()
576 state->planes[index].new_state = plane_state; in drm_atomic_get_plane_state()
577 plane_state->state = state; in drm_atomic_get_plane_state()
580 plane->base.id, plane->name, plane_state, state); in drm_atomic_get_plane_state()
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H A Ddrm_atomic_uapi.c190 drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state, in drm_atomic_set_crtc_for_plane() argument
193 struct drm_plane *plane = plane_state->plane; in drm_atomic_set_crtc_for_plane()
196 if (plane_state->crtc == crtc) in drm_atomic_set_crtc_for_plane()
198 if (plane_state->crtc) { in drm_atomic_set_crtc_for_plane()
199 crtc_state = drm_atomic_get_crtc_state(plane_state->state, in drm_atomic_set_crtc_for_plane()
200 plane_state->crtc); in drm_atomic_set_crtc_for_plane()
207 plane_state->crtc = crtc; in drm_atomic_set_crtc_for_plane()
210 crtc_state = drm_atomic_get_crtc_state(plane_state->state, in drm_atomic_set_crtc_for_plane()
220 plane->base.id, plane->name, plane_state, in drm_atomic_set_crtc_for_plane()
225 plane->base.id, plane->name, plane_state); in drm_atomic_set_crtc_for_plane()
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/linux/drivers/gpu/drm/tests/
H A Ddrm_plane_helper_test.c82 static void check_src_eq(struct kunit *test, struct drm_plane_state *plane_state, in check_src_eq() argument
88 KUNIT_ASSERT_GE_MSG(test, plane_state->src.x1, 0, in check_src_eq()
90 plane_state->src.x1, DRM_RECT_FP_ARG(&plane_state->src)); in check_src_eq()
92 KUNIT_ASSERT_GE_MSG(test, plane_state->src.y1, 0, in check_src_eq()
94 plane_state->src.y1, DRM_RECT_FP_ARG(&plane_state->src)); in check_src_eq()
96 KUNIT_EXPECT_TRUE_MSG(test, drm_rect_equals(&plane_state->src, &expected), in check_src_eq()
98 DRM_RECT_FP_ARG(&plane_state->src), DRM_RECT_FP_ARG(&expected)); in check_src_eq()
101 static void check_crtc_eq(struct kunit *test, struct drm_plane_state *plane_state, in check_crtc_eq() argument
107 KUNIT_EXPECT_TRUE_MSG(test, drm_rect_equals(&plane_state->dst, &expected), in check_crtc_eq()
109 DRM_RECT_ARG(&plane_state->dst), DRM_RECT_ARG(&expected)); in check_crtc_eq()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo() local
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
63 if (sec_split && plane_state->address.type == PLN_ADDR_TYPE_GRPH_STEREO && in patch_address_for_sbs_tb_stereo()
68 *addr = plane_state->address.grph_stereo.left_addr; in patch_address_for_sbs_tb_stereo()
69 plane_state->address.grph_stereo.left_addr = in patch_address_for_sbs_tb_stereo()
70 plane_state->address.grph_stereo.right_addr; in patch_address_for_sbs_tb_stereo()
74 plane_state->address.type != PLN_ADDR_TYPE_GRPH_STEREO) { in patch_address_for_sbs_tb_stereo()
75 plane_state->address.type = PLN_ADDR_TYPE_GRPH_STEREO; in patch_address_for_sbs_tb_stereo()
76 plane_state->address.grph_stereo.right_addr = in patch_address_for_sbs_tb_stereo()
77 plane_state->address.grph_stereo.left_addr; in patch_address_for_sbs_tb_stereo()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c746 pipe_ctx->plane_state = NULL; in dcn20_plane_atomic_disable()
1070 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_blend_lut() argument
1076 if (plane_state->blend_tf.type == TF_TYPE_HWPWL) in dcn20_set_blend_lut()
1077 blend_lut = &plane_state->blend_tf.pwl; in dcn20_set_blend_lut()
1078 else if (plane_state->blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn20_set_blend_lut()
1079 cm_helper_translate_curve_to_hw_format(plane_state->ctx, in dcn20_set_blend_lut()
1080 &plane_state->blend_tf, in dcn20_set_blend_lut()
1090 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_shaper_3dlut() argument
1096 if (plane_state->in_shaper_func.type == TF_TYPE_HWPWL) in dcn20_set_shaper_3dlut()
1097 shaper_lut = &plane_state->in_shaper_func.pwl; in dcn20_set_shaper_3dlut()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c94 if (pipe_ctx->plane_state) in dcn401_program_gamut_remap()
95 ASSERT(pipe_ctx->plane_state->mcm_location == MPCC_MOVABLE_CM_LOCATION_BEFORE); in dcn401_program_gamut_remap()
102 if (pipe_ctx->plane_state && in dcn401_program_gamut_remap()
103 pipe_ctx->plane_state->gamut_remap_matrix.enable_remap == true) { in dcn401_program_gamut_remap()
107 pipe_ctx->plane_state->gamut_remap_matrix.matrix[i]; in dcn401_program_gamut_remap()
379 if (!pipe_ctx->plane_state) in dcn401_get_mcm_lut_xable_from_pipe_ctx()
381 shaper_3dlut_setting = pipe_ctx->plane_state->mcm_shaper_3dlut_setting; in dcn401_get_mcm_lut_xable_from_pipe_ctx()
382 lut1d_enable = pipe_ctx->plane_state->mcm_lut1d_enable; in dcn401_get_mcm_lut_xable_from_pipe_ctx()
384 pipe_ctx->plane_state->mcm_location = MPCC_MOVABLE_CM_LOCATION_BEFORE; in dcn401_get_mcm_lut_xable_from_pipe_ctx()
609 const struct dc_plane_state *plane_state) in dcn401_set_mcm_luts() argument
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/linux/include/drm/
H A Ddrm_gem_atomic_helper.h100 struct drm_plane_state *plane_state);
114 int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
115 void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
130 struct drm_plane_state *plane_state);
132 struct drm_plane_state *plane_state);
137 struct drm_plane_state *plane_state);
H A Ddrm_simple_kms_helper.h64 struct drm_plane_state *plane_state);
92 struct drm_plane_state *plane_state,
126 struct drm_plane_state *plane_state);
136 struct drm_plane_state *plane_state);
156 struct drm_plane_state *plane_state);
228 struct drm_plane_state *plane_state);
H A Ddrm_atomic_uapi.h49 drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state,
51 void drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state,
53 void drm_atomic_set_colorop_for_plane(struct drm_plane_state *plane_state,
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c127 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
135 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in dcn32_merge_pipes_for_subvp()
145 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
164 if (!pipe->plane_state) in dcn32_all_pipes_have_stream_and_plane()
206 if (pipe->plane_state && pipe->plane_state->rotation != ROTATION_ANGLE_0) in dcn32_any_surfaces_rotated()
222 if (pipe->plane_state) { in dcn32_is_center_timing()
223 if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && in dcn32_is_center_timing()
224 pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { in dcn32_is_center_timing()
262 …if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) !… in override_det_for_subvp()
277 …if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) !… in override_det_for_subvp()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_crtc.c305 struct mtk_plane_state *plane_state; in ddp_cmdq_cb() local
307 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
309 plane_state->pending.config = false; in ddp_cmdq_cb()
317 struct mtk_plane_state *plane_state; in ddp_cmdq_cb() local
319 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
321 plane_state->pending.async_config = false; in ddp_cmdq_cb()
417 struct mtk_plane_state *plane_state; in mtk_crtc_ddp_hw_init() local
421 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_ddp_hw_init()
424 plane_state->pending.enable = false; in mtk_crtc_ddp_hw_init()
428 plane_state, NULL); in mtk_crtc_ddp_hw_init()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_color.c1102 struct drm_plane_state *plane_state) in amdgpu_dm_verify_lut3d_size() argument
1104 struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state); in amdgpu_dm_verify_lut3d_size()
1416 __set_dm_plane_degamma(struct drm_plane_state *plane_state, in __set_dm_plane_degamma() argument
1420 struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state); in __set_dm_plane_degamma()
1493 __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state, in __set_dm_plane_colorop_degamma() argument
1499 struct drm_atomic_state *state = plane_state->state; in __set_dm_plane_colorop_degamma()
1520 __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state, in __set_dm_plane_colorop_3x4_matrix() argument
1526 struct drm_atomic_state *state = plane_state->state; in __set_dm_plane_colorop_3x4_matrix()
1561 __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state, in __set_dm_plane_colorop_multiplier() argument
1567 struct drm_atomic_state *state = plane_state->state; in __set_dm_plane_colorop_multiplier()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_plane_priv.h31 void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state);
32 void dc_plane_destruct(struct dc_plane_state *plane_state);
33 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c1153 struct drm_plane_state *plane_state = in dpu_plane_virtual_atomic_check() local
1157 struct dpu_plane_state *pstate = to_dpu_plane_state(plane_state); in dpu_plane_virtual_atomic_check()
1161 if (IS_ERR(plane_state)) in dpu_plane_virtual_atomic_check()
1162 return PTR_ERR(plane_state); in dpu_plane_virtual_atomic_check()
1164 if (plane_state->crtc) in dpu_plane_virtual_atomic_check()
1166 plane_state->crtc); in dpu_plane_virtual_atomic_check()
1168 ret = dpu_plane_atomic_check_nosspp(plane, plane_state, crtc_state); in dpu_plane_virtual_atomic_check()
1172 if (!plane_state->visible) { in dpu_plane_virtual_atomic_check()
1189 old_plane_state->src_w != plane_state->src_w || in dpu_plane_virtual_atomic_check()
1190 old_plane_state->src_h != plane_state->src_h || in dpu_plane_virtual_atomic_check()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c519 if (pipe->plane_state && in dcn351_populate_dml_pipes_from_context_fpu()
520 (pipe->plane_state->src_rect.height < in dcn351_populate_dml_pipes_from_context_fpu()
521 pipe->plane_state->dst_rect.height || in dcn351_populate_dml_pipes_from_context_fpu()
522 pipe->plane_state->src_rect.width < in dcn351_populate_dml_pipes_from_context_fpu()
523 pipe->plane_state->dst_rect.width)) in dcn351_populate_dml_pipes_from_context_fpu()
566 if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) { in dcn351_populate_dml_pipes_from_context_fpu()
567 if (is_dual_plane(pipe->plane_state->format) in dcn351_populate_dml_pipes_from_context_fpu()
568 && pipe->plane_state->src_rect.width <= 1920 && in dcn351_populate_dml_pipes_from_context_fpu()
569 pipe->plane_state->src_rect.height <= 1080) { in dcn351_populate_dml_pipes_from_context_fpu()
571 } else if (!is_dual_plane(pipe->plane_state->format) && in dcn351_populate_dml_pipes_from_context_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c486 if (pipe->plane_state && in dcn35_populate_dml_pipes_from_context_fpu()
487 (pipe->plane_state->src_rect.height < in dcn35_populate_dml_pipes_from_context_fpu()
488 pipe->plane_state->dst_rect.height || in dcn35_populate_dml_pipes_from_context_fpu()
489 pipe->plane_state->src_rect.width < in dcn35_populate_dml_pipes_from_context_fpu()
490 pipe->plane_state->dst_rect.width)) in dcn35_populate_dml_pipes_from_context_fpu()
533 if (pipe_cnt == 1 && pipe->plane_state && !dc->debug.disable_z9_mpc) { in dcn35_populate_dml_pipes_from_context_fpu()
534 if (is_dual_plane(pipe->plane_state->format) in dcn35_populate_dml_pipes_from_context_fpu()
535 && pipe->plane_state->src_rect.width <= 1920 && in dcn35_populate_dml_pipes_from_context_fpu()
536 pipe->plane_state->src_rect.height <= 1080) { in dcn35_populate_dml_pipes_from_context_fpu()
538 } else if (!is_dual_plane(pipe->plane_state->format) && in dcn35_populate_dml_pipes_from_context_fpu()
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