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Searched refs:plane_state (Results 1 – 25 of 169) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_surface.c40 void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state) in dc_plane_construct() argument
42 plane_state->ctx = ctx; in dc_plane_construct()
44 plane_state->gamma_correction.is_identity = true; in dc_plane_construct()
46 plane_state->in_transfer_func.type = TF_TYPE_BYPASS; in dc_plane_construct()
48 plane_state->in_shaper_func.type = TF_TYPE_BYPASS; in dc_plane_construct()
50 plane_state->lut3d_func.state.raw = 0; in dc_plane_construct()
52 plane_state->blend_tf.type = TF_TYPE_BYPASS; in dc_plane_construct()
54 plane_state->pre_multiplied_alpha = true; in dc_plane_construct()
58 void dc_plane_destruct(struct dc_plane_state *plane_state) in dc_plane_destruct() argument
68 uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state) in dc_plane_get_pipe_mask() argument
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H A Ddc_hw_sequencer.c340 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
350 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
369 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
641 struct dc_plane_state *plane = pipe_ctx->plane_state; in hwss_build_fast_sequence()
694 if (current_mpc_pipe->plane_state) { in hwss_build_fast_sequence()
695 if (dc->hwss.set_flip_control_gsl && current_mpc_pipe->plane_state->update_flags.raw) { in hwss_build_fast_sequence()
697 ….params.set_flip_control_gsl_params.flip_immediate = current_mpc_pipe->plane_state->flip_immediate; in hwss_build_fast_sequence()
701 …if (dc->hwss.program_triplebuffer && dc->debug.enable_tri_buf && current_mpc_pipe->plane_state->up… in hwss_build_fast_sequence()
704 …ams.program_triplebuffer_params.enableTripleBuffer = current_mpc_pipe->plane_state->triplebuffer_f… in hwss_build_fast_sequence()
708 … if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) { in hwss_build_fast_sequence()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_cursor.c36 static u32 intel_cursor_base(const struct intel_plane_state *plane_state) in intel_cursor_base() argument
39 to_i915(plane_state->uapi.plane->dev); in intel_cursor_base()
43 base = plane_state->phys_dma_addr; in intel_cursor_base()
45 base = intel_plane_ggtt_offset(plane_state); in intel_cursor_base()
47 return base + plane_state->view.color_plane[0].offset; in intel_cursor_base()
51 const struct intel_plane_state *plane_state, in intel_cursor_position() argument
54 int x = plane_state->uapi.dst.x1; in intel_cursor_position()
55 int y = plane_state->uapi.dst.y1; in intel_cursor_position()
64 y = max(-1 * drm_rect_height(&plane_state->uapi.dst) + 1, in intel_cursor_position()
82 static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state) in intel_cursor_size_ok() argument
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H A Dintel_sprite.c67 chv_sprite_update_csc(const struct intel_plane_state *plane_state) in chv_sprite_update_csc() argument
69 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in chv_sprite_update_csc()
71 const struct drm_framebuffer *fb = plane_state->hw.fb; in chv_sprite_update_csc()
97 const s16 *csc = csc_matrix[plane_state->hw.color_encoding]; in chv_sprite_update_csc()
139 vlv_sprite_update_clrc(const struct intel_plane_state *plane_state) in vlv_sprite_update_clrc() argument
141 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in vlv_sprite_update_clrc()
143 const struct drm_framebuffer *fb = plane_state->hw.fb; in vlv_sprite_update_clrc()
149 plane_state->hw.color_range == DRM_COLOR_YCBCR_LIMITED_RANGE) { in vlv_sprite_update_clrc()
179 const struct intel_plane_state *plane_state, in vlv_plane_ratio() argument
183 const struct drm_framebuffer *fb = plane_state->hw.fb; in vlv_plane_ratio()
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H A Dskl_universal_plane.c265 const struct intel_plane_state *plane_state) in icl_plane_min_cdclk() argument
267 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in icl_plane_min_cdclk()
274 glk_plane_ratio(const struct intel_plane_state *plane_state, in glk_plane_ratio() argument
277 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_ratio()
289 const struct intel_plane_state *plane_state) in glk_plane_min_cdclk() argument
291 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in glk_plane_min_cdclk()
294 glk_plane_ratio(plane_state, &num, &den); in glk_plane_min_cdclk()
301 skl_plane_ratio(const struct intel_plane_state *plane_state, in skl_plane_ratio() argument
304 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ratio()
316 const struct intel_plane_state *plane_state) in skl_plane_min_cdclk() argument
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H A Dintel_fbc.c132 static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane_state) in intel_fbc_plane_stride() argument
134 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_fbc_plane_stride()
137 stride = plane_state->view.color_plane[0].mapping_stride; in intel_fbc_plane_stride()
138 if (!drm_rotation_90_or_270(plane_state->hw.rotation)) in intel_fbc_plane_stride()
150 static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state) in intel_fbc_plane_cfb_stride() argument
154 return intel_fbc_plane_stride(plane_state) * cpp; in intel_fbc_plane_cfb_stride()
201 static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state) in intel_fbc_cfb_stride() argument
203 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_cfb_stride()
204 unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); in intel_fbc_cfb_stride()
205 unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; in intel_fbc_cfb_stride()
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H A Dintel_atomic_plane.c57 static void intel_plane_state_reset(struct intel_plane_state *plane_state, in intel_plane_state_reset() argument
60 memset(plane_state, 0, sizeof(*plane_state)); in intel_plane_state_reset()
62 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
64 plane_state->scaler_id = -1; in intel_plane_state_reset()
69 struct intel_plane_state *plane_state; in intel_plane_alloc() local
76 plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL); in intel_plane_alloc()
77 if (!plane_state) { in intel_plane_alloc()
82 intel_plane_state_reset(plane_state, plane); in intel_plane_alloc()
84 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
140 struct intel_plane_state *plane_state = to_intel_plane_state(state); in intel_plane_destroy_state() local
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H A Di9xx_plane.c155 const struct intel_plane_state *plane_state) in i9xx_plane_ctl() argument
158 to_i915(plane_state->uapi.plane->dev); in i9xx_plane_ctl()
159 const struct drm_framebuffer *fb = plane_state->hw.fb; in i9xx_plane_ctl()
160 unsigned int rotation = plane_state->hw.rotation; in i9xx_plane_ctl()
227 int i9xx_check_plane_surface(struct intel_plane_state *plane_state) in i9xx_check_plane_surface() argument
229 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in i9xx_check_plane_surface()
231 const struct drm_framebuffer *fb = plane_state->hw.fb; in i9xx_check_plane_surface()
236 ret = intel_plane_compute_gtt(plane_state); in i9xx_check_plane_surface()
240 if (!plane_state->uapi.visible) in i9xx_check_plane_surface()
243 src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in i9xx_check_plane_surface()
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H A Dskl_scaler.c270 struct intel_plane_state *plane_state) in skl_update_scaler_plane() argument
272 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_update_scaler_plane()
274 struct drm_framebuffer *fb = plane_state->hw.fb; in skl_update_scaler_plane()
275 bool force_detach = !fb || !plane_state->uapi.visible; in skl_update_scaler_plane()
285 &plane_state->scaler_id, in skl_update_scaler_plane()
286 drm_rect_width(&plane_state->uapi.src) >> 16, in skl_update_scaler_plane()
287 drm_rect_height(&plane_state->uapi.src) >> 16, in skl_update_scaler_plane()
288 drm_rect_width(&plane_state->uapi.dst), in skl_update_scaler_plane()
289 drm_rect_height(&plane_state->uapi.dst), in skl_update_scaler_plane()
315 struct intel_plane_state *plane_state, in intel_atomic_setup_scaler() argument
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H A Dintel_plane_initial.c29 const struct intel_plane_state *plane_state = in intel_reuse_initial_plane_obj() local
37 if (!plane_state->ggtt_vma) in intel_reuse_initial_plane_obj()
41 *fb = plane_state->hw.fb; in intel_reuse_initial_plane_obj()
42 *vma = plane_state->ggtt_vma; in intel_reuse_initial_plane_obj()
331 struct intel_plane_state *plane_state = in intel_find_initial_plane_obj() local
369 plane_state->uapi.rotation = plane_config->rotation; in intel_find_initial_plane_obj()
371 plane_state->uapi.rotation, &plane_state->view); in intel_find_initial_plane_obj()
374 plane_state->ggtt_vma = i915_vma_get(vma); in intel_find_initial_plane_obj()
375 if (intel_plane_uses_fence(plane_state) && in intel_find_initial_plane_obj()
377 plane_state->flags |= PLANE_HAS_FENCE; in intel_find_initial_plane_obj()
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/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c101 if (!pipe_ctx->plane_state) in dce60_should_enable_fbc()
105 if (pipe_ctx->plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) in dce60_should_enable_fbc()
148 default_adjust.in_color_space = pipe_ctx->plane_state->color_space; in dce60_set_default_colors()
188 if (!pipe_ctx->plane_state->visible) in dce60_program_surface_visibility()
274 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dce60_program_front_end_for_pipe() local
318 plane_state->format, in dce60_program_front_end_for_pipe()
319 &plane_state->tiling_info, in dce60_program_front_end_for_pipe()
320 &plane_state->plane_size, in dce60_program_front_end_for_pipe()
321 plane_state->rotation, in dce60_program_front_end_for_pipe()
325 mi->funcs->set_blank(mi, pipe_ctx->plane_state->visible); in dce60_program_front_end_for_pipe()
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/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Ddc_common.c54 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_lower_pipe_tree_visible()
63 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_upper_pipe_tree_visible()
72 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_pipe_tree_visible()
82 const struct dc_plane_state *plane_state) in build_prescale_params() argument
84 if (plane_state->format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN in build_prescale_params()
85 && plane_state->format != SURFACE_PIXEL_FORMAT_INVALID in build_prescale_params()
86 && plane_state->input_csc_color_matrix.enable_adjustment in build_prescale_params()
87 && plane_state->coeff_reduction_factor.value != 0) { in build_prescale_params()
89 dc_fixpt_mul(plane_state->coeff_reduction_factor, in build_prescale_params()
/linux/drivers/gpu/drm/
H A Ddrm_gem_atomic_helper.c221 struct drm_plane_state *plane_state = plane->state; in __drm_gem_duplicate_shadow_plane_state() local
223 to_drm_shadow_plane_state(plane_state); in __drm_gem_duplicate_shadow_plane_state()
252 struct drm_plane_state *plane_state = plane->state; in drm_gem_duplicate_shadow_plane_state() local
255 if (!plane_state) in drm_gem_duplicate_shadow_plane_state()
291 struct drm_plane_state *plane_state) in drm_gem_destroy_shadow_plane_state() argument
294 to_drm_shadow_plane_state(plane_state); in drm_gem_destroy_shadow_plane_state()
357 int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state) in drm_gem_begin_shadow_fb_access() argument
359 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); in drm_gem_begin_shadow_fb_access()
360 struct drm_framebuffer *fb = plane_state->fb; in drm_gem_begin_shadow_fb_access()
379 void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state) in drm_gem_end_shadow_fb_access() argument
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H A Ddrm_damage_helper.c68 struct drm_plane_state *plane_state) in drm_atomic_helper_check_plane_damage() argument
72 if (plane_state->crtc) { in drm_atomic_helper_check_plane_damage()
74 plane_state->crtc); in drm_atomic_helper_check_plane_damage()
80 drm_property_blob_put(plane_state->fb_damage_clips); in drm_atomic_helper_check_plane_damage()
81 plane_state->fb_damage_clips = NULL; in drm_atomic_helper_check_plane_damage()
160 struct drm_plane_state *plane_state; in drm_atomic_helper_dirtyfb() local
171 plane_state = drm_atomic_get_plane_state(state, plane); in drm_atomic_helper_dirtyfb()
172 if (IS_ERR(plane_state)) { in drm_atomic_helper_dirtyfb()
173 ret = PTR_ERR(plane_state); in drm_atomic_helper_dirtyfb()
177 drm_property_replace_blob(&plane_state->fb_damage_clips, in drm_atomic_helper_dirtyfb()
H A Ddrm_atomic_helper.c80 struct drm_plane_state *plane_state, in drm_atomic_helper_plane_changed() argument
95 if (plane_state->crtc) { in drm_atomic_helper_plane_changed()
96 crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); in drm_atomic_helper_plane_changed()
860 int drm_atomic_helper_check_plane_state(struct drm_plane_state *plane_state, in drm_atomic_helper_check_plane_state() argument
867 struct drm_framebuffer *fb = plane_state->fb; in drm_atomic_helper_check_plane_state()
868 struct drm_rect *src = &plane_state->src; in drm_atomic_helper_check_plane_state()
869 struct drm_rect *dst = &plane_state->dst; in drm_atomic_helper_check_plane_state()
870 unsigned int rotation = plane_state->rotation; in drm_atomic_helper_check_plane_state()
874 WARN_ON(plane_state->crtc && plane_state->crtc != crtc_state->crtc); in drm_atomic_helper_check_plane_state()
876 *src = drm_plane_state_src(plane_state); in drm_atomic_helper_check_plane_state()
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/linux/drivers/gpu/drm/xe/display/
H A Dxe_plane_initial.c36 const struct intel_plane_state *plane_state = in intel_reuse_initial_plane_obj() local
44 if (!plane_state->ggtt_vma) in intel_reuse_initial_plane_obj()
48 *fb = plane_state->hw.fb; in intel_reuse_initial_plane_obj()
195 struct intel_plane_state *plane_state = in intel_find_initial_plane_obj() local
213 plane_state->uapi.rotation = plane_config->rotation; in intel_find_initial_plane_obj()
215 plane_state->uapi.rotation, &plane_state->view); in intel_find_initial_plane_obj()
217 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, in intel_find_initial_plane_obj()
218 0, 0, false, &plane_state->flags); in intel_find_initial_plane_obj()
222 plane_state->ggtt_vma = vma; in intel_find_initial_plane_obj()
223 plane_state->uapi.src_x = 0; in intel_find_initial_plane_obj()
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/linux/drivers/gpu/drm/tests/
H A Ddrm_plane_helper_test.c82 static void check_src_eq(struct kunit *test, struct drm_plane_state *plane_state, in check_src_eq() argument
88 KUNIT_ASSERT_GE_MSG(test, plane_state->src.x1, 0, in check_src_eq()
90 plane_state->src.x1, DRM_RECT_FP_ARG(&plane_state->src)); in check_src_eq()
92 KUNIT_ASSERT_GE_MSG(test, plane_state->src.y1, 0, in check_src_eq()
94 plane_state->src.y1, DRM_RECT_FP_ARG(&plane_state->src)); in check_src_eq()
96 KUNIT_EXPECT_TRUE_MSG(test, drm_rect_equals(&plane_state->src, &expected), in check_src_eq()
98 DRM_RECT_FP_ARG(&plane_state->src), DRM_RECT_FP_ARG(&expected)); in check_src_eq()
101 static void check_crtc_eq(struct kunit *test, struct drm_plane_state *plane_state, in check_crtc_eq() argument
107 KUNIT_EXPECT_TRUE_MSG(test, drm_rect_equals(&plane_state->dst, &expected), in check_crtc_eq()
109 DRM_RECT_ARG(&plane_state->dst), DRM_RECT_ARG(&expected)); in check_crtc_eq()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c729 pipe_ctx->plane_state = NULL; in dcn20_plane_atomic_disable()
1055 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_blend_lut() argument
1061 if (plane_state->blend_tf.type == TF_TYPE_HWPWL) in dcn20_set_blend_lut()
1062 blend_lut = &plane_state->blend_tf.pwl; in dcn20_set_blend_lut()
1063 else if (plane_state->blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) { in dcn20_set_blend_lut()
1064 cm_helper_translate_curve_to_hw_format(plane_state->ctx, in dcn20_set_blend_lut()
1065 &plane_state->blend_tf, in dcn20_set_blend_lut()
1075 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state) in dcn20_set_shaper_3dlut() argument
1081 if (plane_state->in_shaper_func.type == TF_TYPE_HWPWL) in dcn20_set_shaper_3dlut()
1082 shaper_lut = &plane_state->in_shaper_func.pwl; in dcn20_set_shaper_3dlut()
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/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo() local
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
63 if (sec_split && plane_state->address.type == PLN_ADDR_TYPE_GRPH_STEREO && in patch_address_for_sbs_tb_stereo()
68 *addr = plane_state->address.grph_stereo.left_addr; in patch_address_for_sbs_tb_stereo()
69 plane_state->address.grph_stereo.left_addr = in patch_address_for_sbs_tb_stereo()
70 plane_state->address.grph_stereo.right_addr; in patch_address_for_sbs_tb_stereo()
74 plane_state->address.type != PLN_ADDR_TYPE_GRPH_STEREO) { in patch_address_for_sbs_tb_stereo()
75 plane_state->address.type = PLN_ADDR_TYPE_GRPH_STEREO; in patch_address_for_sbs_tb_stereo()
76 plane_state->address.grph_stereo.right_addr = in patch_address_for_sbs_tb_stereo()
77 plane_state->address.grph_stereo.left_addr; in patch_address_for_sbs_tb_stereo()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_spl_translate.c79 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in translate_SPL_in_params_from_pipe_ctx() local
85 switch (plane_state->ctx->dce_version) { in translate_SPL_in_params_from_pipe_ctx()
103 populate_splrect_from_rect(&spl_in->basic_in.clip_rect, &plane_state->clip_rect); in translate_SPL_in_params_from_pipe_ctx()
109 spl_in->basic_in.rotation = (enum spl_rotation_angle)plane_state->rotation; in translate_SPL_in_params_from_pipe_ctx()
111 populate_splrect_from_rect(&spl_in->basic_in.src_rect, &plane_state->src_rect); in translate_SPL_in_params_from_pipe_ctx()
113 populate_splrect_from_rect(&spl_in->basic_in.dst_rect, &plane_state->dst_rect); in translate_SPL_in_params_from_pipe_ctx()
115 spl_in->basic_in.horizontal_mirror = plane_state->horizontal_mirror; in translate_SPL_in_params_from_pipe_ctx()
143 populate_spltaps_from_taps(&spl_in->scaling_quality, &plane_state->scaling_quality); in translate_SPL_in_params_from_pipe_ctx()
175 } else if (!plane_state->adaptive_sharpness_en) { in translate_SPL_in_params_from_pipe_ctx()
180 spl_in->adaptive_sharpness.sharpness_level = plane_state->sharpness_level; in translate_SPL_in_params_from_pipe_ctx()
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/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_mall_phantom.c53 if (pipe->stream && pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && in dml2_helper_calculate_num_ways_for_subvp()
55 bytes_per_pixel = pipe->plane_state->format >= SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 ? 8 : 4; in dml2_helper_calculate_num_ways_for_subvp()
86 if (pipe->plane_state->dcc.enable) in dml2_helper_calculate_num_ways_for_subvp()
120 pipe->plane_state = NULL; in merge_pipes_for_subvp()
128 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in merge_pipes_for_subvp()
138 pipe->plane_state = NULL; in merge_pipes_for_subvp()
156 if (!pipe->plane_state) in all_pipes_have_stream_and_plane()
255 if (pipe->plane_state && !pipe->top_pipe && in assign_subvp_pipe()
374 if (pipe->stream && pipe->plane_state && !pipe->top_pipe && in subvp_subvp_schedulable()
453 if (!pipe->stream || !pipe->plane_state || pipe->top_pipe || pipe->prev_odm_pipe) in dml2_svp_drr_schedulable()
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/linux/include/drm/
H A Ddrm_gem_atomic_helper.h100 struct drm_plane_state *plane_state);
114 int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
115 void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
130 struct drm_plane_state *plane_state);
132 struct drm_plane_state *plane_state);
137 struct drm_plane_state *plane_state);
H A Ddrm_simple_kms_helper.h64 struct drm_plane_state *plane_state);
92 struct drm_plane_state *plane_state,
126 struct drm_plane_state *plane_state);
136 struct drm_plane_state *plane_state);
156 struct drm_plane_state *plane_state);
228 struct drm_plane_state *plane_state);
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c127 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
135 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in dcn32_merge_pipes_for_subvp()
145 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
164 if (!pipe->plane_state) in dcn32_all_pipes_have_stream_and_plane()
206 if (pipe->plane_state && pipe->plane_state->rotation != ROTATION_ANGLE_0) in dcn32_any_surfaces_rotated()
222 if (pipe->plane_state) { in dcn32_is_center_timing()
223 if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && in dcn32_is_center_timing()
224 pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { in dcn32_is_center_timing()
262 …if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) !… in override_det_for_subvp()
277 …if (pipe_ctx->stream && pipe_ctx->plane_state && dc_state_get_pipe_subvp_type(context, pipe_ctx) !… in override_det_for_subvp()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_crtc.c300 struct mtk_plane_state *plane_state; in ddp_cmdq_cb() local
302 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
304 plane_state->pending.config = false; in ddp_cmdq_cb()
312 struct mtk_plane_state *plane_state; in ddp_cmdq_cb() local
314 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
316 plane_state->pending.async_config = false; in ddp_cmdq_cb()
412 struct mtk_plane_state *plane_state; in mtk_crtc_ddp_hw_init() local
416 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_ddp_hw_init()
419 plane_state->pending.enable = false; in mtk_crtc_ddp_hw_init()
423 plane_state, NULL); in mtk_crtc_ddp_hw_init()
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