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Searched refs:plane (Results 1 – 25 of 183) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c113 nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, in nv10_update_plane() argument
120 struct nouveau_drm *drm = nouveau_drm(plane->dev); in nv10_update_plane()
123 container_of(plane, struct nouveau_plane, base); in nv10_update_plane()
192 nv10_disable_plane(struct drm_plane *plane, in nv10_disable_plane() argument
195 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; in nv10_disable_plane()
197 container_of(plane, struct nouveau_plane, base); in nv10_disable_plane()
209 nv_destroy_plane(struct drm_plane *plane) in nv_destroy_plane() argument
211 drm_plane_force_disable(plane); in nv_destroy_plane()
212 drm_plane_cleanup(plane); in nv_destroy_plane()
213 kfree(plane); in nv_destroy_plane()
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/linux/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane_regs.h11 #define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
12 _PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))
13 #define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
14 (_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)
15 #define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
16 _MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
17 #define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
18 _MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
20 #define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_… argument
21 _PICK_EVEN_2RANGES((plane), PLANE_5, \
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H A Di9xx_plane_regs.h12 #define DSPADDR_VLV(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV) argument
15 #define DSPCNTR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR) argument
49 #define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR) argument
52 #define DSPLINOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPALINOFF) argument
55 #define DSPSTRIDE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE) argument
58 #define DSPPOS(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAPOS) argument
65 #define DSPSIZE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASIZE) argument
72 #define DSPSURF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURF) argument
76 #define DSPTILEOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPATILEOFF) argument
83 #define DSPOFFSET(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAOFFSET) argument
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H A Dintel_color_pipeline.c17 int _intel_color_pipeline_plane_init(struct drm_plane *plane, struct drm_prop_enum_list *list, in _intel_color_pipeline_plane_init() argument
20 struct drm_device *dev = plane->dev; in _intel_color_pipeline_plane_init()
28 ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane, in _intel_color_pipeline_plane_init()
42 ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane, in _intel_color_pipeline_plane_init()
52 plane->type == DRM_PLANE_TYPE_PRIMARY) { in _intel_color_pipeline_plane_init()
55 ret = drm_plane_colorop_3dlut_init(dev, &colorop->base, plane, 17, in _intel_color_pipeline_plane_init()
67 ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane, in _intel_color_pipeline_plane_init()
81 int intel_color_pipeline_plane_init(struct drm_plane *plane, enum pipe pipe) in intel_color_pipeline_plane_init() argument
83 struct drm_device *dev = plane->dev; in intel_color_pipeline_plane_init()
91 if (!icl_is_hdr_plane(display, to_intel_plane(plane)->id)) in intel_color_pipeline_plane_init()
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Ddispc.h342 static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane) in DISPC_OVL_BASE() argument
344 switch (plane) { in DISPC_OVL_BASE()
362 static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane) in DISPC_BA0_OFFSET() argument
364 switch (plane) { in DISPC_BA0_OFFSET()
378 static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane) in DISPC_BA1_OFFSET() argument
380 switch (plane) { in DISPC_BA1_OFFSET()
394 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA0_UV_OFFSET() argument
396 switch (plane) { in DISPC_BA0_UV_OFFSET()
414 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA1_UV_OFFSET() argument
416 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddispc.h339 static inline u16 DISPC_OVL_BASE(enum omap_plane plane) in DISPC_OVL_BASE() argument
341 switch (plane) { in DISPC_OVL_BASE()
359 static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) in DISPC_BA0_OFFSET() argument
361 switch (plane) { in DISPC_BA0_OFFSET()
375 static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) in DISPC_BA1_OFFSET() argument
377 switch (plane) { in DISPC_BA1_OFFSET()
391 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) in DISPC_BA0_UV_OFFSET() argument
393 switch (plane) { in DISPC_BA0_UV_OFFSET()
411 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) in DISPC_BA1_UV_OFFSET() argument
413 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_plane.c28 static void mtk_plane_reset(struct drm_plane *plane) in mtk_plane_reset() argument
32 if (plane->state) { in mtk_plane_reset()
33 __drm_atomic_helper_plane_destroy_state(plane->state); in mtk_plane_reset()
35 state = to_mtk_plane_state(plane->state); in mtk_plane_reset()
43 __drm_atomic_helper_plane_reset(plane, &state->base); in mtk_plane_reset()
45 state->base.plane = plane; in mtk_plane_reset()
50 static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane) in mtk_plane_duplicate_state() argument
52 struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state); in mtk_plane_duplicate_state()
59 __drm_atomic_helper_plane_duplicate_state(plane, &state->base); in mtk_plane_duplicate_state()
61 WARN_ON(state->base.plane != plane); in mtk_plane_duplicate_state()
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/linux/include/drm/
H A Ddrm_plane.h56 struct drm_plane *plane; member
327 int (*update_plane)(struct drm_plane *plane,
350 int (*disable_plane)(struct drm_plane *plane,
360 void (*destroy)(struct drm_plane *plane);
372 void (*reset)(struct drm_plane *plane);
388 int (*set_property)(struct drm_plane *plane,
422 struct drm_plane_state *(*atomic_duplicate_state)(struct drm_plane *plane);
432 void (*atomic_destroy_state)(struct drm_plane *plane,
477 int (*atomic_set_property)(struct drm_plane *plane,
500 int (*atomic_get_property)(struct drm_plane *plane,
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H A Ddrm_fourcc.h274 int plane) in drm_format_info_plane_width() argument
276 if (!info || plane >= info->num_planes) in drm_format_info_plane_width()
279 if (plane == 0) in drm_format_info_plane_width()
296 int plane) in drm_format_info_plane_height() argument
298 if (!info || plane >= info->num_planes) in drm_format_info_plane_height()
301 if (plane == 0) in drm_format_info_plane_height()
317 int plane);
319 int plane);
320 unsigned int drm_format_info_bpp(const struct drm_format_info *info, int plane);
322 int plane, unsigned int buffer_width);
H A Ddrm_gem_atomic_helper.h18 int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state);
91 void __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane,
94 void __drm_gem_reset_shadow_plane(struct drm_plane *plane,
97 void drm_gem_reset_shadow_plane(struct drm_plane *plane);
98 struct drm_plane_state *drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane);
99 void drm_gem_destroy_shadow_plane_state(struct drm_plane *plane,
114 int drm_gem_begin_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
115 void drm_gem_end_shadow_fb_access(struct drm_plane *plane, struct drm_plane_state *plane_state);
/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_layer.c19 static void sun4i_backend_layer_reset(struct drm_plane *plane) in sun4i_backend_layer_reset() argument
23 if (plane->state) { in sun4i_backend_layer_reset()
24 state = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_reset()
29 plane->state = NULL; in sun4i_backend_layer_reset()
34 __drm_atomic_helper_plane_reset(plane, &state->state); in sun4i_backend_layer_reset()
38 sun4i_backend_layer_duplicate_state(struct drm_plane *plane) in sun4i_backend_layer_duplicate_state() argument
40 struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_duplicate_state()
47 __drm_atomic_helper_plane_duplicate_state(plane, &copy->state); in sun4i_backend_layer_duplicate_state()
53 static void sun4i_backend_layer_destroy_state(struct drm_plane *plane, in sun4i_backend_layer_destroy_state() argument
63 static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane, in sun4i_backend_layer_atomic_disable() argument
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/linux/drivers/gpu/drm/
H A Ddrm_gem_atomic_helper.c136 int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, in drm_gem_plane_helper_prepare_fb() argument
219 __drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane, in __drm_gem_duplicate_shadow_plane_state() argument
222 struct drm_plane_state *plane_state = plane->state; in __drm_gem_duplicate_shadow_plane_state()
226 __drm_atomic_helper_plane_duplicate_state(plane, &new_shadow_plane_state->base); in __drm_gem_duplicate_shadow_plane_state()
251 drm_gem_duplicate_shadow_plane_state(struct drm_plane *plane) in drm_gem_duplicate_shadow_plane_state() argument
253 struct drm_plane_state *plane_state = plane->state; in drm_gem_duplicate_shadow_plane_state()
262 __drm_gem_duplicate_shadow_plane_state(plane, new_shadow_plane_state); in drm_gem_duplicate_shadow_plane_state()
291 void drm_gem_destroy_shadow_plane_state(struct drm_plane *plane, in drm_gem_destroy_shadow_plane_state() argument
310 void __drm_gem_reset_shadow_plane(struct drm_plane *plane, in __drm_gem_reset_shadow_plane() argument
314 __drm_atomic_helper_plane_reset(plane, &shadow_plane_state->base); in __drm_gem_reset_shadow_plane()
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H A Ddrm_atomic_state_helper.c247 struct drm_plane *plane) in __drm_atomic_helper_plane_state_reset() argument
251 plane_state->plane = plane; in __drm_atomic_helper_plane_state_reset()
257 if (plane->color_encoding_property) { in __drm_atomic_helper_plane_state_reset()
258 if (!drm_object_property_get_default_value(&plane->base, in __drm_atomic_helper_plane_state_reset()
259 plane->color_encoding_property, in __drm_atomic_helper_plane_state_reset()
264 if (plane->color_range_property) { in __drm_atomic_helper_plane_state_reset()
265 if (!drm_object_property_get_default_value(&plane->base, in __drm_atomic_helper_plane_state_reset()
266 plane->color_range_property, in __drm_atomic_helper_plane_state_reset()
271 if (plane->color_pipeline_property) { in __drm_atomic_helper_plane_state_reset()
276 if (plane->zpos_property) { in __drm_atomic_helper_plane_state_reset()
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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_plane.c20 struct komeda_plane *kplane = to_kplane(st->plane); in komeda_plane_init_data_flow()
32 st->plane->name, st->normalized_zpos, in komeda_plane_init_data_flow()
71 komeda_plane_atomic_check(struct drm_plane *plane, in komeda_plane_atomic_check() argument
75 plane); in komeda_plane_atomic_check()
76 struct komeda_plane *kplane = to_kplane(plane); in komeda_plane_atomic_check()
118 komeda_plane_atomic_update(struct drm_plane *plane, in komeda_plane_atomic_update() argument
128 static void komeda_plane_destroy(struct drm_plane *plane) in komeda_plane_destroy() argument
130 drm_plane_cleanup(plane); in komeda_plane_destroy()
132 kfree(to_kplane(plane)); in komeda_plane_destroy()
135 static void komeda_plane_reset(struct drm_plane *plane) in komeda_plane_reset() argument
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/linux/drivers/gpu/drm/tegra/
H A Dplane.c19 static void tegra_plane_destroy(struct drm_plane *plane) in tegra_plane_destroy() argument
21 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_destroy()
23 drm_plane_cleanup(plane); in tegra_plane_destroy()
27 static void tegra_plane_reset(struct drm_plane *plane) in tegra_plane_reset() argument
29 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_reset()
33 if (plane->state) in tegra_plane_reset()
34 __drm_atomic_helper_plane_destroy_state(plane->state); in tegra_plane_reset()
36 kfree(plane->state); in tegra_plane_reset()
37 plane->state = NULL; in tegra_plane_reset()
41 plane->state = &state->base; in tegra_plane_reset()
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/linux/drivers/gpu/drm/vkms/
H A Dvkms_plane.c54 vkms_plane_duplicate_state(struct drm_plane *plane) in vkms_plane_duplicate_state() argument
72 __drm_gem_duplicate_shadow_plane_state(plane, &vkms_state->base); in vkms_plane_duplicate_state()
77 static void vkms_plane_destroy_state(struct drm_plane *plane, in vkms_plane_destroy_state() argument
98 static void vkms_plane_reset(struct drm_plane *plane) in vkms_plane_reset() argument
102 if (plane->state) { in vkms_plane_reset()
103 vkms_plane_destroy_state(plane, plane->state); in vkms_plane_reset()
104 plane->state = NULL; /* must be set to NULL here */ in vkms_plane_reset()
113 __drm_gem_reset_shadow_plane(plane, &vkms_state->base); in vkms_plane_reset()
124 static void vkms_plane_atomic_update(struct drm_plane *plane, in vkms_plane_atomic_update() argument
128 plane); in vkms_plane_atomic_update()
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H A Dvkms_colorop.c17 static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) in vkms_initialize_color_pipeline() argument
20 struct drm_device *dev = plane->dev; in vkms_initialize_color_pipeline()
34 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, supported_tfs, in vkms_initialize_color_pipeline()
51 ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS); in vkms_initialize_color_pipeline()
67 ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS); in vkms_initialize_color_pipeline()
83 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, supported_tfs, in vkms_initialize_color_pipeline()
105 int vkms_initialize_colorops(struct drm_plane *plane) in vkms_initialize_colorops() argument
111 ret = vkms_initialize_color_pipeline(plane, &pipeline); in vkms_initialize_colorops()
116 ret = drm_plane_create_color_pipeline_property(plane, &pipeline, 1); in vkms_initialize_colorops()
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_vsp.c219 static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) in rcar_du_vsp_plane_setup() argument
222 to_rcar_vsp_plane_state(plane->plane.state); in rcar_du_vsp_plane_setup()
224 struct drm_framebuffer *fb = plane->plane.state->fb; in rcar_du_vsp_plane_setup()
254 vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, in rcar_du_vsp_plane_setup()
255 plane->index, &cfg); in rcar_du_vsp_plane_setup()
320 static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, in rcar_du_vsp_plane_prepare_fb() argument
324 struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; in rcar_du_vsp_plane_prepare_fb()
338 return drm_gem_plane_helper_prepare_fb(plane, state); in rcar_du_vsp_plane_prepare_fb()
354 static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, in rcar_du_vsp_plane_cleanup_fb() argument
358 struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; in rcar_du_vsp_plane_cleanup_fb()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c99 static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) in _dpu_plane_get_kms() argument
101 struct msm_drm_private *priv = plane->dev->dev_private; in _dpu_plane_get_kms()
196 static int _dpu_plane_calc_fill_level(struct drm_plane *plane, in _dpu_plane_calc_fill_level() argument
213 pdpu = to_dpu_plane(plane); in _dpu_plane_calc_fill_level()
253 static void _dpu_plane_set_qos_lut(struct drm_plane *plane, in _dpu_plane_set_qos_lut() argument
257 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_qos_lut()
270 total_fl = _dpu_plane_calc_fill_level(plane, pipe, lut_usage, fmt, in _dpu_plane_set_qos_lut()
318 static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane, in _dpu_plane_set_qos_ctrl() argument
322 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_qos_ctrl()
360 static void _dpu_plane_set_ot_limit(struct drm_plane *plane, in _dpu_plane_set_ot_limit() argument
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/linux/drivers/gpu/drm/armada/
H A Darmada_trace.h31 TP_PROTO(struct drm_plane *plane, struct drm_crtc *crtc,
35 TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h),
37 __field(struct drm_plane *, plane)
50 __entry->plane = plane;
63 __entry->plane, __entry->crtc, __entry->fb,
71 TP_PROTO(struct drm_crtc *crtc, struct drm_plane *plane),
72 TP_ARGS(crtc, plane),
74 __field(struct drm_plane *, plane)
78 __entry->plane = plane;
82 __entry->plane, __entry->crtc)
/linux/drivers/gpu/drm/tidss/
H A Dtidss_irq.h35 #define DSS_IRQ_PLANE_BIT_N(plane, bit) \ argument
36 (DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))
39 #define DSS_IRQ_PLANE_BIT(plane, bit) \ argument
40 BIT(DSS_IRQ_PLANE_BIT_N((plane), (bit)))
47 static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane) in DSS_IRQ_PLANE_MASK() argument
49 return GENMASK(DSS_IRQ_PLANE_BIT_N((plane), 0), in DSS_IRQ_PLANE_MASK()
50 DSS_IRQ_PLANE_BIT_N((plane), 0)); in DSS_IRQ_PLANE_MASK()
58 #define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane) DSS_IRQ_PLANE_BIT((plane), 0) argument
/linux/drivers/gpu/drm/sti/
H A Dsti_crtc.c148 struct sti_plane *plane = to_sti_plane(p); in sti_crtc_atomic_flush() local
150 switch (plane->status) { in sti_crtc_atomic_flush()
158 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
160 if (sti_mixer_set_plane_depth(mixer, plane)) { in sti_crtc_atomic_flush()
162 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
166 if (sti_mixer_set_plane_status(mixer, plane, true)) { in sti_crtc_atomic_flush()
168 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
173 if (plane->desc == STI_HQVDP_0) in sti_crtc_atomic_flush()
176 plane->status = STI_PLANE_READY; in sti_crtc_atomic_flush()
182 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
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/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dwndw.c123 struct nv50_disp *disp = nv50_disp(wndw->plane.dev); in nv50_wndw_wait_armed()
188 struct nv50_disp *disp = nv50_disp(wndw->plane.dev); in nv50_wndw_ntfy_enable()
204 struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); in nv50_wndw_atomic_check_release()
205 NV_ATOMIC(drm, "%s release\n", wndw->plane.name); in nv50_wndw_atomic_check_release()
281 struct nouveau_drm *drm = nouveau_drm(wndw->plane.dev); in nv50_wndw_atomic_check_acquire()
286 NV_ATOMIC(drm, "%s acquire\n", wndw->plane.name); in nv50_wndw_atomic_check_acquire()
443 nv50_wndw_atomic_check(struct drm_plane *plane, in nv50_wndw_atomic_check() argument
447 plane); in nv50_wndw_atomic_check()
448 struct nouveau_drm *drm = nouveau_drm(plane->dev); in nv50_wndw_atomic_check()
449 struct nv50_wndw *wndw = nv50_wndw(plane); in nv50_wndw_atomic_check()
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/linux/drivers/gpu/drm/imx/ipuv3/
H A Dipuv3-crtc.c36 struct ipu_plane *plane[2]; member
66 struct drm_plane *plane; in ipu_crtc_disable_planes() local
68 drm_atomic_crtc_state_for_each_plane(plane, old_crtc_state) { in ipu_crtc_disable_planes()
69 if (plane == &ipu_crtc->plane[0]->base) in ipu_crtc_disable_planes()
71 if (ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base) in ipu_crtc_disable_planes()
76 ipu_plane_disable(ipu_crtc->plane[1], true); in ipu_crtc_disable_planes()
78 ipu_plane_disable(ipu_crtc->plane[0], true); in ipu_crtc_disable_planes()
184 for (i = 0; i < ARRAY_SIZE(ipu_crtc->plane); i++) { in ipu_irq_handler()
185 struct ipu_plane *plane = ipu_crtc->plane[i]; in ipu_irq_handler() local
187 if (!plane) in ipu_irq_handler()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_colorop.c58 int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list) in amdgpu_dm_initialize_default_pipeline() argument
61 struct drm_device *dev = plane->dev; in amdgpu_dm_initialize_default_pipeline()
75 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, in amdgpu_dm_initialize_default_pipeline()
92 ret = drm_plane_colorop_mult_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS); in amdgpu_dm_initialize_default_pipeline()
107 ret = drm_plane_colorop_ctm_3x4_init(dev, ops[i], plane, DRM_COLOROP_FLAG_ALLOW_BYPASS); in amdgpu_dm_initialize_default_pipeline()
123 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, in amdgpu_dm_initialize_default_pipeline()
140 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES, in amdgpu_dm_initialize_default_pipeline()
157 ret = drm_plane_colorop_3dlut_init(dev, ops[i], plane, LUT3D_SIZE, in amdgpu_dm_initialize_default_pipeline()
175 ret = drm_plane_colorop_curve_1d_init(dev, ops[i], plane, in amdgpu_dm_initialize_default_pipeline()
192 ret = drm_plane_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES, in amdgpu_dm_initialize_default_pipeline()
[all …]

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