62 static inline unsigned int tegra_plane_offset(struct tegra_plane *plane,  in tegra_plane_offset()  argument
67 		return plane->offset + offset;  in tegra_plane_offset()
72 		return plane->offset + offset;  in tegra_plane_offset()
77 		return plane->offset + offset;  in tegra_plane_offset()
80 	dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset);  in tegra_plane_offset()
82 	return plane->offset + offset;  in tegra_plane_offset()
85 static inline u32 tegra_plane_readl(struct tegra_plane *plane,  in tegra_plane_readl()  argument
88 	return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));  in tegra_plane_readl()
91 static inline void tegra_plane_writel(struct tegra_plane *plane, u32 value,  in tegra_plane_writel()  argument
94 	tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset));  in tegra_plane_writel()
168 static void tegra_plane_setup_blending_legacy(struct tegra_plane *plane)  in tegra_plane_setup_blending_legacy()  argument
183 	tegra_plane_writel(plane, blendnokey, DC_WIN_BLEND_NOKEY);  in tegra_plane_setup_blending_legacy()
184 	tegra_plane_writel(plane, foreground, DC_WIN_BLEND_1WIN);  in tegra_plane_setup_blending_legacy()
186 	state = to_tegra_plane_state(plane->base.state);  in tegra_plane_setup_blending_legacy()
263 		tegra_plane_writel(plane, background[0], DC_WIN_BLEND_2WIN_X);  in tegra_plane_setup_blending_legacy()
264 		tegra_plane_writel(plane, background[1], DC_WIN_BLEND_2WIN_Y);  in tegra_plane_setup_blending_legacy()
265 		tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);  in tegra_plane_setup_blending_legacy()
282 		tegra_plane_writel(plane, blending[0], DC_WIN_BLEND_2WIN_X);  in tegra_plane_setup_blending_legacy()
283 		tegra_plane_writel(plane, blending[1], DC_WIN_BLEND_2WIN_Y);  in tegra_plane_setup_blending_legacy()
284 		tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);  in tegra_plane_setup_blending_legacy()
288 		tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_X);  in tegra_plane_setup_blending_legacy()
289 		tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_Y);  in tegra_plane_setup_blending_legacy()
290 		tegra_plane_writel(plane, foreground, DC_WIN_BLEND_3WIN_XY);  in tegra_plane_setup_blending_legacy()
295 static void tegra_plane_setup_blending(struct tegra_plane *plane,  in tegra_plane_setup_blending()  argument
303 	tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT);  in tegra_plane_setup_blending()
308 	tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT);  in tegra_plane_setup_blending()
311 	tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL);  in tegra_plane_setup_blending()
315 tegra_plane_use_horizontal_filtering(struct tegra_plane *plane,  in tegra_plane_use_horizontal_filtering()  argument
318 	struct tegra_dc *dc = plane->dc;  in tegra_plane_use_horizontal_filtering()
323 	if (plane->index == 0 && dc->soc->has_win_a_without_filters)  in tegra_plane_use_horizontal_filtering()
330 tegra_plane_use_vertical_filtering(struct tegra_plane *plane,  in tegra_plane_use_vertical_filtering()  argument
333 	struct tegra_dc *dc = plane->dc;  in tegra_plane_use_vertical_filtering()
338 	if (plane->index == 0 && dc->soc->has_win_a_without_filters)  in tegra_plane_use_vertical_filtering()
341 	if (plane->index == 2 && dc->soc->has_win_c_without_vert_filter)  in tegra_plane_use_vertical_filtering()
347 static void tegra_dc_setup_window(struct tegra_plane *plane,  in tegra_dc_setup_window()  argument
351 	struct tegra_dc *dc = plane->dc;  in tegra_dc_setup_window()
366 	tegra_plane_writel(plane, window->format, DC_WIN_COLOR_DEPTH);  in tegra_dc_setup_window()
367 	tegra_plane_writel(plane, window->swap, DC_WIN_BYTE_SWAP);  in tegra_dc_setup_window()
370 	tegra_plane_writel(plane, value, DC_WIN_POSITION);  in tegra_dc_setup_window()
373 	tegra_plane_writel(plane, value, DC_WIN_SIZE);  in tegra_dc_setup_window()
387 	tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE);  in tegra_dc_setup_window()
400 	tegra_plane_writel(plane, value, DC_WIN_DDA_INC);  in tegra_dc_setup_window()
405 	tegra_plane_writel(plane, h_dda, DC_WIN_H_INITIAL_DDA);  in tegra_dc_setup_window()
406 	tegra_plane_writel(plane, v_dda, DC_WIN_V_INITIAL_DDA);  in tegra_dc_setup_window()
408 	tegra_plane_writel(plane, 0, DC_WIN_UV_BUF_STRIDE);  in tegra_dc_setup_window()
409 	tegra_plane_writel(plane, 0, DC_WIN_BUF_STRIDE);  in tegra_dc_setup_window()
411 	tegra_plane_writel(plane, window->base[0], DC_WINBUF_START_ADDR);  in tegra_dc_setup_window()
414 		tegra_plane_writel(plane, window->base[1], DC_WINBUF_START_ADDR_U);  in tegra_dc_setup_window()
417 			tegra_plane_writel(plane, window->base[2], DC_WINBUF_START_ADDR_V);  in tegra_dc_setup_window()
420 		tegra_plane_writel(plane, value, DC_WIN_LINE_STRIDE);  in tegra_dc_setup_window()
422 		tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE);  in tegra_dc_setup_window()
425 	tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET);  in tegra_dc_setup_window()
426 	tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET);  in tegra_dc_setup_window()
446 		tegra_plane_writel(plane, value, DC_WINBUF_SURFACE_KIND);  in tegra_dc_setup_window()
467 		tegra_plane_writel(plane, value, DC_WIN_BUFFER_ADDR_MODE);  in tegra_dc_setup_window()
474 		tegra_plane_writel(plane, 0x00f0, DC_WIN_CSC_YOF);  in tegra_dc_setup_window()
475 		tegra_plane_writel(plane, 0x012a, DC_WIN_CSC_KYRGB);  in tegra_dc_setup_window()
476 		tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KUR);  in tegra_dc_setup_window()
477 		tegra_plane_writel(plane, 0x0198, DC_WIN_CSC_KVR);  in tegra_dc_setup_window()
478 		tegra_plane_writel(plane, 0x039b, DC_WIN_CSC_KUG);  in tegra_dc_setup_window()
479 		tegra_plane_writel(plane, 0x032f, DC_WIN_CSC_KVG);  in tegra_dc_setup_window()
480 		tegra_plane_writel(plane, 0x0204, DC_WIN_CSC_KUB);  in tegra_dc_setup_window()
481 		tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KVB);  in tegra_dc_setup_window()
494 	if (tegra_plane_use_horizontal_filtering(plane, window)) {  in tegra_dc_setup_window()
499 		tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0));  in tegra_dc_setup_window()
500 		tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1));  in tegra_dc_setup_window()
501 		tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2));  in tegra_dc_setup_window()
502 		tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3));  in tegra_dc_setup_window()
503 		tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4));  in tegra_dc_setup_window()
504 		tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5));  in tegra_dc_setup_window()
505 		tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6));  in tegra_dc_setup_window()
506 		tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7));  in tegra_dc_setup_window()
507 		tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8));  in tegra_dc_setup_window()
508 		tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9));  in tegra_dc_setup_window()
509 		tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10));  in tegra_dc_setup_window()
510 		tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11));  in tegra_dc_setup_window()
511 		tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12));  in tegra_dc_setup_window()
512 		tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13));  in tegra_dc_setup_window()
513 		tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14));  in tegra_dc_setup_window()
514 		tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15));  in tegra_dc_setup_window()
519 	if (tegra_plane_use_vertical_filtering(plane, window)) {  in tegra_dc_setup_window()
527 			tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i));  in tegra_dc_setup_window()
532 	tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS);  in tegra_dc_setup_window()
535 		tegra_plane_setup_blending_legacy(plane);  in tegra_dc_setup_window()
537 		tegra_plane_setup_blending(plane, window);  in tegra_dc_setup_window()
618 static int tegra_plane_atomic_check(struct drm_plane *plane,  in tegra_plane_atomic_check()  argument
622 										 plane);  in tegra_plane_atomic_check()
629 	struct tegra_plane *tegra = to_tegra_plane(plane);  in tegra_plane_atomic_check()
710 static void tegra_plane_atomic_disable(struct drm_plane *plane,  in tegra_plane_atomic_disable()  argument
714 									   plane);  in tegra_plane_atomic_disable()
715 	struct tegra_plane *p = to_tegra_plane(plane);  in tegra_plane_atomic_disable()
727 static void tegra_plane_atomic_update(struct drm_plane *plane,  in tegra_plane_atomic_update()  argument
731 									   plane);  in tegra_plane_atomic_update()
734 	struct tegra_plane *p = to_tegra_plane(plane);  in tegra_plane_atomic_update()
743 		return tegra_plane_atomic_disable(plane, state);  in tegra_plane_atomic_update()
809 	struct tegra_plane *plane;  in tegra_primary_plane_create()  local
815 	plane = kzalloc_obj(*plane);  in tegra_primary_plane_create()
816 	if (!plane)  in tegra_primary_plane_create()
820 	plane->offset = 0xa00;  in tegra_primary_plane_create()
821 	plane->index = 0;  in tegra_primary_plane_create()
822 	plane->dc = dc;  in tegra_primary_plane_create()
828 	err = tegra_plane_interconnect_init(plane);  in tegra_primary_plane_create()
830 		kfree(plane);  in tegra_primary_plane_create()
834 	err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,  in tegra_primary_plane_create()
838 		kfree(plane);  in tegra_primary_plane_create()
842 	drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);  in tegra_primary_plane_create()
843 	drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255);  in tegra_primary_plane_create()
845 	err = drm_plane_create_rotation_property(&plane->base,  in tegra_primary_plane_create()
855 	return &plane->base;  in tegra_primary_plane_create()
866 static int tegra_cursor_atomic_check(struct drm_plane *plane,  in tegra_cursor_atomic_check()  argument
870 										 plane);  in tegra_cursor_atomic_check()
872 	struct tegra_plane *tegra = to_tegra_plane(plane);  in tegra_cursor_atomic_check()
904 static void __tegra_cursor_atomic_update(struct drm_plane *plane,  in __tegra_cursor_atomic_update()  argument
909 	struct tegra_drm *tegra = plane->dev->dev_private;  in __tegra_cursor_atomic_update()
1002 static void tegra_cursor_atomic_update(struct drm_plane *plane,  in tegra_cursor_atomic_update()  argument
1005 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);  in tegra_cursor_atomic_update()
1007 	__tegra_cursor_atomic_update(plane, new_state);  in tegra_cursor_atomic_update()
1010 static void tegra_cursor_atomic_disable(struct drm_plane *plane,  in tegra_cursor_atomic_disable()  argument
1014 									   plane);  in tegra_cursor_atomic_disable()
1029 static int tegra_cursor_atomic_async_check(struct drm_plane *plane, struct drm_atomic_state *state,  in tegra_cursor_atomic_async_check()  argument
1032 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);  in tegra_cursor_atomic_async_check()
1044 	if (plane->state->crtc != new_state->crtc ||  in tegra_cursor_atomic_async_check()
1045 	    plane->state->src_w != new_state->src_w ||  in tegra_cursor_atomic_async_check()
1046 	    plane->state->src_h != new_state->src_h ||  in tegra_cursor_atomic_async_check()
1047 	    plane->state->crtc_w != new_state->crtc_w ||  in tegra_cursor_atomic_async_check()
1048 	    plane->state->crtc_h != new_state->crtc_h ||  in tegra_cursor_atomic_async_check()
1049 	    plane->state->fb != new_state->fb ||  in tegra_cursor_atomic_async_check()
1050 	    plane->state->fb == NULL)  in tegra_cursor_atomic_async_check()
1061 	if (new_state->visible != plane->state->visible)  in tegra_cursor_atomic_async_check()
1067 static void tegra_cursor_atomic_async_update(struct drm_plane *plane,  in tegra_cursor_atomic_async_update()  argument
1070 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);  in tegra_cursor_atomic_async_update()
1073 	plane->state->src_x = new_state->src_x;  in tegra_cursor_atomic_async_update()
1074 	plane->state->src_y = new_state->src_y;  in tegra_cursor_atomic_async_update()
1075 	plane->state->crtc_x = new_state->crtc_x;  in tegra_cursor_atomic_async_update()
1076 	plane->state->crtc_y = new_state->crtc_y;  in tegra_cursor_atomic_async_update()
1079 		struct tegra_plane *p = to_tegra_plane(plane);  in tegra_cursor_atomic_async_update()
1082 		__tegra_cursor_atomic_update(plane, new_state);  in tegra_cursor_atomic_async_update()
1113 	struct tegra_plane *plane;  in tegra_dc_cursor_plane_create()  local
1118 	plane = kzalloc_obj(*plane);  in tegra_dc_cursor_plane_create()
1119 	if (!plane)  in tegra_dc_cursor_plane_create()
1129 	plane->index = 6;  in tegra_dc_cursor_plane_create()
1130 	plane->dc = dc;  in tegra_dc_cursor_plane_create()
1136 		err = tegra_plane_interconnect_init(plane);  in tegra_dc_cursor_plane_create()
1138 			kfree(plane);  in tegra_dc_cursor_plane_create()
1146 	err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,  in tegra_dc_cursor_plane_create()
1151 		kfree(plane);  in tegra_dc_cursor_plane_create()
1155 	drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs);  in tegra_dc_cursor_plane_create()
1156 	drm_plane_create_zpos_immutable_property(&plane->base, 255);  in tegra_dc_cursor_plane_create()
1158 	return &plane->base;  in tegra_dc_cursor_plane_create()
1260 	struct tegra_plane *plane;  in tegra_dc_overlay_plane_create()  local
1266 	plane = kzalloc_obj(*plane);  in tegra_dc_overlay_plane_create()
1267 	if (!plane)  in tegra_dc_overlay_plane_create()
1270 	plane->offset = 0xa00 + 0x200 * index;  in tegra_dc_overlay_plane_create()
1271 	plane->index = index;  in tegra_dc_overlay_plane_create()
1272 	plane->dc = dc;  in tegra_dc_overlay_plane_create()
1277 	err = tegra_plane_interconnect_init(plane);  in tegra_dc_overlay_plane_create()
1279 		kfree(plane);  in tegra_dc_overlay_plane_create()
1288 	err = drm_universal_plane_init(drm, &plane->base, possible_crtcs,  in tegra_dc_overlay_plane_create()
1293 		kfree(plane);  in tegra_dc_overlay_plane_create()
1297 	drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);  in tegra_dc_overlay_plane_create()
1298 	drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255);  in tegra_dc_overlay_plane_create()
1300 	err = drm_plane_create_rotation_property(&plane->base,  in tegra_dc_overlay_plane_create()
1310 	return &plane->base;  in tegra_dc_overlay_plane_create()
1316 	struct drm_plane *plane, *primary = NULL;  in tegra_dc_add_shared_planes()  local
1332 				plane = tegra_shared_plane_create(drm, dc,  in tegra_dc_add_shared_planes()
1335 				if (IS_ERR(plane))  in tegra_dc_add_shared_planes()
1336 					return plane;  in tegra_dc_add_shared_planes()
1343 					primary = plane;  in tegra_dc_add_shared_planes()
2011 	struct drm_plane *plane;  in tegra_crtc_update_memory_bandwidth()  local
2027 		drm_atomic_crtc_for_each_plane(plane, crtc) {  in tegra_crtc_update_memory_bandwidth()
2028 			tegra = to_tegra_plane(plane);  in tegra_crtc_update_memory_bandwidth()
2037 	for_each_old_plane_in_state(old_crtc_state->state, plane,  in tegra_crtc_update_memory_bandwidth()
2040 		new_tegra_state = to_const_tegra_plane_state(plane->state);  in tegra_crtc_update_memory_bandwidth()
2041 		tegra = to_tegra_plane(plane);  in tegra_crtc_update_memory_bandwidth()
2066 		window.src.h = drm_rect_height(&plane->state->src) >> 16;  in tegra_crtc_update_memory_bandwidth()
2067 		window.dst.h = drm_rect_height(&plane->state->dst);  in tegra_crtc_update_memory_bandwidth()
2337 	if (state->plane->type != DRM_PLANE_TYPE_CURSOR)  in tegra_plane_is_cursor()
2356 	struct drm_plane *plane;  in tegra_plane_overlap_mask()  local
2369 	drm_atomic_crtc_state_for_each_plane_state(plane, other_state, state) {  in tegra_plane_overlap_mask()
2372 		tegra = to_tegra_plane(other_state->plane);  in tegra_plane_overlap_mask()
2403 	struct drm_plane *plane;  in tegra_crtc_calculate_memory_bandwidth()  local
2427 	drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, new_state) {  in tegra_crtc_calculate_memory_bandwidth()
2429 		tegra = to_tegra_plane(plane);  in tegra_crtc_calculate_memory_bandwidth()
2457 	drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, new_state) {  in tegra_crtc_calculate_memory_bandwidth()
2467 		tegra = to_tegra_plane(plane);  in tegra_crtc_calculate_memory_bandwidth()
2492 			new_plane_state = drm_atomic_get_plane_state(state, plane);  in tegra_crtc_calculate_memory_bandwidth()