Home
last modified time | relevance | path

Searched refs:pixelclock (Results 1 – 25 of 39) sorted by relevance

12

/linux/drivers/gpu/drm/panel/
H A Dpanel-simple.c861 .pixelclock = { 29930000, 33260000, 36590000 },
902 .pixelclock = { 34500000, 39600000, 50400000 },
932 .pixelclock = { 26400000, 33300000, 46800000 },
1038 .pixelclock = { 33300000, 34209000, 45000000 },
1066 .pixelclock = { 64000000, 68930000, 85000000 },
1139 .pixelclock = { 60000000, 74400000, 90000000 },
1163 .pixelclock = { 134000000, 141200000, 149000000 },
1193 .pixelclock = { 137000000, 141000000, 146000000 },
1248 .pixelclock = { 120000000, 144000000, 175000000 },
1278 .pixelclock = { 90000000, 108000000, 135000000 },
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-di.c424 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
427 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
444 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
448 error = rate / (sig->mode.pixelclock / 1000); in ipu_di_config_clock()
465 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
468 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
495 sig->mode.pixelclock, in ipu_di_config_clock()
573 sig->mode.pixelclock); in ipu_di_init_sync_panel()
/linux/drivers/video/
H A Dvideomode.c16 vm->pixelclock = dt->pixelclock.typ; in videomode_from_timing()
H A Dof_display_timing.c73 ret |= parse_timing_property(np, "clock-frequency", &dt->pixelclock); in of_parse_display_timing()
/linux/include/video/
H A Dvideomode.h19 unsigned long pixelclock; /* pixelclock in Hz */ member
H A Ddisplay_timing.h64 struct timing_entry pixelclock; member
/linux/drivers/gpu/drm/bridge/analogix/
H A Danx7625.c360 static int anx7625_calculate_m_n(u32 pixelclock, in anx7625_calculate_m_n() argument
365 if (pixelclock > PLL_OUT_FREQ_ABS_MAX / POST_DIVIDER_MIN) { in anx7625_calculate_m_n()
368 pixelclock, in anx7625_calculate_m_n()
373 if (pixelclock < PLL_OUT_FREQ_ABS_MIN / POST_DIVIDER_MAX) { in anx7625_calculate_m_n()
376 pixelclock, in anx7625_calculate_m_n()
382 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));) in anx7625_calculate_m_n()
387 (pixelclock < in anx7625_calculate_m_n()
410 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) { in anx7625_calculate_m_n()
412 pixelclock * (*post_divider), in anx7625_calculate_m_n()
417 *m = pixelclock; in anx7625_calculate_m_n()
[all …]
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4.c163 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
257 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
339 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
631 hd->cfg.timings.pixelclock); in hdmi_audio_config()
H A Dhdmi5.c175 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
278 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
369 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
663 hd->cfg.timings.pixelclock); in hdmi_audio_config()
H A Ddisplay-sysfs.c98 t.pixelclock, in display_timings_show()
123 &t.pixelclock, in display_timings_store()
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-dv-timings-cap.rst81 - Minimum pixelclock frequency in Hz.
84 - Maximum pixelclock frequency in Hz.
H A Dvidioc-query-dv-timings.rst61 (e.g. because the pixelclock is out of range of the hardware
/linux/drivers/gpu/drm/xen/
H A Dxen_drm_front_conn.c81 videomode.pixelclock = width * height * XEN_DRM_CRTC_VREFRESH_HZ; in connector_get_modes()
/linux/drivers/media/test-drivers/vivid/
H A Dvivid-vid-cap.c376 u64 pixelclock; in vivid_update_format_cap() local
407 pixelclock = div_u64(bt->pixelclock * 1000, 1001); in vivid_update_format_cap()
410 pixelclock = bt->pixelclock; in vivid_update_format_cap()
414 size / 100, (u32)pixelclock / 100 in vivid_update_format_cap()
1462 h_freq = (u32)bt->pixelclock / total_h_pixel; in valid_cvt_gtf_timings()
1533 timings->bt.pixelclock = vivid_dv_timings_cap.bt.max_pixelclock * 2; in vidioc_query_dv_timings()
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso122 * display pixelclock * bpp / lanes / 2 = dsi clock
/linux/Documentation/fb/
H A Dmodedb.rst102 pixelclock, the horizontal sync frequency, or the vertical refresh rate.
105 It artificially increases the pixelclock because of its high blanking
107 data rate which requires that it conserves the pixelclock as much as possible.
/linux/drivers/gpu/drm/bridge/
H A Dtc358767.c595 static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock, in tc_pxl_pll_calc() argument
622 dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, in tc_pxl_pll_calc()
624 best_delta = pixelclock; in tc_pxl_pll_calc()
643 tmp = pixelclock * ext_div[i_pre] * in tc_pxl_pll_calc()
657 delta = clk - pixelclock; in tc_pxl_pll_calc()
672 pixelclock); in tc_pxl_pll_calc()
705 static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) in tc_pxl_pll_en() argument
710 ret = tc_pxl_pll_calc(tc, refclk, pixelclock, NULL, &pxl_pllparam); in tc_pxl_pll_en()
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dtilcdc.txt18 - max-pixelclock: The maximum pixel clock that can be supported
/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A Dconnector-analog-tv.c30 .pixelclock = 13500000,
H A Dconnector-hdmi.c23 .pixelclock = 25175000,
H A Dpanel-lgphilips-lb035q02.c22 .pixelclock = 6500000,
H A Dpanel-nec-nl8048hl11.c67 .pixelclock = LCD_PIXEL_CLOCK,
H A Dconnector-dvi.c22 .pixelclock = 23500000,
H A Dpanel-sharp-ls037v7dw01.c38 .pixelclock = 19200000,
/linux/drivers/video/fbdev/core/
H A Dfbmon.c1330 fbmode->pixclock = vm->pixelclock ? in fb_videomode_from_videomode()
1331 KHZ2PICOS(vm->pixelclock / 1000) : 0; in fb_videomode_from_videomode()
1352 fbmode->refresh = vm->pixelclock / total; in fb_videomode_from_videomode()

12