| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-simple.c | 862 .pixelclock = { 29930000, 33260000, 36590000 },
903 .pixelclock = { 34500000, 39600000, 50400000 },
933 .pixelclock = { 26400000, 33300000, 46800000 },
1039 .pixelclock = { 33300000, 34209000, 45000000 },
1067 .pixelclock = { 64000000, 68930000, 85000000 },
1140 .pixelclock = { 60000000, 74400000, 90000000 },
1164 .pixelclock = { 134000000, 141200000, 149000000 },
1194 .pixelclock = { 137000000, 141000000, 146000000 },
1249 .pixelclock = { 120000000, 144000000, 175000000 },
1279 .pixelclock = { 90000000, 108000000, 135000000 },
[all …]
|
| /linux/drivers/media/i2c/ |
| H A D | ths7303.c | 145 state->bt.pixelclock = 0; in ths7303_s_std_output()
170 if (state->bt.pixelclock > 120000000) in ths7303_config()
172 else if (state->bt.pixelclock > 70000000) in ths7303_config()
174 else if (state->bt.pixelclock > 20000000) in ths7303_config()
286 if (state->bt.pixelclock) { in ths7303_log_status()
296 (int)bt->pixelclock / in ths7303_log_status()
299 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
|
| H A D | adv7842.c | 1052 u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ? in configure_custom_video_timings()
1053 ((width * (ADV7842_fsc / 100)) / ((u32)bt->pixelclock / 100)) : 0; in configure_custom_video_timings()
1429 if ((pix_clk < bt->pixelclock + 1000000) && in stdi2dv_timings()
1430 (pix_clk > bt->pixelclock - 1000000)) { in stdi2dv_timings()
1567 bt->pixelclock = freq; in adv7842_query_dv_timings()
1598 freq < bt->pixelclock) { in adv7842_query_dv_timings()
1599 u32 reduced_freq = ((u32)bt->pixelclock / 1001) * 1000; in adv7842_query_dv_timings()
1602 if (delta_freq < ((u32)bt->pixelclock - reduced_freq) / 2) in adv7842_query_dv_timings()
|
| /linux/drivers/gpu/ipu-v3/ |
| H A D | ipu-di.c | 424 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
427 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
444 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
448 error = rate / (sig->mode.pixelclock / 1000); in ipu_di_config_clock()
465 clk_set_rate(clk, sig->mode.pixelclock); in ipu_di_config_clock()
468 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
495 sig->mode.pixelclock, in ipu_di_config_clock()
573 sig->mode.pixelclock); in ipu_di_init_sync_panel()
|
| /linux/drivers/video/ |
| H A D | videomode.c | 16 vm->pixelclock = dt->pixelclock.typ; in videomode_from_timing()
|
| H A D | of_display_timing.c | 73 ret |= parse_timing_property(np, "clock-frequency", &dt->pixelclock); in of_parse_display_timing()
|
| /linux/include/video/ |
| H A D | videomode.h | 19 unsigned long pixelclock; /* pixelclock in Hz */ member
|
| H A D | display_timing.h | 64 struct timing_entry pixelclock; member
|
| /linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | anx7625.c | 360 static int anx7625_calculate_m_n(u32 pixelclock, in anx7625_calculate_m_n() argument
365 if (pixelclock > PLL_OUT_FREQ_ABS_MAX / POST_DIVIDER_MIN) { in anx7625_calculate_m_n()
368 pixelclock, in anx7625_calculate_m_n()
373 if (pixelclock < PLL_OUT_FREQ_ABS_MIN / POST_DIVIDER_MAX) { in anx7625_calculate_m_n()
376 pixelclock, in anx7625_calculate_m_n()
382 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));) in anx7625_calculate_m_n()
387 (pixelclock < in anx7625_calculate_m_n()
410 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) { in anx7625_calculate_m_n()
412 pixelclock * (*post_divider), in anx7625_calculate_m_n()
417 *m = pixelclock; in anx7625_calculate_m_n()
[all …]
|
| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | hdmi4.c | 163 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
257 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
339 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
631 hd->cfg.timings.pixelclock); in hdmi_audio_config()
|
| H A D | hdmi5.c | 175 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo); in hdmi_power_on_full()
278 dispc_set_tv_pclk(timings->pixelclock); in hdmi_display_set_timing()
369 hdmi.cfg.timings.pixelclock); in hdmi_display_enable()
663 hd->cfg.timings.pixelclock); in hdmi_audio_config()
|
| H A D | display-sysfs.c | 98 t.pixelclock, in display_timings_show()
123 &t.pixelclock, in display_timings_store()
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | vidioc-dv-timings-cap.rst | 81 - Minimum pixelclock frequency in Hz.
84 - Maximum pixelclock frequency in Hz.
|
| H A D | vidioc-query-dv-timings.rst | 61 (e.g. because the pixelclock is out of range of the hardware
|
| /linux/drivers/gpu/drm/xen/ |
| H A D | xen_drm_front_conn.c | 81 videomode.pixelclock = width * height * XEN_DRM_CRTC_VREFRESH_HZ; in connector_get_modes()
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso | 122 * display pixelclock * bpp / lanes / 2 = dsi clock
|
| /linux/Documentation/fb/ |
| H A D | modedb.rst | 102 pixelclock, the horizontal sync frequency, or the vertical refresh rate.
105 It artificially increases the pixelclock because of its high blanking
107 data rate which requires that it conserves the pixelclock as much as possible.
|
| /linux/drivers/gpu/drm/bridge/ |
| H A D | tc358767.c | 595 static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock, in tc_pxl_pll_calc() argument
622 dev_dbg(tc->dev, "PLL: requested %d pixelclock, ref %d\n", pixelclock, in tc_pxl_pll_calc()
624 best_delta = pixelclock; in tc_pxl_pll_calc()
643 tmp = pixelclock * ext_div[i_pre] * in tc_pxl_pll_calc()
657 delta = clk - pixelclock; in tc_pxl_pll_calc()
672 pixelclock); in tc_pxl_pll_calc()
705 static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) in tc_pxl_pll_en() argument
710 ret = tc_pxl_pll_calc(tc, refclk, pixelclock, NULL, &pxl_pllparam); in tc_pxl_pll_en()
|
| /linux/Documentation/devicetree/bindings/display/tilcdc/ |
| H A D | tilcdc.txt | 18 - max-pixelclock: The maximum pixel clock that can be supported
|
| /linux/drivers/video/fbdev/omap2/omapfb/displays/ |
| H A D | connector-analog-tv.c | 30 .pixelclock = 13500000,
|
| H A D | connector-hdmi.c | 23 .pixelclock = 25175000,
|
| H A D | panel-lgphilips-lb035q02.c | 22 .pixelclock = 6500000,
|
| H A D | panel-nec-nl8048hl11.c | 67 .pixelclock = LCD_PIXEL_CLOCK,
|
| H A D | connector-dvi.c | 22 .pixelclock = 23500000,
|
| H A D | panel-sharp-ls037v7dw01.c | 38 .pixelclock = 19200000,
|