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Searched refs:pipes (Results 1 – 25 of 62) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/
H A Ddcn351_fpu.c472 display_e2e_pipe_params_st *pipes, in dcn351_populate_dml_pipes_from_context_fpu() argument
483 dcn31_populate_dml_pipes_from_context(dc, context, pipes, in dcn351_populate_dml_pipes_from_context_fpu()
503 pipes[pipe_cnt].pipe.dest.vtotal = in dcn351_populate_dml_pipes_from_context_fpu()
505 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn351_populate_dml_pipes_from_context_fpu()
506 pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
509 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
510 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn351_populate_dml_pipes_from_context_fpu()
515 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn351_populate_dml_pipes_from_context_fpu()
516 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn351_populate_dml_pipes_from_context_fpu()
517 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn351_populate_dml_pipes_from_context_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/
H A Ddcn35_fpu.c439 display_e2e_pipe_params_st *pipes, in dcn35_populate_dml_pipes_from_context_fpu() argument
450 dcn31_populate_dml_pipes_from_context(dc, context, pipes, in dcn35_populate_dml_pipes_from_context_fpu()
470 pipes[pipe_cnt].pipe.dest.vtotal = in dcn35_populate_dml_pipes_from_context_fpu()
472 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn35_populate_dml_pipes_from_context_fpu()
473 pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
476 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
477 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn35_populate_dml_pipes_from_context_fpu()
482 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn35_populate_dml_pipes_from_context_fpu()
483 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn35_populate_dml_pipes_from_context_fpu()
484 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn35_populate_dml_pipes_from_context_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c69 struct pipe_ctx *pipes[MAX_PIPES]; in dp_retrain_link_dp_test() local
88 link_get_master_pipes_with_dpms_on(link, state, &count, pipes); in dp_retrain_link_dp_test()
91 link_set_dpms_off(pipes[i]); in dp_retrain_link_dp_test()
92 pipes[i]->link_config.dp_link_settings = *link_setting; in dp_retrain_link_dp_test()
96 pipes[i]); in dp_retrain_link_dp_test()
99 pipes[i]->stream_res.tg->funcs->disable_crtc(pipes[i]->stream_res.tg); in dp_retrain_link_dp_test()
105 *pipes, &audio_output[0]); in dp_retrain_link_dp_test()
107 pipes[i]->clock_source->funcs->program_pix_clk( in dp_retrain_link_dp_test()
108 pipes[i]->clock_source, in dp_retrain_link_dp_test()
109 &pipes[i]->stream_res.pix_clk_params, in dp_retrain_link_dp_test()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c445 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
484 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp() argument
506 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()
507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
511 get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
513 …if (get_stutter_period(&context->bw_ctx.dml, pipes, pipe_cnt) < dc->debug.minimum_z8_residency_tim… in dcn31_calculate_wm_and_dlg_fp()
523 …context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
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/linux/drivers/platform/goldfish/
H A Dgoldfish_pipe.c197 struct goldfish_pipe **pipes; member
521 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
653 if (!dev->pipes[id]) in get_free_pipe_id_locked()
662 struct goldfish_pipe **pipes = in get_free_pipe_id_locked() local
663 kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC); in get_free_pipe_id_locked()
664 if (!pipes) in get_free_pipe_id_locked()
666 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); in get_free_pipe_id_locked()
667 kfree(dev->pipes); in get_free_pipe_id_locked()
668 dev->pipes = pipes; in get_free_pipe_id_locked()
731 dev->pipes[id] = pipe; in goldfish_pipe_open()
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H A DKconfig15 tristate "Goldfish virtual device for QEMU pipes"
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c46 const display_e2e_pipe_params_st *pipes,
54 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
82 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
84 recalculate_params(mode_lib, pipes, num_pipes); \
130 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
133 recalculate_params(mode_lib, pipes, num_pipes); \
209 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument
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H A Ddisplay_mode_lib.c162 display_e2e_pipe_params_st *pipes, in dml_log_pipe_params() argument
174 pipe_src = &(pipes[i].pipe.src); in dml_log_pipe_params()
175 pipe_dest = &(pipes[i].pipe.dest); in dml_log_pipe_params()
176 scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth); in dml_log_pipe_params()
177 scale_taps = &(pipes[i].pipe.scale_taps); in dml_log_pipe_params()
178 dout = &(pipes[i].dout); in dml_log_pipe_params()
179 clks_cfg = &(pipes[i].clks_cfg); in dml_log_pipe_params()
H A Ddisplay_mode_vba.h34 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
75 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
150 const display_e2e_pipe_params_st *pipes,
154 const display_e2e_pipe_params_st *pipes,
158 const display_e2e_pipe_params_st *pipes,
162 const display_e2e_pipe_params_st *pipes,
167 const display_e2e_pipe_params_st *pipes,
171 const display_e2e_pipe_params_st *pipes,
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_event.c110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-overview.rst50 For this hardware example, we have 4 pipes (if you don't know what AMD pipe
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
204 the two displays, we need to use 2 pipes. See the example below where we avoid
207 - 1 display (1 pipe) + MPO (1 pipe), we will use two pipes
208 - 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the
209 middle of both displays needs 2 pipes.
210 - 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.
217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c313 display_e2e_pipe_params_st *pipes) in dcn32_determine_det_override() argument
372 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
377 pipes[i].pipe.src.det_size_override = 4 * DCN3_2_DET_SEG_SIZE; //DCN3_2_DEFAULT_DET_SIZE in dcn32_determine_det_override()
382 display_e2e_pipe_params_st *pipes) in dcn32_set_det_allocations() argument
403 pipes[0].pipe.src.det_size_override = DCN3_2_MAX_DET_SIZE; in dcn32_set_det_allocations()
406 pipes[0].pipe.src.det_size_override = DCN3_2_DEFAULT_DET_SIZE; in dcn32_set_det_allocations()
407 pipes[0].pipe.src.unbounded_req_mode = true; in dcn32_set_det_allocations()
410 pipes[0].pipe.src.det_size_override = 320; // 5K or higher in dcn32_set_det_allocations()
414 dcn32_determine_det_override(dc, context, pipes); in dcn32_set_det_allocations()
751 display_e2e_pipe_params_st *pipes) in dcn32_update_dml_pipes_odm_policy_based_on_context() argument
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/linux/net/nfc/nci/
H A Dhci.c116 hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes()
117 hdev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes()
127 if (ndev->hci_dev->pipes[i].host == host) { in nci_hci_reset_pipes_per_host()
128 ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes_per_host()
129 ndev->hci_dev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes_per_host()
284 u8 gate = ndev->hci_dev->pipes[pipe].gate; in nci_hci_cmd_received()
313 ndev->hci_dev->pipes[new_pipe].gate = dest_gate; in nci_hci_cmd_received()
314 ndev->hci_dev->pipes[new_pipe].host = in nci_hci_cmd_received()
335 ndev->hci_dev->pipes[delete_info->pipe].gate = in nci_hci_cmd_received()
337 ndev->hci_dev->pipes[delete_info->pipe].host = in nci_hci_cmd_received()
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/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_dev.c189 evts->pipes[0] |= KOMEDA_EVENT_FLIP; in d71_irq_handler()
191 evts->pipes[1] |= KOMEDA_EVENT_FLIP; in d71_irq_handler()
205 evts->pipes[0] |= get_pipeline_event(d71->pipes[0], gcu_status); in d71_irq_handler()
208 evts->pipes[1] |= get_pipeline_event(d71->pipes[1], gcu_status); in d71_irq_handler()
228 pipe = d71->pipes[i]; in d71_enable_irq()
247 pipe = d71->pipes[i]; in d71_disable_irq()
261 struct d71_pipeline *pipe = d71->pipes[master_pipe]; in d71_on_off_vblank()
435 d71->pipes[i] = to_d71_pipeline(pipe); in d71_enum_resources()
578 malidp_write32_mask(d71->pipes[i]->lpu_addr, LPU_TBU_CONTROL, in d71_connect_iommu()
H A Dd71_component.c417 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*layer), in d71_layer_init()
536 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*wb_layer), in d71_wb_layer_init()
677 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*compiz), in d71_compiz_init()
846 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*scaler), in d71_scaler_init()
954 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*splitter), in d71_splitter_init()
1024 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*merger), in d71_merger_init()
1135 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*improc), in d71_improc_init()
1262 c = komeda_component_add(&d71->pipes[pipe_id]->base, sizeof(*ctrlr), in d71_timing_ctrlr_init()
1293 pipe = d71->pipes[blk_id]; in d71_probe_block()
1306 pipe = d71->pipes[blk_id]; in d71_probe_block()
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H A Dd71_dev.h41 struct d71_pipeline *pipes[D71_MAX_PIPELINE]; member
/linux/drivers/net/wireless/ath/ath6kl/
H A Dusb.c70 struct ath6kl_usb_pipe pipes[ATH6KL_USB_PIPE_MAX]; member
255 ath6kl_usb_free_pipe_resources(&ar_usb->pipes[i]); in ath6kl_usb_cleanup_pipe_resources()
358 pipe = &ar_usb->pipes[pipe_num]; in ath6kl_usb_setup_pipe_resources()
474 if (ar_usb->pipes[i].ar_usb != NULL) in ath6kl_usb_flush_all()
475 usb_kill_anchored_urbs(&ar_usb->pipes[i].urb_submitted); in ath6kl_usb_flush_all()
496 ar_usb->pipes[ATH6KL_USB_PIPE_RX_DATA].urb_cnt_thresh = 1; in ath6kl_usb_start_recv_pipes()
498 ath6kl_usb_post_recv_transfers(&ar_usb->pipes[ATH6KL_USB_PIPE_RX_DATA], in ath6kl_usb_start_recv_pipes()
652 pipe = &ar_usb->pipes[i]; in ath6kl_usb_create()
708 device->pipes[i].urb_cnt_thresh = in hif_start()
709 device->pipes[i].urb_alloc / 2; in hif_start()
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/linux/Documentation/driver-api/
H A Dxillybus.rst17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
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/linux/Documentation/filesystems/
H A Dsplice.rst2 splice and pipes
13 pipes API
/linux/net/nfc/hci/
H A Dcore.c42 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes()
43 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes()
54 if (hdev->pipes[i].dest_host != host) in nfc_hci_reset_pipes_per_host()
57 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes_per_host()
58 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes_per_host()
197 gate = hdev->pipes[pipe].gate; in nfc_hci_cmd_received()
218 hdev->pipes[create_info->pipe].gate = create_info->dest_gate; in nfc_hci_cmd_received()
219 hdev->pipes[create_info->pipe].dest_host = in nfc_hci_cmd_received()
240 hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; in nfc_hci_cmd_received()
241 hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_cmd_received()
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/linux/tools/perf/
H A Dbuiltin-record.c109 } pipes; member
1008 thread_data->pipes.msg[0] = -1; in record__thread_data_init_pipes()
1009 thread_data->pipes.msg[1] = -1; in record__thread_data_init_pipes()
1010 thread_data->pipes.ack[0] = -1; in record__thread_data_init_pipes()
1011 thread_data->pipes.ack[1] = -1; in record__thread_data_init_pipes()
1016 if (pipe(thread_data->pipes.msg)) in record__thread_data_open_pipes()
1019 if (pipe(thread_data->pipes.ack)) { in record__thread_data_open_pipes()
1020 close(thread_data->pipes.msg[0]); in record__thread_data_open_pipes()
1021 thread_data->pipes.msg[0] = -1; in record__thread_data_open_pipes()
1022 close(thread_data->pipes.msg[1]); in record__thread_data_open_pipes()
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/linux/drivers/gpu/drm/vc4/tests/
H A Dvc4_mock.c41 const struct vc4_mock_pipe_desc *pipes; member
47 .pipes = (struct vc4_mock_pipe_desc[]) { __VA_ARGS__ }, \
144 const struct vc4_mock_pipe_desc *pipe = &mock->pipes[i]; in __build_mock()
/linux/drivers/nfc/st-nci/
H A Dse.c230 ndev->hci_dev->pipes[pipe_info[2]].gate = in st_nci_hci_load_session()
232 ndev->hci_dev->pipes[pipe_info[2]].host = in st_nci_hci_load_session()
385 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_event_received()
386 u8 host = ndev->hci_dev->pipes[pipe].host; in st_nci_hci_event_received()
406 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_cmd_received()
413 ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID) in st_nci_hci_cmd_received()
/linux/drivers/nfc/st21nfca/
H A Dcore.c185 hdev->pipes[pipe_info[2]].gate = in st21nfca_hci_load_session()
187 hdev->pipes[pipe_info[2]].dest_host = in st21nfca_hci_load_session()
836 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_cmd_received()
843 hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID) in st21nfca_hci_cmd_received()
892 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_event_received()
893 u8 host = hdev->pipes[pipe].dest_host; in st21nfca_hci_event_received()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.h38 display_e2e_pipe_params_st *pipes,

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