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Searched refs:pipes (Results 1 – 25 of 58) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.h33 display_e2e_pipe_params_st *pipes);
37 display_e2e_pipe_params_st *pipes,
41 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
50 display_e2e_pipe_params_st *pipes,
65 enum dc_validate_mode validate_mode, display_e2e_pipe_params_st *pipes);
77 display_e2e_pipe_params_st *pipes,
80 dc_validate_mode, display_e2e_pipe_params_st *pipes);
87 display_e2e_pipe_params_st *pipes);
/linux/sound/sparc/
H A Ddbri.c31 * memory and a serial device (long pipes, no. 0-15) or between two serial
32 * devices (short pipes, no. 16-31), or simply send a fixed data to a serial
33 * device (short pipes).
36 * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes
313 struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ member
364 #define D_PAUSE 0x1 /* Flush long pipes */
421 #define D_TS_ANCHOR (7<<10) /* Starting short pipes */
575 * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr.
767 /* Initialize pipes */ in dbri_initialize()
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/linux/drivers/platform/goldfish/
H A Dgoldfish_pipe.c196 struct goldfish_pipe **pipes; member
520 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
652 if (!dev->pipes[id]) in get_free_pipe_id_locked()
661 struct goldfish_pipe **pipes = in get_free_pipe_id_locked() local
662 kzalloc_objs(*pipes, new_capacity, GFP_ATOMIC); in get_free_pipe_id_locked()
663 if (!pipes) in get_free_pipe_id_locked()
665 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); in get_free_pipe_id_locked()
666 kfree(dev->pipes); in get_free_pipe_id_locked()
667 dev->pipes = pipes; in get_free_pipe_id_locked()
730 dev->pipes[id] = pipe; in goldfish_pipe_open()
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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_event.c110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-overview.rst50 For this hardware example, we have 4 pipes (if you don't know what AMD pipe
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
204 the two displays, we need to use 2 pipes. See the example below where we avoid
207 - 1 display (1 pipe) + MPO (1 pipe), we will use two pipes
208 - 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the
209 middle of both displays needs 2 pipes.
210 - 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.
217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.h35 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
43 display_e2e_pipe_params_st *pipes,
57 display_e2e_pipe_params_st *pipes,
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_dc_resource_mgmt.c142 struct dc_state *state, unsigned int plane_id, unsigned int *pipes) in find_pipes_assigned_to_plane() argument
163 pipes[num_found++] = mpc_pipe->pipe_idx; in find_pipes_assigned_to_plane()
483 static void sort_pipes_for_splitting(struct dc_plane_pipe_pool *pipes) in sort_pipes_for_splitting() argument
489 …for (odm_slice_index = 0; odm_slice_index < pipes->num_pipes_assigned_to_plane_for_odm_combine; od… in sort_pipes_for_splitting()
493 if (pipes->num_pipes_assigned_to_plane_for_mpcc_combine <= 1) in sort_pipes_for_splitting()
501 …if (pipes->pipes_assigned_to_plane[odm_slice_index][cur_index] > pipes->pipes_assigned_to_plane[od… in sort_pipes_for_splitting()
502 swap(pipes->pipes_assigned_to_plane[odm_slice_index][cur_index + 1], in sort_pipes_for_splitting()
503 pipes->pipes_assigned_to_plane[odm_slice_index][cur_index]); in sort_pipes_for_splitting()
510 if (cur_index == pipes->num_pipes_assigned_to_plane_for_mpcc_combine - 1) { in sort_pipes_for_splitting()
597 …ream(struct dml2_context *ctx, struct dc_state *state, unsigned int stream_id, unsigned int *pipes) in find_pipes_assigned_to_stream() argument
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/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c1778 display_e2e_pipe_params_st *pipes, in dcn31x_populate_dml_pipes_from_context() argument
1786 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31x_populate_dml_pipes_from_context()
1789 pipes[i].pipe.src.gpuvm = 1; in dcn31x_populate_dml_pipes_from_context()
1792 pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled; in dcn31x_populate_dml_pipes_from_context()
1794 pipes[i].pipe.src.hostvm = false; in dcn31x_populate_dml_pipes_from_context()
1796 pipes[i].pipe.src.hostvm = true; in dcn31x_populate_dml_pipes_from_context()
1803 display_e2e_pipe_params_st *pipes, in dcn31_populate_dml_pipes_from_context() argument
1812 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31_populate_dml_pipes_from_context()
1832 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
1833 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn31_populate_dml_pipes_from_context()
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/linux/net/nfc/nci/
H A Dhci.c116 hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes()
117 hdev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes()
127 if (ndev->hci_dev->pipes[i].host == host) { in nci_hci_reset_pipes_per_host()
128 ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes_per_host()
129 ndev->hci_dev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes_per_host()
284 u8 gate = ndev->hci_dev->pipes[pipe].gate; in nci_hci_cmd_received()
313 ndev->hci_dev->pipes[new_pipe].gate = dest_gate; in nci_hci_cmd_received()
314 ndev->hci_dev->pipes[new_pipe].host = in nci_hci_cmd_received()
335 ndev->hci_dev->pipes[delete_info->pipe].gate = in nci_hci_cmd_received()
337 ndev->hci_dev->pipes[delete_info->pipe].host = in nci_hci_cmd_received()
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/linux/Documentation/driver-api/
H A Dxillybus.rst17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
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/linux/tools/testing/selftests/kvm/lib/
H A Duserfaultfd_util.c123 TEST_ASSERT(uffd_desc->pipefds, "Failed to alloc pipes"); in uffd_setup_demand_paging()
156 int pipes[2]; in uffd_setup_demand_paging() local
158 ret = pipe2((int *) &pipes, O_CLOEXEC | O_NONBLOCK); in uffd_setup_demand_paging()
162 uffd_desc->pipefds[i] = pipes[1]; in uffd_setup_demand_paging()
168 uffd_desc->reader_args[i].pipe = pipes[0]; in uffd_setup_demand_paging()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c1856 display_e2e_pipe_params_st *pipes, in dcn32_enable_phantom_stream() argument
1872 …dcn32_set_phantom_stream_timing(dc, context, ref_pipe, phantom_stream, pipes, pipe_cnt, dc_pipe_id… in dcn32_enable_phantom_stream()
1883 display_e2e_pipe_params_st *pipes, in dcn32_add_phantom_pipes() argument
1893 phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); in dcn32_add_phantom_pipes()
1924 display_e2e_pipe_params_st *pipes = kzalloc_objs(display_e2e_pipe_params_st, in dml1_validate() local
1937 if (!pipes) in dml1_validate()
1941 out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, validate_mode); in dml1_validate()
1957 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); in dml1_validate()
1977 kfree(pipes); in dml1_validate()
2038 display_e2e_pipe_params_st *pipes, in dcn32_populate_dml_pipes_from_context() argument
[all …]
/linux/Documentation/filesystems/
H A Dsplice.rst2 splice and pipes
13 pipes API
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c1828 display_e2e_pipe_params_st *pipes, in dcn315_populate_dml_pipes_from_context() argument
1840 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn315_populate_dml_pipes_from_context()
1856 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1858 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1859 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1860 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1861 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1863 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1865 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1880 pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate; in dcn315_populate_dml_pipes_from_context()
[all …]
/linux/net/nfc/hci/
H A Dcore.c42 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes()
43 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes()
54 if (hdev->pipes[i].dest_host != host) in nfc_hci_reset_pipes_per_host()
57 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes_per_host()
58 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes_per_host()
197 gate = hdev->pipes[pipe].gate; in nfc_hci_cmd_received()
218 hdev->pipes[create_info->pipe].gate = create_info->dest_gate; in nfc_hci_cmd_received()
219 hdev->pipes[create_info->pipe].dest_host = in nfc_hci_cmd_received()
240 hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; in nfc_hci_cmd_received()
241 hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_cmd_received()
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/linux/drivers/gpu/drm/vc4/tests/
H A Dvc4_mock.c41 const struct vc4_mock_pipe_desc *pipes; member
47 .pipes = (struct vc4_mock_pipe_desc[]) { __VA_ARGS__ }, \
144 const struct vc4_mock_pipe_desc *pipe = &mock->pipes[i]; in __build_mock()
/linux/tools/perf/
H A Dbuiltin-record.c111 } pipes;
998 thread_data->pipes.msg[0] = -1; in record__kcore_copy()
999 thread_data->pipes.msg[1] = -1; in record__kcore_copy()
1000 thread_data->pipes.ack[0] = -1; in record__kcore_copy()
1001 thread_data->pipes.ack[1] = -1; in record__kcore_copy()
1006 if (pipe(thread_data->pipes.msg)) in record__thread_data_init_pipes()
1009 if (pipe(thread_data->pipes.ack)) { in record__thread_data_init_pipes()
1010 close(thread_data->pipes.msg[0]); in record__thread_data_init_pipes()
1011 thread_data->pipes.msg[0] = -1; in record__thread_data_init_pipes()
1012 close(thread_data->pipes in record__thread_data_init_pipes()
109 } pipes; global() member
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/linux/drivers/nfc/st-nci/
H A Dse.c230 ndev->hci_dev->pipes[pipe_info[2]].gate = in st_nci_hci_load_session()
232 ndev->hci_dev->pipes[pipe_info[2]].host = in st_nci_hci_load_session()
385 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_event_received()
386 u8 host = ndev->hci_dev->pipes[pipe].host; in st_nci_hci_event_received()
406 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_cmd_received()
413 ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID) in st_nci_hci_cmd_received()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1480 display_e2e_pipe_params_st *pipes, in dcn30_populate_dml_pipes_from_context() argument
1488 dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn30_populate_dml_pipes_from_context()
1495 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1503 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_writeback_from_context() argument
1506 dcn30_fpu_populate_dml_writeback_from_context(dc, res_ctx, pipes); in dcn30_populate_dml_writeback_from_context()
1536 display_e2e_pipe_params_st *pipes, in dcn30_set_mcif_arb_params() argument
1568 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j); in dcn30_set_mcif_arb_params()
1788 display_e2e_pipe_params_st *pipes, in dcn30_internal_validate_bw() argument
1803 ASSERT(pipes); in dcn30_internal_validate_bw()
1804 if (!pipes) in dcn30_internal_validate_bw()
[all …]
/linux/drivers/staging/media/atomisp/pci/
H A Dsh_css.c125 struct ia_css_pipe *pipes[IA_CSS_PIPE_ID_NUM]; member
1209 assert(stream->pipes[i]); in sh_css_invalidate_shading_tables()
1210 sh_css_pipe_free_shading_table(stream->pipes[i]); in sh_css_invalidate_shading_tables()
1522 ia_css_pipeline_map(stream->pipes[i]->pipe_num, map); in map_sp_threads()
1608 main_pipe = stream->pipes[i]; in create_host_pipeline_structure()
1739 switch (stream->pipes[i]->mode) { in create_host_pipeline()
1741 err = create_host_preview_pipeline(stream->pipes[i]); in create_host_pipeline()
1744 err = create_host_video_pipeline(stream->pipes[i]); in create_host_pipeline()
1747 err = create_host_capture_pipeline(stream->pipes[i]); in create_host_pipeline()
1750 err = create_host_yuvpp_pipeline(stream->pipes[i]); in create_host_pipeline()
[all …]
/linux/drivers/nfc/st21nfca/
H A Dcore.c185 hdev->pipes[pipe_info[2]].gate = in st21nfca_hci_load_session()
187 hdev->pipes[pipe_info[2]].dest_host = in st21nfca_hci_load_session()
834 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_cmd_received()
841 hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID) in st21nfca_hci_cmd_received()
890 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_event_received()
891 u8 host = hdev->pipes[pipe].dest_host; in st21nfca_hci_event_received()
/linux/drivers/staging/media/ipu3/
H A Dipu3-css.c653 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_pipeline_cleanup()
687 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_pipeline_init()
1162 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_binary_cleanup()
1185 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_binary_preallocate()
1217 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_binary_setup()
1375 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_stop_streaming()
1396 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_pipe_queue_empty()
1425 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_map_init()
1467 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_pipe_cleanup()
1513 struct imgu_css_pipe *css_pipe = &css->pipes[pipe]; in imgu_css_init()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.h38 display_e2e_pipe_params_st *pipes,
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c1771 display_e2e_pipe_params_st *pipes, in dcn316_populate_dml_pipes_from_context() argument
1781 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn316_populate_dml_pipes_from_context()
1797 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn316_populate_dml_pipes_from_context()
1799 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn316_populate_dml_pipes_from_context()
1800 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn316_populate_dml_pipes_from_context()
1801 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn316_populate_dml_pipes_from_context()
1802 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn316_populate_dml_pipes_from_context()
1804 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn316_populate_dml_pipes_from_context()
1807 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn316_populate_dml_pipes_from_context()
1810 pipes[pipe_cnt].dout.dsc_input_bpc = 8; in dcn316_populate_dml_pipes_from_context()
[all …]
/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_dev.h41 struct d71_pipeline *pipes[D71_MAX_PIPELINE]; member

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