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Searched refs:pipe_config (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dg4x_dp.c61 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
83 if (pipe_config->port_clock == divisor[i].dot) { in g4x_dp_set_clock()
84 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock()
85 pipe_config->clock_set = true; in g4x_dp_set_clock()
93 const struct intel_crtc_state *pipe_config) in intel_dp_prepare() argument
98 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_prepare()
99 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_prepare()
102 pipe_config->port_clock, in intel_dp_prepare()
103 pipe_config->lane_count); in intel_dp_prepare()
128 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
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H A Dintel_dvo.c162 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
168 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
180 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
182 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
202 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
210 &pipe_config->hw.mode, in intel_enable_dvo()
211 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
255 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
260 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_compute_config()
281 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config()
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H A Dicl_dsi.c295 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
304 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in configure_dual_link_mode()
320 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
700 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
704 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in gen11_dsi_configure_transcoder()
720 if (afe_clk(encoder, pipe_config) >= 1500 * 1000) { in gen11_dsi_configure_transcoder()
752 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
821 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
1226 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_enable() argument
1230 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable()
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H A Dintel_display.c2876 struct intel_crtc_state *pipe_config) in intel_get_transcoder_timings() argument
2879 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_get_transcoder_timings()
2880 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_get_transcoder_timings()
2913 if (intel_pipe_is_interlaced(pipe_config)) { in intel_get_transcoder_timings()
2920 pipe_config->set_context_latency = in intel_get_transcoder_timings()
2925 pipe_config->set_context_latency; in intel_get_transcoder_timings()
2934 pipe_config->set_context_latency = in intel_get_transcoder_timings()
2939 pipe_config->min_hblank = intel_de_read(display, in intel_get_transcoder_timings()
2961 struct intel_crtc_state *pipe_config) in intel_get_pipe_src_size() argument
2968 drm_rect_init(&pipe_config->pipe_src, 0, 0, in intel_get_pipe_src_size()
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H A Dintel_tv.c929 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
935 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc)); in intel_enable_tv()
1092 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1096 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1104 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1126 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1153 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); in intel_tv_get_config()
1169 pipe_config->mode_flags |= in intel_tv_get_config()
1191 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1196 to_intel_atomic_state(pipe_config->uapi.state); in intel_tv_compute_config()
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H A Dintel_vdsc.c292 static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config, in intel_dsc_slice_dimensions_valid() argument
295 if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB || in intel_dsc_slice_dimensions_valid()
296 pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { in intel_dsc_slice_dimensions_valid()
301 } else if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { in intel_dsc_slice_dimensions_valid()
324 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) in intel_dsc_compute_params() argument
326 struct intel_display *display = to_intel_display(pipe_config); in intel_dsc_compute_params()
327 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
328 u16 compressed_bpp = fxp_q4_to_int(pipe_config->dsc.compressed_bpp_x16); in intel_dsc_compute_params()
332 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
335 intel_dsc_line_slice_count(&pipe_config->dsc.slice_config)); in intel_dsc_compute_params()
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H A Dintel_sdvo.c1282 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1284 struct intel_display *display = to_intel_display(pipe_config); in i9xx_adjust_sdvo_tv_clock()
1285 unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock; in i9xx_adjust_sdvo_tv_clock()
1286 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1310 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1358 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1365 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_sdvo_compute_config()
1366 struct drm_display_mode *mode = &pipe_config->hw.mode; in intel_sdvo_compute_config()
1369 pipe_config->has_pch_encoder = true; in intel_sdvo_compute_config()
1370 if (!intel_link_bw_compute_pipe_bpp(pipe_config)) in intel_sdvo_compute_config()
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H A Dintel_vdsc.h29 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
/linux/drivers/usb/renesas_usbhs/
H A Dpipe.c477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
/linux/drivers/net/wireless/ath/ath10k/
H A Dpci.c2373 ar_pci->pipe_config, in ath10k_pci_init_config()
2483 config = &ar_pci->pipe_config[5]; in ath10k_pci_override_ce_config()
3475 ar_pci->pipe_config = kmemdup(pci_target_ce_config_wlan, in ath10k_pci_setup_resource()
3478 if (!ar_pci->pipe_config) { in ath10k_pci_setup_resource()
3506 kfree(ar_pci->pipe_config); in ath10k_pci_setup_resource()
3521 kfree(ar_pci->pipe_config); in ath10k_pci_release_resource()
/linux/drivers/staging/media/atomisp/pci/
H A Dsh_css.c126 struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; member
4325 struct ia_css_pipe_config *pipe_config) in sh_css_pipe_get_shading_info() argument
4340 shading_info, pipe_config); in sh_css_pipe_get_shading_info()
7455 void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) in ia_css_pipe_config_defaults() argument
7458 memcpy(pipe_config, &ia_css_pipe_default_config, sizeof(*pipe_config)); in ia_css_pipe_config_defaults()
8175 my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; in ia_css_stream_create()
/linux/drivers/staging/media/atomisp/pci/runtime/binary/src/
H A Dbinary.c275 struct ia_css_pipe_config *pipe_config) /* [out] */ in ia_css_binary_get_shading_info() argument
/linux/drivers/staging/media/ipu3/
H A Dipu3-css.c1021 sp_group->pipe[pipe].pipe_config = in imgu_css_pipeline_init()
1023 sp_group->pipe[pipe].pipe_config |= IMGU_ABI_PIPE_CONFIG_ACQUIRE_ISP; in imgu_css_pipeline_init()
H A Dipu3-abi.h1781 u32 pipe_config; /* the pipe config */ member
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c210 tiling_info->gfx8.pipe_config = in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()