| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp_mst.c | 639 struct intel_crtc_state *pipe_config, in mst_stream_compute_link_for_joined_pipes() argument 646 &pipe_config->hw.adjusted_mode; in mst_stream_compute_link_for_joined_pipes() 653 intel_dp_dsc_reset_config(pipe_config); in mst_stream_compute_link_for_joined_pipes() 659 pipe_config, false, &limits); in mst_stream_compute_link_for_joined_pipes() 662 ret = mst_stream_compute_link_config(intel_dp, pipe_config, in mst_stream_compute_link_for_joined_pipes() 677 if (dsc_needed && !intel_dp_supports_dsc(intel_dp, connector, pipe_config)) { in mst_stream_compute_link_for_joined_pipes() 692 pipe_config, true, in mst_stream_compute_link_for_joined_pipes() 708 ret = mst_stream_dsc_compute_link_config(intel_dp, pipe_config, in mst_stream_compute_link_for_joined_pipes() 713 ret = intel_dp_dsc_compute_config(intel_dp, pipe_config, in mst_stream_compute_link_for_joined_pipes() 715 pipe_config->dp_m_n.tu); in mst_stream_compute_link_for_joined_pipes() [all …]
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| H A D | intel_dp.c | 1572 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument 1581 !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) in intel_dp_source_supports_fec() 1589 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument 1591 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec() 1709 struct intel_crtc_state *pipe_config, in intel_dp_compute_link_config_wide() argument 1714 int bpp, clock = intel_dp_mode_clock(pipe_config, conn_state); in intel_dp_compute_link_config_wide() 1725 intel_dp_output_format_link_bpp_x16(pipe_config->output_format, bpp); in intel_dp_compute_link_config_wide() 1732 &pipe_config->hw.adjusted_mode; in intel_dp_compute_link_config_wide() 1745 pipe_config->lane_count = link_config.lane_count; in intel_dp_compute_link_config_wide() 1746 pipe_config->pipe_bpp = bpp; in intel_dp_compute_link_config_wide() [all …]
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| H A D | intel_ddi.c | 410 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument 413 if (pipe_config->has_pch_encoder) in ddi_dotclock_get() 416 pipe_config->hw.adjusted_mode.crtc_clock = in ddi_dotclock_get() 417 intel_crtc_dotclock(pipe_config); in ddi_dotclock_get() 2509 struct intel_crtc_state *pipe_config) in intel_ddi_mso_get_config() argument 2511 struct intel_display *display = to_intel_display(pipe_config); in intel_ddi_mso_get_config() 2512 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_ddi_mso_get_config() 2521 pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; in intel_ddi_mso_get_config() 2522 if (!pipe_config->splitter.enable) in intel_ddi_mso_get_config() 2526 pipe_config->splitter.enable = false; in intel_ddi_mso_get_config() [all …]
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| H A D | intel_vdsc.h | 29 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
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| H A D | intel_hdmi.h | 30 struct intel_crtc_state *pipe_config,
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| H A D | intel_psr.c | 1895 struct intel_crtc_state *pipe_config) in intel_psr_get_config() argument 1899 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_psr_get_config() 1915 pipe_config->has_psr = pipe_config->has_panel_replay = true; in intel_psr_get_config() 1921 pipe_config->has_psr = true; in intel_psr_get_config() 1924 pipe_config->has_sel_update = intel_dp->psr.sel_update_enabled; in intel_psr_get_config() 1925 pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC); in intel_psr_get_config() 1934 pipe_config->enable_psr2_sel_fetch = true; in intel_psr_get_config() 1937 pipe_config->enable_psr2_su_region_et = intel_dp->psr.su_region_et_enabled; in intel_psr_get_config()
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| H A D | intel_hdcp.c | 2443 const struct intel_crtc_state *pipe_config, in _intel_hdcp_enable() argument 2463 if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { in _intel_hdcp_enable() 2464 hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; in _intel_hdcp_enable() 2465 hdcp->stream_transcoder = pipe_config->cpu_transcoder; in _intel_hdcp_enable() 2467 hdcp->cpu_transcoder = pipe_config->cpu_transcoder; in _intel_hdcp_enable()
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| H A D | intel_display_types.h | 232 struct intel_crtc_state *pipe_config); 2026 const struct intel_crtc_state *pipe_config);
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| /linux/drivers/usb/renesas_usbhs/ |
| H A D | pipe.c | 477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local 489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff() 490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff() 507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local 509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
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| /linux/drivers/staging/media/atomisp/pci/ |
| H A D | sh_css.c | 127 struct ia_css_pipe_config pipe_config[IA_CSS_PIPE_ID_NUM]; member 4325 struct ia_css_pipe_config *pipe_config) in sh_css_pipe_get_shading_info() argument 4340 shading_info, pipe_config); in sh_css_pipe_get_shading_info() 7448 void ia_css_pipe_config_defaults(struct ia_css_pipe_config *pipe_config) in ia_css_pipe_config_defaults() argument 7451 memcpy(pipe_config, &ia_css_pipe_default_config, sizeof(*pipe_config)); in ia_css_pipe_config_defaults() 8167 my_css_save.stream_seeds[i].pipe_config[j] = pipes[j]->config; in ia_css_stream_create()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | atombios_crtc.c | 1339 u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; in dce4_crtc_do_set_base() local 1341 fb_format |= CIK_GRPH_PIPE_CONFIG(pipe_config); in dce4_crtc_do_set_base()
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| /linux/drivers/staging/media/ipu3/ |
| H A D | ipu3-css.c | 1021 sp_group->pipe[pipe].pipe_config = in imgu_css_pipeline_init() 1023 sp_group->pipe[pipe].pipe_config |= IMGU_ABI_PIPE_CONFIG_ACQUIRE_ISP; in imgu_css_pipeline_init()
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| H A D | ipu3-abi.h | 1781 u32 pipe_config; /* the pipe config */ member
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 221 tiling_info->gfx8.pipe_config = AMD_FMT_MOD_GET(PIPE_CONFIG, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
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