| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 475 int i, pipe_cnt; in dcn351_populate_dml_pipes_from_context_fpu() local
486 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn351_populate_dml_pipes_from_context_fpu()
503 pipes[pipe_cnt].pipe.dest.vtotal = in dcn351_populate_dml_pipes_from_context_fpu()
505 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn351_populate_dml_pipes_from_context_fpu()
506 pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
509 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
510 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn351_populate_dml_pipes_from_context_fpu()
515 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn351_populate_dml_pipes_from_context_fpu()
516 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn351_populate_dml_pipes_from_context_fpu()
517 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn351_populate_dml_pipes_from_context_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 442 int i, pipe_cnt; in dcn35_populate_dml_pipes_from_context_fpu() local
453 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn35_populate_dml_pipes_from_context_fpu()
470 pipes[pipe_cnt].pipe.dest.vtotal = in dcn35_populate_dml_pipes_from_context_fpu()
472 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn35_populate_dml_pipes_from_context_fpu()
473 pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
476 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
477 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn35_populate_dml_pipes_from_context_fpu()
482 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn35_populate_dml_pipes_from_context_fpu()
483 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn35_populate_dml_pipes_from_context_fpu()
484 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn35_populate_dml_pipes_from_context_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 446 int pipe_cnt) in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
485 int pipe_cnt, in dcn31_calculate_wm_and_dlg_fp() argument
501 if (pipe_cnt == 0) { in dcn31_calculate_wm_and_dlg_fp()
511 get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
513 …if (get_stutter_period(&context->bw_ctx.dml, pipes, pipe_cnt) < dc->debug.minimum_z8_residency_tim… in dcn31_calculate_wm_and_dlg_fp()
523 …bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
524 …state_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
525 …a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 318 uint8_t pipe_cnt = 0; in dcn32_determine_det_override() local
369 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_determine_det_override()
372 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
373 pipe_cnt++; in dcn32_determine_det_override()
384 int i, pipe_cnt; in dcn32_set_det_allocations() local
389 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_set_det_allocations()
395 pipe_cnt++; in dcn32_set_det_allocations()
402 if (pipe_cnt == 1) { in dcn32_set_det_allocations()
753 int i, pipe_cnt; in dcn32_update_dml_pipes_odm_policy_based_on_context() local
757 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_update_dml_pipes_odm_policy_based_on_context()
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| H A D | dcn32_resource.c | 1686 unsigned int pipe_cnt, in dcn32_enable_phantom_stream() argument
1701 …dcn32_set_phantom_stream_timing(dc, context, ref_pipe, phantom_stream, pipes, pipe_cnt, dc_pipe_id… in dcn32_enable_phantom_stream()
1713 unsigned int pipe_cnt, in dcn32_add_phantom_pipes() argument
1722 phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); in dcn32_add_phantom_pipes()
1752 int pipe_cnt = 0; in dml1_validate() local
1770 out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, validate_mode); in dml1_validate()
1773 if (pipe_cnt == 0) in dml1_validate()
1786 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); in dml1_validate()
1870 int i, pipe_cnt; in dcn32_populate_dml_pipes_from_context() local
1903 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1669 int i, pipe_cnt, crb_idx, crb_pipes; in dcn315_populate_dml_pipes_from_context() local
1680 for (i = 0, pipe_cnt = 0, crb_pipes = 0; i < dc->res_pool->pipe_count; i++) { in dcn315_populate_dml_pipes_from_context()
1693 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1695 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1696 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1697 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1698 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1700 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1702 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1717 pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate; in dcn315_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1620 uint32_t pipe_cnt; in dcn31x_populate_dml_pipes_from_context() local
1625 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31x_populate_dml_pipes_from_context()
1627 for (i = 0; i < pipe_cnt; i++) { in dcn31x_populate_dml_pipes_from_context()
1637 return pipe_cnt; in dcn31x_populate_dml_pipes_from_context()
1645 int i, pipe_cnt; in dcn31_populate_dml_pipes_from_context() local
1654 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn31_populate_dml_pipes_from_context()
1671 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
1672 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn31_populate_dml_pipes_from_context()
1673 pipes[pipe_cnt].pipe.src.gpuvm = true; in dcn31_populate_dml_pipes_from_context()
1674 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn31_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 1614 int i, pipe_cnt; in dcn316_populate_dml_pipes_from_context() local
1623 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn316_populate_dml_pipes_from_context()
1636 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn316_populate_dml_pipes_from_context()
1638 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn316_populate_dml_pipes_from_context()
1639 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn316_populate_dml_pipes_from_context()
1640 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn316_populate_dml_pipes_from_context()
1641 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn316_populate_dml_pipes_from_context()
1643 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn316_populate_dml_pipes_from_context()
1646 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn316_populate_dml_pipes_from_context()
1649 pipes[pipe_cnt].dout.dsc_input_bpc = 8; in dcn316_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1323 int i, pipe_cnt; in dcn30_populate_dml_pipes_from_context() local
1330 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_pipes_from_context()
1334 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1338 return pipe_cnt; in dcn30_populate_dml_pipes_from_context()
1376 int pipe_cnt) in dcn30_set_mcif_arb_params() argument
1406 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j); in dcn30_set_mcif_arb_params()
1637 int pipe_cnt, i, pipe_idx, vlevel = 0; in dcn30_internal_validate_bw() local
1648 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode); in dcn30_internal_validate_bw()
1650 if (!pipe_cnt) { in dcn30_internal_validate_bw()
1655 dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.h | 39 int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 92 int pipe_cnt,
187 int pipe_cnt);
213 unsigned int pipe_cnt,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_lib.h | 106 int pipe_cnt);
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| H A D | display_mode_lib.c | 163 int pipe_cnt) in dml_log_pipe_params() argument
173 for (i = 0; i < pipe_cnt; i++) { in dml_log_pipe_params()
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| /linux/drivers/usb/host/ |
| H A D | r8a66597.h | 79 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
120 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; member
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| H A D | r8a66597-hcd.c | 689 if (r8a66597->pipe_cnt[min] > r8a66597->pipe_cnt[array[i]]) in get_empty_pipenum()
806 r8a66597->pipe_cnt[pipe->info.pipenum]++; in enable_r8a66597_pipe()
807 dev->pipe_cnt[pipe->info.pipenum]++; in enable_r8a66597_pipe()
868 if (!dev->pipe_cnt[pipenum]) in disable_r8a66597_pipe_all()
876 r8a66597->pipe_cnt[pipenum] -= dev->pipe_cnt[pipenum]; in disable_r8a66597_pipe_all()
877 dev->pipe_cnt[pipenum] = 0; in disable_r8a66597_pipe_all()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 780 int pipe_cnt, i, pipe_idx, vlevel; in dcn21_fast_validate_bw() local
788 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode); in dcn21_fast_validate_bw()
790 *pipe_cnt_out = pipe_cnt; in dcn21_fast_validate_bw()
792 if (!pipe_cnt) { in dcn21_fast_validate_bw()
803 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn21_fast_validate_bw()
815 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn21_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 1673 int pipe_cnt; in dcn314_populate_dml_pipes_from_context() local
1676 pipe_cnt = dcn314_populate_dml_pipes_from_context_fpu(dc, context, pipes, validate_mode); in dcn314_populate_dml_pipes_from_context()
1679 return pipe_cnt; in dcn314_populate_dml_pipes_from_context()
1707 int pipe_cnt = 0; in dcn314_validate_bandwidth() local
1719 out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, validate_mode, false); in dcn314_validate_bandwidth()
1723 if (pipe_cnt == 0) in dcn314_validate_bandwidth()
1736 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); in dcn314_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1598 int pipe_cnt) in dcn20_set_mcif_arb_params() argument
1627 dcn20_fpu_set_wb_arb_params(wb_arb_params, context, pipes, pipe_cnt, i); in dcn20_set_mcif_arb_params()
2017 int pipe_cnt, i, pipe_idx, vlevel; in dcn20_fast_validate_bw() local
2025 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, validate_mode); in dcn20_fast_validate_bw()
2027 *pipe_cnt_out = pipe_cnt; in dcn20_fast_validate_bw()
2029 if (!pipe_cnt) { in dcn20_fast_validate_bw()
2034 vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn20_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 1375 int pipe_cnt, in dcn301_calculate_wm_and_dlg() argument
1379 dcn301_fpu_calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel_req); in dcn301_calculate_wm_and_dlg()
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