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Searched refs:phy_state (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/scsi/libsas/
H A Dsas_expander.c33 ex_phy->phy_state = PHY_DEVICE_DISCOVERED; in sas_port_add_ex_phy()
225 phy->phy_state = PHY_VACANT; in sas_set_ex_phy()
228 phy->phy_state = PHY_NOT_PRESENT; in sas_set_ex_phy()
231 phy->phy_state = PHY_EMPTY; /* do not know yet */ in sas_set_ex_phy()
241 if (phy->phy_state == PHY_VACANT) { in sas_set_ex_phy()
633 if (phy->phy_state == PHY_VACANT || in sas_ex_disable_port()
634 phy->phy_state == PHY_NOT_PRESENT) in sas_ex_disable_port()
758 if (phy->phy_state == PHY_VACANT || in sas_ex_get_linkrate()
759 phy->phy_state == PHY_NOT_PRESENT) in sas_ex_get_linkrate()
1071 if (phy->phy_state == PHY_VACANT || in sas_find_sub_addr()
[all …]
/linux/drivers/net/phy/
H A Dphylink.c73 struct phylink_link_state phy_state; member
1454 link_state = pl->phy_state; in phylink_mac_initial_config()
1634 link_state = pl->phy_state; in phylink_resolve()
1655 link_state.link &= pl->phy_state.link; in phylink_resolve()
1658 if (phy && pl->phy_state.link) { in phylink_resolve()
1662 if (link_state.interface != pl->phy_state.interface) { in phylink_resolve()
1667 link_state.interface = pl->phy_state.interface; in phylink_resolve()
1672 if (pl->phy_state.rate_matching) { in phylink_resolve()
1674 pl->phy_state.rate_matching; in phylink_resolve()
1675 link_state.speed = pl->phy_state.speed; in phylink_resolve()
[all …]
H A Dphy.c48 static const char *phy_state_to_str(enum phy_state st) in phy_state_to_str()
65 enum phy_state old_state) in phy_process_state_change()
1519 enum phy_state old_state = phydev->state; in _phy_state_machine()
1643 enum phy_state old_state; in phy_stop()
/linux/drivers/scsi/pm8001/
H A Dpm8001_sas.c258 if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) { in pm8001_phy_control()
267 if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) { in pm8001_phy_control()
276 if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) { in pm8001_phy_control()
290 if (pm8001_ha->phy[phy_id].phy_state == in pm8001_phy_control()
298 if (pm8001_ha->phy[phy_id].phy_state == in pm8001_phy_control()
H A Dpm8001_hwi.c109 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[0] = in read_general_status_table()
111 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[1] = in read_general_status_table()
113 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[2] = in read_general_status_table()
115 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[3] = in read_general_status_table()
117 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[4] = in read_general_status_table()
119 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[5] = in read_general_status_table()
121 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[6] = in read_general_status_table()
123 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[7] = in read_general_status_table()
3125 phy->phy_state = PHY_STATE_LINK_UP_SPC; in hw_event_sas_phy_up()
3203 phy->phy_state = PHY_STATE_LINK_UP_SPC; in hw_event_sata_phy_up()
[all …]
H A Dpm80xx_hwi.c3169 phy->phy_state = PHY_STATE_LINK_UP_SPCV; in hw_event_port_recover()
3202 phy->phy_state = PHY_STATE_LINK_UP_SPCV; in hw_event_sas_phy_up()
3284 phy->phy_state = PHY_STATE_LINK_UP_SPCV; in hw_event_sata_phy_up()
3399 phy->phy_state = PHY_LINK_DOWN; in mpi_phy_start_resp()
3491 phy->phy_state = PHY_LINK_DISABLE; in mpi_hw_event()
3659 phy->phy_state = PHY_STATE_LINK_UP_SPCV; in mpi_hw_event()
3694 phy->phy_state = PHY_LINK_DISABLE; in mpi_phy_stop_resp()
H A Dpm8001_init.c162 phy->phy_state = PHY_LINK_DISABLE; in pm8001_phy_init()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c553 link->phy_state.symclk_ref_cnts.otg = 0; in dcn31_reset_back_end_for_pipe()
556 if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) { in dcn31_reset_back_end_for_pipe()
560 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn31_reset_back_end_for_pipe()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1538 stream->link->phy_state.symclk_ref_cnts.otg = 1; in dce110_enable_stream_timing()
1539 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dce110_enable_stream_timing()
1540 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dce110_enable_stream_timing()
1542 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_stream_timing()
2338 pipe_ctx_old->stream->link->phy_state.symclk_ref_cnts.otg = 0; in dce110_reset_hw_ctx_wrap()
3245 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_lvds_link_output()
3261 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_tmds_link_output()
3332 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_dp_link_output()
3356 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dce110_disable_link_output()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c221 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn401_init_hw()
748 stream->link->phy_state.symclk_ref_cnts.otg = 1; in enable_stream_timing_calc()
749 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in enable_stream_timing_calc()
750 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in enable_stream_timing_calc()
752 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in enable_stream_timing_calc()
1063 if (dc_is_tmds_signal(signal) && link->phy_state.symclk_ref_cnts.otg > 0) { in dcn401_disable_link_output()
1065 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn401_disable_link_output()
1068 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn401_disable_link_output()
2025 link->phy_state.symclk_ref_cnts.otg = 0; in dcn401_reset_back_end_for_pipe()
2026 if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) { in dcn401_reset_back_end_for_pipe()
[all …]
/linux/drivers/net/fddi/
H A Ddefza.h553 u32 phy_state; /* PHY state */ member
H A Ddefxx.h710 PI_UINT32 phy_state[PI_PHY_K_MAX]; member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c854 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn32_init_hw()
1385 if (link->phy_state.symclk_ref_cnts.otg > 0) { in apply_symclk_on_tx_off_wa()
1395 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in apply_symclk_on_tx_off_wa()
1418 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn32_disable_link_output()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c897 stream->link->phy_state.symclk_ref_cnts.otg = 1; in dcn20_enable_stream_timing()
898 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dcn20_enable_stream_timing()
899 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn20_enable_stream_timing()
901 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn20_enable_stream_timing()
2860 link->phy_state.symclk_ref_cnts.otg = 0; in dcn20_reset_back_end_for_pipe()
2861 if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) { in dcn20_reset_back_end_for_pipe()
2864 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn20_reset_back_end_for_pipe()
/linux/drivers/scsi/hisi_sas/
H A Dhisi_sas_v3_hw.c1152 u32 phy_state = hisi_sas_read32(hisi_hba, PHY_STATE); in get_wideport_bitmap_v3_hw() local
1155 if (phy_state & BIT(i)) in get_wideport_bitmap_v3_hw()
1698 u32 phy_state, sl_ctrl, txid_auto; in phy_down_v3_hw() local
1706 phy_state = hisi_sas_read32(hisi_hba, PHY_STATE); in phy_down_v3_hw()
1707 dev_info(dev, "phydown: phy%d phy_state=0x%x\n", phy_no, phy_state); in phy_down_v3_hw()
1708 hisi_sas_phy_down(hisi_hba, phy_no, (phy_state & 1 << phy_no) ? 1 : 0, in phy_down_v3_hw()
1754 u32 phy_state = hisi_sas_read32(hisi_hba, PHY_STATE); in int_phy_up_down_bcast_v3_hw() local
1755 int rdy = phy_state & (1 << phy_no); in int_phy_up_down_bcast_v3_hw()
H A Dhisi_sas.h466 u32 phy_state; member
H A Dhisi_sas_v1_hw.c1440 u32 phy_state = hisi_sas_read32(hisi_hba, PHY_STATE); in int_abnormal_v1_hw() local
1443 (phy_state & 1 << phy_no) ? 1 : 0, in int_abnormal_v1_hw()
H A Dhisi_sas_main.c1569 hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba); in hisi_sas_controller_reset_prepare()
1618 if (!(hisi_hba->phy_state & BIT(phy_no))) { in hisi_sas_controller_reset_done()
1638 hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state); in hisi_sas_controller_reset_done()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_hw_types.h1157 struct phy_state { struct
H A Ddc.h1740 struct phy_state phy_state; member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c1765 if (dc_is_tmds_signal(signal) && link->phy_state.symclk_ref_cnts.otg > 0) { in dcn35_disable_link_output()
1767 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn35_disable_link_output()
1770 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn35_disable_link_output()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c1212 stream->link->phy_state.symclk_ref_cnts.otg = 1; in dcn10_enable_stream_timing()
1213 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dcn10_enable_stream_timing()
1214 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn10_enable_stream_timing()
1216 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn10_enable_stream_timing()
1335 pipe_ctx->stream->link->phy_state.symclk_ref_cnts.otg = 0; in dcn10_reset_back_end_for_pipe()
/linux/drivers/net/ethernet/freescale/
H A Dfec_mpc52xx.c71 enum phy_state link;
/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.h1555 u8 phy_state; member
2314 (bp)->link_info.phy_state == BNXT_PHY_STATE_ENABLED)
/linux/drivers/net/ethernet/emulex/benet/
H A Dbe_cmds.c326 if (new_phy_state == adapter->phy_state) in be_async_port_misconfig_event_process()
329 adapter->phy_state = new_phy_state; in be_async_port_misconfig_event_process()

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