Searched refs:pgtbl_cfg (Results 1 – 6 of 6) sorted by relevance
209 struct io_pgtable_cfg *pgtbl_cfg = &mmu->pgtbl_cfg; in mmu_cfg_init_mali_lpae() local214 mmu->cfg.transtab = pgtbl_cfg->arm_mali_lpae_cfg.transtab; in mmu_cfg_init_mali_lpae()215 mmu->cfg.memattr = pgtbl_cfg->arm_mali_lpae_cfg.memattr; in mmu_cfg_init_mali_lpae()223 struct io_pgtable_cfg *pgtbl_cfg = &mmu->pgtbl_cfg; in mmu_cfg_init_aarch64_4k() local226 if (drm_WARN_ON(&pfdev->base, pgtbl_cfg->arm_lpae_s1_cfg.ttbr & in mmu_cfg_init_aarch64_4k()230 mmu->cfg.transtab = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in mmu_cfg_init_aarch64_4k()232 mmu->cfg.memattr = mair_to_memattr(pgtbl_cfg->arm_lpae_s1_cfg.mair, in mmu_cfg_init_aarch64_4k()233 pgtbl_cfg->coherent_walk); in mmu_cfg_init_aarch64_4k()238 AS_TRANSCFG_INA_BITS(55 - pgtbl_cfg->ias); in mmu_cfg_init_aarch64_4k()239 if (pgtbl_cfg->coherent_walk) in mmu_cfg_init_aarch64_4k()[all …]
223 struct io_pgtable_cfg pgtbl_cfg; in qcom_iommu_init_domain() local231 pgtbl_cfg = (struct io_pgtable_cfg) { in qcom_iommu_init_domain()242 pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, qcom_domain); in qcom_iommu_init_domain()249 domain->geometry.aperture_end = (1ULL << pgtbl_cfg.ias) - 1; in qcom_iommu_init_domain()279 pgtbl_cfg.arm_lpae_s1_cfg.ttbr | in qcom_iommu_init_domain()285 arm_smmu_lpae_tcr2(&pgtbl_cfg)); in qcom_iommu_init_domain()287 arm_smmu_lpae_tcr(&pgtbl_cfg) | ARM_SMMU_TCR_EAE); in qcom_iommu_init_domain()291 pgtbl_cfg.arm_lpae_s1_cfg.mair); in qcom_iommu_init_domain()293 pgtbl_cfg.arm_lpae_s1_cfg.mair >> 32); in qcom_iommu_init_domain()
520 struct io_pgtable_cfg *pgtbl_cfg) in arm_smmu_init_context_bank() argument531 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank()533 cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg); in arm_smmu_init_context_bank()534 cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg); in arm_smmu_init_context_bank()541 cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg); in arm_smmu_init_context_bank()547 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()555 if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) in arm_smmu_init_context_bank()556 cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()558 cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()561 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_init_context_bank()[all …]
260 struct io_pgtable_cfg *pgtbl_cfg, in nvidia_smmu_init_context() argument281 pgtbl_cfg->pgsize_bitmap = smmu->pgsize_bitmap; in nvidia_smmu_init_context()
574 struct io_pgtable_cfg *pgtbl_cfg = in apple_dart_setup_translation() local577 for (i = 0; i < pgtbl_cfg->apple_dart_cfg.n_ttbrs; ++i) in apple_dart_setup_translation()579 pgtbl_cfg->apple_dart_cfg.ttbr[i]); in apple_dart_setup_translation()584 pgtbl_cfg->apple_dart_cfg.n_levels); in apple_dart_setup_translation()592 struct io_pgtable_cfg pgtbl_cfg; in apple_dart_finalize_domain() local611 pgtbl_cfg = (struct io_pgtable_cfg){ in apple_dart_finalize_domain()619 dart_domain->pgtbl_ops = alloc_io_pgtable_ops(dart->hw->fmt, &pgtbl_cfg, in apple_dart_finalize_domain()626 dart_domain->domain.pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; in apple_dart_finalize_domain()629 (dma_addr_t)DMA_BIT_MASK(pgtbl_cfg.ias); in apple_dart_finalize_domain()
2442 struct io_pgtable_cfg pgtbl_cfg; in panthor_vm_create() local2482 pgtbl_cfg = (struct io_pgtable_cfg) { in panthor_vm_create()2493 vm->pgtbl_ops = alloc_io_pgtable_ops(ARM_64_LPAE_S1, &pgtbl_cfg, vm); in panthor_vm_create()