Searched refs:performance_levels (Results 1 – 10 of 10) sorted by relevance
2259 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2260 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2279 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2280 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2286 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2295 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2354 if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()2968 if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) in si_apply_state_adjust_rules()2969 ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; in si_apply_state_adjust_rules()2973 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()[all …]
171 struct rv7xx_pl performance_levels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
50 struct ci_pl performance_levels[CISLANDS_MAX_HARDWARE_POWERLEVELS]; member
2433 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2434 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2452 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2453 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2459 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2468 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2527 if ((state->performance_levels[i].sclk >= adev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()3198 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3199 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3216 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()[all …]
3349 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()3350 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()3351 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()3352 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()3402 sclk = smu7_ps->performance_levels[0].engine_clock; in smu7_apply_state_adjust_rules()3403 mclk = smu7_ps->performance_levels[0].memory_clock; in smu7_apply_state_adjust_rules()3408 mclk = smu7_ps->performance_levels in smu7_apply_state_adjust_rules()3419 smu7_ps->performance_levels[0].engine_clock = sclk; in smu7_apply_state_adjust_rules()3420 smu7_ps->performance_levels[0].memory_clock = mclk; in smu7_apply_state_adjust_rules()3422 smu7_ps->performance_levels[1].engine_clock = in smu7_apply_state_adjust_rules()[all …]
3189 performance_level = &(vega10_ps->performance_levels in vega10_get_pp_table_entry_callback_func()3213 performance_level = &(vega10_ps->performance_levels in vega10_get_pp_table_entry_callback_func()3316 if (vega10_ps->performance_levels[i].mem_clock > in vega10_apply_state_adjust_rules()3318 vega10_ps->performance_levels[i].mem_clock = in vega10_apply_state_adjust_rules()3320 if (vega10_ps->performance_levels[i].gfx_clock > in vega10_apply_state_adjust_rules()3322 vega10_ps->performance_levels[i].gfx_clock = in vega10_apply_state_adjust_rules()3378 sclk = vega10_ps->performance_levels[0].gfx_clock; in vega10_apply_state_adjust_rules()3379 mclk = vega10_ps->performance_levels[0].mem_clock; in vega10_apply_state_adjust_rules()3389 vega10_ps->performance_levels[0].gfx_clock = sclk; in vega10_apply_state_adjust_rules()3390 vega10_ps->performance_levels[0].mem_clock = mclk; in vega10_apply_state_adjust_rules()[all …]
85 struct smu7_performance_level performance_levels[SMU7_MAX_HARDWARE_POWERLEVELS]; member
112 struct vega10_performance_level performance_levels[VEGA10_MAX_HARDWARE_POWERLEVELS]; member
129 struct vega20_performance_level performance_levels[VEGA20_MAX_HARDWARE_POWERLEVELS]; member
149 const struct sabi_performance_level performance_levels[4]; member206 .performance_levels = {269 .performance_levels = {665 for (i = 0; config->performance_levels[i].name; ++i) { in get_performance_level()666 if (sretval.data[0] == config->performance_levels[i].value) in get_performance_level()667 return sysfs_emit(buf, "%s\n", config->performance_levels[i].name); in get_performance_level()684 for (i = 0; config->performance_levels[i].name; ++i) { in set_performance_level()686 &config->performance_levels[i]; in set_performance_level()695 if (!config->performance_levels[i].name) in set_performance_level()1311 ok = !!samsung->config->performance_levels[0].name; in samsung_sysfs_is_visible()