Home
last modified time | relevance | path

Searched refs:parent_name (Results 1 – 25 of 220) sorted by relevance

123456789

/linux/drivers/clk/renesas/
H A Dclk-r8a73a4.c62 const char *parent_name; in r8a73a4_cpg_register_clock() local
72 parent_name = of_clk_get_parent_name(np, 0); in r8a73a4_cpg_register_clock()
75 parent_name = of_clk_get_parent_name(np, 0); in r8a73a4_cpg_register_clock()
79 parent_name = of_clk_get_parent_name(np, 1); in r8a73a4_cpg_register_clock()
82 parent_name = of_clk_get_parent_name(np, 1); in r8a73a4_cpg_register_clock()
94 parent_name = "main"; in r8a73a4_cpg_register_clock()
101 parent_name = "main"; in r8a73a4_cpg_register_clock()
125 parent_name = "main"; in r8a73a4_cpg_register_clock()
129 parent_name = "extal2"; in r8a73a4_cpg_register_clock()
133 parent_name = "extal2"; in r8a73a4_cpg_register_clock()
[all …]
H A Dclk-r8a7740.c63 const char *parent_name; in r8a7740_cpg_register_clock() local
72 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
77 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
82 parent_name = of_clk_get_parent_name(np, 2); in r8a7740_cpg_register_clock()
86 parent_name = of_clk_get_parent_name(np, 0); in r8a7740_cpg_register_clock()
96 parent_name = "system"; in r8a7740_cpg_register_clock()
100 parent_name = "system"; in r8a7740_cpg_register_clock()
105 parent_name = "system"; in r8a7740_cpg_register_clock()
111 parent_name = of_clk_get_parent_name(np, 1); in r8a7740_cpg_register_clock()
113 parent_name = "system"; in r8a7740_cpg_register_clock()
[all …]
H A Drcar-gen2-cpg.c137 const char *parent_name, in cpg_z_clk_register() argument
150 init.parent_names = &parent_name; in cpg_z_clk_register()
165 const char *parent_name, in cpg_rcan_clk_register() argument
190 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_rcan_clk_register()
209 const char *parent_name, in cpg_adsp_clk_register() argument
236 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_adsp_clk_register()
283 const char *parent_name; in rcar_gen2_cpg_clk_register() local
292 parent_name = __clk_get_name(parent); in rcar_gen2_cpg_clk_register()
326 return cpg_z_clk_register(core->name, parent_name, base); in rcar_gen2_cpg_clk_register()
333 return cpg_adsp_clk_register(core->name, parent_name, base); in rcar_gen2_cpg_clk_register()
[all …]
H A Dclk-sh73a0.c77 const char *parent_name = NULL; in sh73a0_cpg_register_clock() local
85 parent_name = of_clk_get_parent_name(np, parent_idx >> 1); in sh73a0_cpg_register_clock()
91 parent_name = "main"; in sh73a0_cpg_register_clock()
120 parent_name = phy_no ? "dsi1pck" : "dsi0pck"; in sh73a0_cpg_register_clock()
127 parent_name = "pll0"; in sh73a0_cpg_register_clock()
137 parent_name = c->parent; in sh73a0_cpg_register_clock()
150 return clk_register_fixed_factor(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
153 return clk_register_divider_table(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
H A Drcar-cpg-lib.c91 void __iomem *sdnckcr, const char *parent_name, in cpg_sdh_clk_register() argument
103 clk = clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr, in cpg_sdh_clk_register()
120 void __iomem *sdnckcr, const char *parent_name) in cpg_sd_clk_register() argument
122 return clk_register_divider_table(NULL, name, parent_name, 0, sdnckcr, in cpg_sd_clk_register()
141 void __iomem *rpcckcr, const char *parent_name, in cpg_rpc_clk_register() argument
163 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_rpc_clk_register()
183 const char *parent_name) in cpg_rpcd2_clk_register() argument
200 clk = clk_register_composite(NULL, name, &parent_name, 1, NULL, NULL, in cpg_rpcd2_clk_register()
/linux/drivers/clk/ux500/
H A Dclk.h19 const char *parent_name,
25 const char *parent_name,
31 const char *parent_name,
37 const char *parent_name,
42 const char *parent_name,
48 const char *parent_name,
53 const char *parent_name,
58 const char *parent_name,
70 const char *parent_name,
79 const char *parent_name,
H A Dclk-prcmu.c197 const char *parent_name, in clk_reg_prcmu() argument
225 clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL); in clk_reg_prcmu()
226 clk_prcmu_init.num_parents = (parent_name ? 1 : 0); in clk_reg_prcmu()
242 const char *parent_name, in clk_reg_prcmu_scalable() argument
247 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable()
252 const char *parent_name, in clk_reg_prcmu_gate() argument
256 return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, in clk_reg_prcmu_gate()
261 const char *parent_name, in clk_reg_prcmu_scalable_rate() argument
266 return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags, in clk_reg_prcmu_scalable_rate()
271 const char *parent_name, in clk_reg_prcmu_rate() argument
[all …]
H A Dclk-prcc.c94 const char *parent_name, in clk_reg_prcc() argument
123 clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL); in clk_reg_prcc()
124 clk_prcc_init.num_parents = (parent_name ? 1 : 0); in clk_reg_prcc()
142 const char *parent_name, in clk_reg_prcc_pclk() argument
147 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, in clk_reg_prcc_pclk()
152 const char *parent_name, in clk_reg_prcc_kclk() argument
157 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, in clk_reg_prcc_kclk()
/linux/drivers/clk/at91/
H A Ddt-compat.c34 const char *parent_name; in of_sama5d2_clk_audio_pll_frac_setup() local
44 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_frac_setup()
46 hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_frac_setup()
60 const char *parent_name; in of_sama5d2_clk_audio_pll_pad_setup() local
70 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_pad_setup()
72 hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pad_setup()
86 const char *parent_name; in of_sama5d2_clk_audio_pll_pmc_setup() local
96 parent_name = of_clk_get_parent_name(np, 0); in of_sama5d2_clk_audio_pll_pmc_setup()
98 hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name); in of_sama5d2_clk_audio_pll_pmc_setup()
192 const char *parent_name; in of_sama5d4_clk_h32mx_setup() local
[all …]
H A Dpmc.h149 const char *parent_name);
153 const char *parent_name);
157 const char *parent_name);
169 const char *parent_name);
181 const char *parent_name,
186 const char *parent_name,
218 const char *parent_name, struct clk_hw *parent_hw,
223 const char *name, const char *parent_name,
230 const char *parent_name, u8 id,
235 const char *parent_name);
[all …]
/linux/drivers/clk/imx/
H A Dclk-scu.h45 const char *parent_name, unsigned long flags,
49 struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_name,
66 const char *parent_name, unsigned long flags, in imx_clk_lpcg_scu_dev() argument
69 return __imx_clk_lpcg_scu(dev, name, parent_name, flags, reg, in imx_clk_lpcg_scu_dev()
73 static inline struct clk_hw *imx_clk_lpcg_scu(const char *name, const char *parent_name, in imx_clk_lpcg_scu() argument
77 return __imx_clk_lpcg_scu(NULL, name, parent_name, flags, reg, in imx_clk_lpcg_scu()
81 static inline struct clk_hw *imx_clk_gate_gpr_scu(const char *name, const char *parent_name, in imx_clk_gate_gpr_scu() argument
84 return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id, in imx_clk_gate_gpr_scu()
88 static inline struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, in imx_clk_divider_gpr_scu() argument
91 return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id, in imx_clk_divider_gpr_scu()
H A Dclk.h95 struct clk_hw *imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base,
97 struct clk_hw *imx_clk_fracn_gppll_integer(const char *name, const char *parent_name,
104 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ argument
105 to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
107 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ argument
109 to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
112 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ argument
113 to_clk(imx_clk_hw_pllv3(type, name, parent_name, base, div_mask))
115 #define imx_clk_pfd(name, parent_name, reg, idx) \ argument
116 to_clk(imx_clk_hw_pfd(name, parent_name, reg, idx))
[all …]
/linux/drivers/clk/sifive/
H A Dfu740-prci.h87 .parent_name = "hfclk",
93 .parent_name = "hfclk",
99 .parent_name = "hfclk",
105 .parent_name = "hfclk",
111 .parent_name = "hfclk",
117 .parent_name = "hfclk",
123 .parent_name = "corepll",
128 .parent_name = "hfpclkpll",
133 .parent_name = "hfclk",
/linux/drivers/clk/mxs/
H A Dclk.h21 struct clk *mxs_clk_pll(const char *name, const char *parent_name,
24 struct clk *mxs_clk_ref(const char *name, const char *parent_name,
27 struct clk *mxs_clk_div(const char *name, const char *parent_name,
30 struct clk *mxs_clk_frac(const char *name, const char *parent_name,
39 const char *parent_name, void __iomem *reg, u8 shift) in mxs_clk_gate() argument
41 return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT, in mxs_clk_gate()
55 const char *parent_name, unsigned int mult, unsigned int div) in mxs_clk_fixed_factor() argument
57 return clk_register_fixed_factor(NULL, name, parent_name, in mxs_clk_fixed_factor()
/linux/drivers/clk/
H A Dclk-fixed-rate_test.c36 const char *parent_name; member
53 params->parent_name, in clk_hw_register_fixed_rate_kunit_init()
181 const char *parent_name = "test-fixed-rate-parent"; in clk_fixed_rate_parent_test() local
183 .name = parent_name, in clk_fixed_rate_parent_test()
188 KUNIT_ASSERT_STREQ(test, parent_name, clk_hw_get_name(parent_hw)); in clk_fixed_rate_parent_test()
193 hw = clk_hw_register_fixed_rate(NULL, "test-fixed-rate", parent_name, 0, 0); in clk_fixed_rate_parent_test()
213 const char *parent_name = "test-fixed-rate-parent"; in clk_fixed_rate_parent_rate_test() local
215 .name = parent_name, in clk_fixed_rate_parent_rate_test()
221 KUNIT_ASSERT_STREQ(test, parent_name, clk_hw_get_name(parent_hw)); in clk_fixed_rate_parent_rate_test()
223 hw = clk_hw_register_fixed_rate(NULL, "test-fixed-rate", parent_name, 0, in clk_fixed_rate_parent_rate_test()
[all …]
H A Dclk-nomadik.c262 const char *parent_name, u32 id) in pll_clk_register() argument
279 init.parent_names = (parent_name ? &parent_name : NULL); in pll_clk_register()
280 init.num_parents = (parent_name ? 1 : 0); in pll_clk_register()
354 const char *parent_name, u8 id) in src_clk_register() argument
371 init.parent_names = (parent_name ? &parent_name : NULL); in src_clk_register()
372 init.num_parents = (parent_name ? 1 : 0); in src_clk_register()
507 const char *parent_name; in of_nomadik_pll_setup() local
518 parent_name = of_clk_get_parent_name(np, 0); in of_nomadik_pll_setup()
519 hw = pll_clk_register(NULL, clk_name, parent_name, pll_id); in of_nomadik_pll_setup()
530 const char *parent_name; in of_nomadik_hclk_setup() local
[all …]
H A Dclk-loongson2.c48 const char *parent_name; member
64 .parent_name = _pname, \
76 .parent_name = NULL, \
90 .parent_name = _pname, \
102 .parent_name = _pname, \
114 .parent_name = _pname, \
125 .parent_name = _pname, \
136 .parent_name = _pname, \
362 const char *refclk_name, *parent_name; in loongson2_clk_probe() local
394 parent_name = p->parent_name ? p->parent_name : refclk_name; in loongson2_clk_probe()
[all …]
H A Dclk-moxart.c23 const char *parent_name; in moxart_of_pll_clk_init() local
26 parent_name = of_clk_get_parent_name(node, 0); in moxart_of_pll_clk_init()
43 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); in moxart_of_pll_clk_init()
63 const char *parent_name; in moxart_of_apb_clk_init() local
66 parent_name = of_clk_get_parent_name(node, 0); in moxart_of_apb_clk_init()
87 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div); in moxart_of_apb_clk_init()
/linux/drivers/clk/mmp/
H A Dclk.h34 const char *parent_name, unsigned long flags,
120 const char *parent_name, unsigned long flags,
126 const char *parent_name, void __iomem *base,
129 const char *parent_name, void __iomem *base, u32 enable_mask,
141 const char *parent_name; member
152 const char *parent_name; member
164 const char *parent_name; member
178 const char *parent_name; member
194 const char * const *parent_name; member
210 const char *parent_name; member
/linux/drivers/clk/socfpga/
H A Dclk-periph-s10.c108 const char *parent_name = clks->parent_name; in s10_register_periph() local
122 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_periph()
144 const char *parent_name = clks->parent_name; in n5x_register_periph() local
159 init.parent_names = parent_name ? &parent_name : NULL; in n5x_register_periph()
179 const char *parent_name = clks->parent_name; in s10_register_cnt_periph() local
203 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_cnt_periph()
/linux/drivers/clk/tegra/
H A Dclk.h135 const char *parent_name, void __iomem *reg,
138 struct clk *tegra_clk_register_mc(const char *name, const char *parent_name,
404 struct clk *tegra_clk_register_pll(const char *name, const char *parent_name,
409 struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
414 struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
420 struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
426 struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
432 struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name,
439 const char *parent_name, void __iomem *clk_base,
445 const char *parent_name,
[all …]
/linux/drivers/clk/keystone/
H A Dpll.c122 const char *parent_name, in clk_register_pll() argument
136 init.parent_names = (parent_name ? &parent_name : NULL); in clk_register_pll()
137 init.num_parents = (parent_name ? 1 : 0); in clk_register_pll()
161 const char *parent_name; in _of_pll_clk_init() local
171 parent_name = of_clk_get_parent_name(node, 0); in _of_pll_clk_init()
211 clk = clk_register_pll(NULL, node->name, parent_name, pll_data); in _of_pll_clk_init()
250 const char *parent_name; in of_pll_div_clk_init() local
263 parent_name = of_clk_get_parent_name(node, 0); in of_pll_div_clk_init()
264 if (!parent_name) { in of_pll_div_clk_init()
282 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, in of_pll_div_clk_init()
/linux/drivers/clk/mediatek/
H A Dclk-mt8196-vdec.c57 .parent_name = _parent, \
68 .parent_name = _parent, \
79 .parent_name = _parent, \
158 .parent_name = _parent, \
169 .parent_name = _parent, \
180 .parent_name = _parent, \
191 .parent_name = _parent, \
202 .parent_name = _parent, \
H A Dclk-mt8196-venc.c45 .parent_name = _parent, \
55 .parent_name = _parent, \
70 .parent_name = _parent, \
117 .parent_name = _parent, \
127 .parent_name = _parent, \
138 .parent_name = _parent, \
180 .parent_name = _parent, \
191 .parent_name = _parent, \
/linux/drivers/clk/ti/
H A Dinterface.c29 const char *parent_name, in _register_interface() argument
51 init.parent_names = &parent_name; in _register_interface()
65 const char *parent_name; in _of_ti_interface_clk_setup() local
75 parent_name = of_clk_get_parent_name(node, 0); in _of_ti_interface_clk_setup()
76 if (!parent_name) { in _of_ti_interface_clk_setup()
82 clk = _register_interface(node, name, parent_name, &reg, in _of_ti_interface_clk_setup()

123456789