| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 1414 struct pipe_ctx *otg_master) in resource_build_test_pattern_params() argument
1421 enum dc_color_depth color_depth = otg_master->stream->timing.display_color_depth; in resource_build_test_pattern_params()
1426 otg_master->stream->test_pattern.type); in resource_build_test_pattern_params()
1428 otg_master->stream->test_pattern.color_space); in resource_build_test_pattern_params()
1433 odm_cnt = resource_get_opp_heads_for_otg_master(otg_master, res_ctx, opp_heads); in resource_build_test_pattern_params()
1913 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master, in resource_get_opp_heads_for_otg_master() argument
1917 struct pipe_ctx *opp_head = &res_ctx->pipe_ctx[otg_master->pipe_idx]; in resource_get_opp_heads_for_otg_master()
1918 struct dc *dc = otg_master->stream->ctx->dc; in resource_get_opp_heads_for_otg_master()
1923 if (!resource_is_pipe_type(otg_master, OTG_MASTER)) { in resource_get_opp_heads_for_otg_master()
1990 struct pipe_ctx *otg_master = resource_get_opp_head(pipe_ctx); in resource_get_otg_master() local
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| H A D | dc_hw_sequencer.c | 1070 struct pipe_ctx *otg_master; in hwss_wait_for_odm_update_pending_complete() local
1075 otg_master = &context->res_ctx.pipe_ctx[i]; in hwss_wait_for_odm_update_pending_complete()
1076 if (!resource_is_pipe_type(otg_master, OTG_MASTER) || in hwss_wait_for_odm_update_pending_complete()
1077 dc_state_get_pipe_subvp_type(context, otg_master) == SUBVP_PHANTOM) in hwss_wait_for_odm_update_pending_complete()
1079 tg = otg_master->stream_res.tg; in hwss_wait_for_odm_update_pending_complete()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.h | 84 struct pipe_ctx *otg_master);
86 …ffer_update_under_otg_master(struct dc *dc, struct dc_state *context, struct pipe_ctx *otg_master);
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| H A D | dcn401_hwseq.c | 1535 struct pipe_ctx *otg_master) in update_dsc_for_odm_change() argument
1544 old_otg_master = &dc->current_state->res_ctx.pipe_ctx[otg_master->pipe_idx]; in update_dsc_for_odm_change()
1559 if (otg_master->stream_res.dsc) in update_dsc_for_odm_change()
1560 dcn32_update_dsc_on_stream(otg_master, in update_dsc_for_odm_change()
1561 otg_master->stream->timing.flags.DSC); in update_dsc_for_odm_change()
1574 struct pipe_ctx *otg_master) in dcn401_update_odm() argument
1579 int odm_slice_width = resource_get_odm_slice_dst_width(otg_master, false); in dcn401_update_odm()
1580 int last_odm_slice_width = resource_get_odm_slice_dst_width(otg_master, true); in dcn401_update_odm()
1584 otg_master, &context->res_ctx, opp_heads); in dcn401_update_odm()
1589 otg_master->stream_res.tg->funcs->set_odm_combine( in dcn401_update_odm()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | resource.h | 378 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master,
452 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
646 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);
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| H A D | core_types.h | 147 const struct pipe_ctx *otg_master);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 518 struct pipe_ctx *otg_master; in dcn401_update_clocks_update_dtb_dto() local
523 otg_master = resource_get_otg_master_for_stream( in dcn401_update_clocks_update_dtb_dto()
525 ASSERT(otg_master); in dcn401_update_clocks_update_dtb_dto()
526 ASSERT(otg_master->clock_source); in dcn401_update_clocks_update_dtb_dto()
527 ASSERT(otg_master->clock_source->funcs->program_pix_clk); in dcn401_update_clocks_update_dtb_dto()
528 ASSERT(otg_master->stream_res.pix_clk_params.controller_id >= CONTROLLER_ID_D0); in dcn401_update_clocks_update_dtb_dto()
530 use_hpo_encoder = dccg->ctx->dc->link_srv->dp_is_128b_132b_signal(otg_master); in dcn401_update_clocks_update_dtb_dto()
534 if (otg_master->stream_res.pix_clk_params.controller_id > CONTROLLER_ID_UNDEFINED) in dcn401_update_clocks_update_dtb_dto()
535 otg_master->clock_source->funcs->program_pix_clk( in dcn401_update_clocks_update_dtb_dto()
536 otg_master->clock_source, in dcn401_update_clocks_update_dtb_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_wrapper.h | 74 void (*build_test_pattern_params)(struct resource_context *res_ctx, struct pipe_ctx *otg_master);
97 int (*get_opp_heads_for_otg_master)(const struct pipe_ctx *otg_master,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 2788 const struct pipe_ctx *otg_master) in dcn32_acquire_free_pipe_as_secondary_opp_head() argument
2792 pool, otg_master); in dcn32_acquire_free_pipe_as_secondary_opp_head()
2798 free_pipe->stream = otg_master->stream; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2799 free_pipe->stream_res.tg = otg_master->stream_res.tg; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2808 free_pipe->hblank_borrow = otg_master->hblank_borrow; in dcn32_acquire_free_pipe_as_secondary_opp_head()
2821 ASSERT(otg_master); in dcn32_acquire_free_pipe_as_secondary_opp_head()
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| H A D | dcn32_resource.h | 156 const struct pipe_ctx *otg_master);
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 1170 struct pipe_ctx *otg_master; in init_pipe_slice_table_from_context() local
1179 otg_master = resource_get_otg_master_for_stream( in init_pipe_slice_table_from_context()
1181 if (!otg_master) in init_pipe_slice_table_from_context()
1184 count = resource_get_odm_slice_count(otg_master); in init_pipe_slice_table_from_context()
1187 count = resource_get_dpp_pipes_for_opp_head(otg_master, in init_pipe_slice_table_from_context()
2124 struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&context->res_ctx, in dcn32_apply_merge_split_flags_helper() local
2127 if (otg_master) in dcn32_apply_merge_split_flags_helper()
2128 resource_build_test_pattern_params(&context->res_ctx, otg_master); in dcn32_apply_merge_split_flags_helper()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 2151 struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(res_ctx, opp_head->stream); in dcn20_acquire_free_pipe_for_layer() local
2152 …struct pipe_ctx *sec_dpp_pipe = resource_find_free_secondary_pipe_legacy(res_ctx, pool, otg_master… in dcn20_acquire_free_pipe_for_layer()
2154 ASSERT(otg_master); in dcn20_acquire_free_pipe_for_layer()
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