Home
last modified time | relevance | path

Searched refs:opp_regs (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dce100/
H A Ddce100_resource.c269 #define opp_regs(id)\ macro
274 static const struct dce_opp_registers opp_regs[] = { variable
275 opp_regs(0),
276 opp_regs(1),
277 opp_regs(2),
278 opp_regs(3),
279 opp_regs(4),
280 opp_regs(5)
695 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce100_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dce60/
H A Ddce60_resource.c286 #define opp_regs(id)\ macro
291 static const struct dce_opp_registers opp_regs[] = { variable
292 opp_regs(0),
293 opp_regs(1),
294 opp_regs(2),
295 opp_regs(3),
296 opp_regs(4),
297 opp_regs(5)
536 ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dce60_aux_engine_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/
H A Ddcn302_resource.c674 #define opp_regs(id)\ macro
677 static const struct dcn20_opp_registers opp_regs[] = { variable
678 opp_regs(0),
679 opp_regs(1),
680 opp_regs(2),
681 opp_regs(3),
682 opp_regs(4)
702 dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dcn302_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c533 #define opp_regs(id)\ macro
538 static const struct dcn20_opp_registers opp_regs[] = { variable
539 opp_regs(0),
540 opp_regs(1),
541 opp_regs(2),
542 opp_regs(3)
1001 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c479 #define opp_regs(id)\ macro
484 static const struct dcn20_opp_registers opp_regs[] = { variable
485 opp_regs(0),
486 opp_regs(1),
487 opp_regs(2),
488 opp_regs(3),
489 opp_regs(4),
490 opp_regs(5)
827 &opp_regs[inst], &opp_shift, &opp_mask); in dcn30_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c545 #define opp_regs(id)\ macro
550 static const struct dcn20_opp_registers opp_regs[] = { variable
551 opp_regs(0),
552 opp_regs(1),
553 opp_regs(2),
554 opp_regs(3)
1044 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/
H A Ddcn303_resource.c652 #define opp_regs(id)\ macro
655 static const struct dcn20_opp_registers opp_regs[] = { variable
656 opp_regs(0),
657 opp_regs(1)
677 dcn20_opp_construct(opp, ctx, inst, &opp_regs[inst], &opp_shift, &opp_mask); in dcn303_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c539 #define opp_regs(id)\ macro
544 static const struct dcn20_opp_registers opp_regs[] = { variable
545 opp_regs(0),
546 opp_regs(1),
547 opp_regs(2),
548 opp_regs(3)
1009 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c542 #define opp_regs(id)\ macro
547 static const struct dcn20_opp_registers opp_regs[] = { variable
548 opp_regs(0),
549 opp_regs(1),
550 opp_regs(2),
551 opp_regs(3)
1008 &opp_regs[inst], &opp_shift, &opp_mask); in dcn31_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c419 static struct dcn35_opp_registers opp_regs[4]; variable
890 #define REG_STRUCT opp_regs in dcn35_opp_create()
897 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c438 static struct dcn35_opp_registers opp_regs[4]; variable
903 #define REG_STRUCT opp_regs in dcn35_opp_create()
910 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c419 static struct dcn20_opp_registers opp_regs[4]; variable
1046 #define REG_STRUCT opp_regs in dcn321_opp_create()
1053 &opp_regs[inst], &opp_shift, &opp_mask); in dcn321_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c418 static struct dcn35_opp_registers opp_regs[4]; variable
883 #define REG_STRUCT opp_regs in dcn35_opp_create()
890 &opp_regs[inst], &opp_shift, &opp_mask); in dcn35_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/
H A Ddcn60_resource.c415 static struct dcn60_opp_registers opp_regs[4]; variable
1227 #define REG_STRUCT opp_regs in dcn60_opp_create()
1234 &opp_regs[inst], &opp_shift, &opp_mask); in dcn60_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c402 static struct dcn20_opp_registers opp_regs[4]; variable
1063 #define REG_STRUCT opp_regs in dcn401_opp_create()
1070 &opp_regs[inst], &opp_shift, &opp_mask); in dcn401_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/
H A Ddcn42_resource.c371 static struct dcn20_opp_registers opp_regs[4]; variable
1084 #define REG_STRUCT opp_regs in dcn42_opp_create()
1090 &opp_regs[inst], &opp_shift, &opp_mask); in dcn42_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/
H A Ddcn42b_resource.c423 static struct dcn20_opp_registers opp_regs[4]; variable
1143 #define REG_STRUCT opp_regs in dcn42b_opp_create()
1150 &opp_regs[inst], &opp_shift, &opp_mask); in dcn42b_opp_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c426 static struct dcn20_opp_registers opp_regs[4]; variable
1058 #define REG_STRUCT opp_regs in dcn32_opp_create()
1065 &opp_regs[inst], &opp_shift, &opp_mask); in dcn32_opp_create()