| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | mcs_reg.h | 15 u64 offset; \ 17 offset = 0x408ull; \ 19 offset = 0xa28ull; \ 20 offset += (a) * 0x8ull; \ 21 offset; }) 25 u64 offset; \ 27 offset = 0x808ull; \ 29 offset = 0xa68ull; \ 30 offset += (a) * 0x8ull; \ 31 offset; }) [all …]
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| /linux/drivers/net/ethernet/microchip/vcap/ |
| H A D | vcap_model_kunit.c | 20 .offset = 0, 25 .offset = 2, 30 .offset = 3, 35 .offset = 10, 40 .offset = 13, 45 .offset = 16, 50 .offset = 19, 55 .offset = 20, 60 .offset = 32, 65 .offset = 35, [all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_vcap_ag_api.c | 20 .offset = 0, 25 .offset = 1, 30 .offset = 2, 35 .offset = 4, 40 .offset = 16, 45 .offset = 18, 50 .offset = 83, 55 .offset = 84, 60 .offset = 85, 65 .offset = 88, [all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_vcap_ag_api.c | 19 .offset = 0, 24 .offset = 1, 29 .offset = 2, 34 .offset = 4, 39 .offset = 14, 44 .offset = 16, 49 .offset = 81, 54 .offset = 82, 59 .offset = 83, 64 .offset = 86, [all …]
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| /linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_vcap_ag_api.c | 12 .offset = 0, 17 .offset = 1, 22 .offset = 3, 27 .offset = 12, 32 .offset = 13, 37 .offset = 14, 42 .offset = 15, 47 .offset = 16, 52 .offset = 17, 57 .offset = 18, [all …]
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| H A D | lan966x_ethtool.c | 12 { .name = "rx_octets", .offset = 0x00, }, 13 { .name = "rx_unicast", .offset = 0x01, }, 14 { .name = "rx_multicast", .offset = 0x02 }, 15 { .name = "rx_broadcast", .offset = 0x03 }, 16 { .name = "rx_short", .offset = 0x04 }, 17 { .name = "rx_frag", .offset = 0x05 }, 18 { .name = "rx_jabber", .offset = 0x06 }, 19 { .name = "rx_crc", .offset = 0x07 }, 20 { .name = "rx_symbol_err", .offset = 0x08 }, 21 { .name = "rx_sz_64", .offset = 0x09 }, [all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pexp-defs.h | 31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31… argument 43 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7)… argument 44 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) … argument 45 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000008400ull) + ((offset)… argument 46 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset) & 7) … argument 68 #define CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008280ull) + ((offset… argument 92 #define CVMX_PEXP_NPEI_PKTX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F000000A400ull) + ((offset) & 31) … argument 93 #define CVMX_PEXP_NPEI_PKTX_INSTR_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F000000A800ull) + ((offset)… argument 94 #define CVMX_PEXP_NPEI_PKTX_INSTR_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F000000AC00ull) + ((o… argument 95 #define CVMX_PEXP_NPEI_PKTX_INSTR_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F000000B000ull) + ((of… argument [all …]
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| H A D | cvmx-pcsx-defs.h | 31 static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_ADV_REG() argument 35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG() 38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG() 42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG() 44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG() 46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG() 49 static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_EXT_ST_REG() argument 53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG() 56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG() 60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG() [all …]
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| /linux/arch/arm/kernel/ |
| H A D | module.c | 60 static u32 get_group_rem(u32 group, u32 *offset) in get_group_rem() argument 62 u32 val = *offset; in get_group_rem() 66 *offset = val; in get_group_rem() 92 s32 offset; in apply_relocate() local 98 offset = ELF32_R_SYM(rel->r_info); in apply_relocate() 99 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { in apply_relocate() 105 sym = ((Elf32_Sym *)symsec->sh_addr) + offset; in apply_relocate() 136 offset = __mem_to_opcode_arm(*(u32 *)loc); in apply_relocate() 137 offset = (offset & 0x00ffffff) << 2; in apply_relocate() 138 offset = sign_extend32(offset, 25); in apply_relocate() [all …]
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| /linux/drivers/crypto/cavium/nitrox/ |
| H A D | nitrox_hal.c | 44 u64 offset; in nitrox_config_emu_unit() local 58 offset = EMU_WD_INT_ENA_W1SX(i); in nitrox_config_emu_unit() 59 nitrox_write_csr(ndev, offset, emu_wd_int.value); in nitrox_config_emu_unit() 60 offset = EMU_GE_INT_ENA_W1SX(i); in nitrox_config_emu_unit() 61 nitrox_write_csr(ndev, offset, emu_ge_int.value); in nitrox_config_emu_unit() 70 u64 offset; in reset_pkt_input_ring() local 73 offset = NPS_PKT_IN_INSTR_CTLX(ring); in reset_pkt_input_ring() 74 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring() 76 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in reset_pkt_input_ring() 81 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring() [all …]
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| /linux/drivers/gpio/ |
| H A D | gpio-eic-sprd.c | 143 static void sprd_eic_update(struct gpio_chip *chip, unsigned int offset, in sprd_eic_update() argument 148 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR); in sprd_eic_update() 156 tmp |= BIT(SPRD_EIC_BIT(offset)); in sprd_eic_update() 158 tmp &= ~BIT(SPRD_EIC_BIT(offset)); in sprd_eic_update() 164 static int sprd_eic_read(struct gpio_chip *chip, unsigned int offset, u16 reg) in sprd_eic_read() argument 168 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR); in sprd_eic_read() 170 return !!(readl_relaxed(base + reg) & BIT(SPRD_EIC_BIT(offset))); in sprd_eic_read() 173 static int sprd_eic_request(struct gpio_chip *chip, unsigned int offset) in sprd_eic_request() argument 175 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 1); in sprd_eic_request() 179 static void sprd_eic_free(struct gpio_chip *chip, unsigned int offset) in sprd_eic_free() argument [all …]
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| H A D | gpio-aspeed.c | 220 void (*reg_bit_set)(struct aspeed_gpio *gpio, unsigned int offset, 222 bool (*reg_bit_get)(struct aspeed_gpio *gpio, unsigned int offset, 224 int (*reg_bank_get)(struct aspeed_gpio *gpio, unsigned int offset, 226 void (*privilege_ctrl)(struct aspeed_gpio *gpio, unsigned int offset, int owner); 228 bool (*copro_request)(struct aspeed_gpio *gpio, unsigned int offset); 229 void (*copro_release)(struct aspeed_gpio *gpio, unsigned int offset); 324 static const struct aspeed_gpio_bank *to_bank(unsigned int offset) in to_bank() argument 326 unsigned int bank = GPIO_BANK(offset); in to_bank() 338 struct aspeed_gpio *gpio, unsigned int offset) in find_bank_props() argument 343 if (props->bank == GPIO_BANK(offset)) in find_bank_props() [all …]
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| H A D | gpio-cs5535.c | 83 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, in __cs5535_gpio_set() argument 86 if (offset < 16) in __cs5535_gpio_set() 88 outl(1 << offset, chip->base + reg); in __cs5535_gpio_set() 91 errata_outl(chip, 1 << (offset - 16), reg); in __cs5535_gpio_set() 94 void cs5535_gpio_set(unsigned offset, unsigned int reg) in cs5535_gpio_set() argument 100 __cs5535_gpio_set(chip, offset, reg); in cs5535_gpio_set() 105 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, in __cs5535_gpio_clear() argument 108 if (offset < 16) in __cs5535_gpio_clear() 110 outl(1 << (offset + 16), chip->base + reg); in __cs5535_gpio_clear() 113 errata_outl(chip, 1 << offset, reg); in __cs5535_gpio_clear() [all …]
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| /linux/arch/powerpc/include/asm/ |
| H A D | cpu_setup.h | 8 void __setup_cpu_power7(unsigned long offset, struct cpu_spec *spec); 9 void __setup_cpu_power8(unsigned long offset, struct cpu_spec *spec); 10 void __setup_cpu_power9(unsigned long offset, struct cpu_spec *spec); 11 void __setup_cpu_power10(unsigned long offset, struct cpu_spec *spec); 17 void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec *spec); 18 void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec *spec); 19 void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec *spec); 20 void __setup_cpu_440ep(unsigned long offset, struct cpu_spec *spec); 21 void __setup_cpu_440epx(unsigned long offset, struct cpu_spec *spec); 22 void __setup_cpu_440gx(unsigned long offset, struct cpu_spec *spec); [all …]
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| /linux/drivers/md/dm-vdo/ |
| H A D | numeric.h | 18 static inline void decode_s64_le(const u8 *buffer, size_t *offset, s64 *decoded) in decode_s64_le() argument 20 *decoded = get_unaligned_le64(buffer + *offset); in decode_s64_le() 21 *offset += sizeof(s64); in decode_s64_le() 24 static inline void encode_s64_le(u8 *data, size_t *offset, s64 to_encode) in encode_s64_le() argument 26 put_unaligned_le64(to_encode, data + *offset); in encode_s64_le() 27 *offset += sizeof(s64); in encode_s64_le() 30 static inline void decode_u64_le(const u8 *buffer, size_t *offset, u64 *decoded) in decode_u64_le() argument 32 *decoded = get_unaligned_le64(buffer + *offset); in decode_u64_le() 33 *offset += sizeof(u64); in decode_u64_le() 36 static inline void encode_u64_le(u8 *data, size_t *offset, u64 to_encode) in encode_u64_le() argument [all …]
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| H A D | encodings.c | 204 static void encode_version_number(u8 *buffer, size_t *offset, in encode_version_number() argument 209 memcpy(buffer + *offset, &packed, sizeof(packed)); in encode_version_number() 210 *offset += sizeof(packed); in encode_version_number() 213 void vdo_encode_header(u8 *buffer, size_t *offset, const struct header *header) in vdo_encode_header() argument 217 memcpy(buffer + *offset, &packed, sizeof(packed)); in vdo_encode_header() 218 *offset += sizeof(packed); in vdo_encode_header() 221 static void decode_version_number(u8 *buffer, size_t *offset, in decode_version_number() argument 226 memcpy(&packed, buffer + *offset, sizeof(packed)); in decode_version_number() 227 *offset += sizeof(packed); in decode_version_number() 231 void vdo_decode_header(u8 *buffer, size_t *offset, struct header *header) in vdo_decode_header() argument [all …]
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| /linux/drivers/power/supply/ |
| H A D | max1720x_battery.c | 154 { .name = "nXTable0", .offset = 0, .bytes = 2, }, 155 { .name = "nXTable1", .offset = 2, .bytes = 2, }, 156 { .name = "nXTable2", .offset = 4, .bytes = 2, }, 157 { .name = "nXTable3", .offset = 6, .bytes = 2, }, 158 { .name = "nXTable4", .offset = 8, .bytes = 2, }, 159 { .name = "nXTable5", .offset = 10, .bytes = 2, }, 160 { .name = "nXTable6", .offset = 12, .bytes = 2, }, 161 { .name = "nXTable7", .offset = 14, .bytes = 2, }, 162 { .name = "nXTable8", .offset = 16, .bytes = 2, }, 163 { .name = "nXTable9", .offset = 18, .bytes = 2, }, [all …]
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| /linux/scripts/dtc/libfdt/ |
| H A D | fdt_ro.c | 13 static int fdt_nodename_eq_(const void *fdt, int offset, in fdt_nodename_eq_() argument 17 const char *p = fdt_get_name(fdt, offset, &olen); in fdt_nodename_eq_() 117 int offset = -1; in fdt_find_max_phandle() local 122 offset = fdt_next_node(fdt, offset, NULL); in fdt_find_max_phandle() 123 if (offset < 0) { in fdt_find_max_phandle() 124 if (offset == -FDT_ERR_NOTFOUND) in fdt_find_max_phandle() 127 return offset; in fdt_find_max_phandle() 130 value = fdt_get_phandle(fdt, offset); in fdt_find_max_phandle() 162 unsigned int offset = n * sizeof(struct fdt_reserve_entry); in fdt_mem_rsv() local 163 unsigned int absoffset = fdt_off_mem_rsvmap(fdt) + offset; in fdt_mem_rsv() [all …]
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| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | qmi_wlfw_v01.c | 18 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01, 27 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01, 36 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01, 45 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01, 54 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01, 67 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01, 76 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01, 85 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01, 98 .offset = offsetof(struct wlfw_shadow_reg_cfg_s_v01, 107 .offset = offsetof(struct wlfw_shadow_reg_cfg_s_v01, [all …]
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| /linux/drivers/misc/ocxl/ |
| H A D | mmio.c | 7 int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_read32() argument 10 if (offset > afu->config.global_mmio_size - 4) in ocxl_global_mmio_read32() 20 *val = readl_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read32() 24 *val = readl((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read32() 32 int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_read64() argument 35 if (offset > afu->config.global_mmio_size - 8) in ocxl_global_mmio_read64() 45 *val = readq_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read64() 49 *val = readq((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read64() 57 int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_write32() argument 60 if (offset > afu->config.global_mmio_size - 4) in ocxl_global_mmio_write32() [all …]
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| /linux/drivers/net/dsa/sja1105/ |
| H A D | sja1105_ethtool.c | 83 int offset; member 94 .offset = 0, 101 .offset = 0x0, 108 .offset = 0x0, 115 .offset = 0x0, 123 .offset = 0x1, 130 .offset = 0x1, 137 .offset = 0x1, 144 .offset = 0x1, 151 .offset = 0x1, [all …]
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| /linux/sound/usb/qcom/ |
| H A D | usb_audio_qmi_v01.c | 17 .offset = offsetof(struct mem_info_v01, iova), 25 .offset = offsetof(struct mem_info_v01, dma), 33 .offset = offsetof(struct mem_info_v01, size), 49 .offset = offsetof(struct apps_mem_info_v01, evt_ring), 58 .offset = offsetof(struct apps_mem_info_v01, tr_data), 67 .offset = offsetof(struct apps_mem_info_v01, tr_sync), 76 .offset = offsetof(struct apps_mem_info_v01, xfer_buff), 85 .offset = offsetof(struct apps_mem_info_v01, dcba), 102 .offset = offsetof(struct usb_endpoint_descriptor_v01, 111 .offset = offsetof(struct usb_endpoint_descriptor_v01, [all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | init.c | 43 init->offset, init_exec(init) ? \ 365 return bit_I.offset; in init_table() 377 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument 382 if (len >= offset + 2) { in init_table_() 383 data = nvbios_rd16(bios, data + offset); in init_table_() 461 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument 468 return nvbios_rd08(bios, data + offset); in init_xlat_() 586 u8 opcode = nvbios_rd08(bios, init->offset); in init_reserved() 600 cont(" 0x%02x", nvbios_rd08(bios, init->offset + i)); in init_reserved() 602 init->offset += length; in init_reserved() [all …]
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| /linux/fs/btrfs/tests/ |
| H A D | inode-tests.c | 17 u64 ram_bytes, u64 offset, u64 disk_bytenr, in insert_extent() argument 35 key.offset = start; in insert_extent() 47 btrfs_set_file_extent_offset(leaf, fi, offset); in insert_extent() 69 key.offset = 0; in insert_inode_item_key() 100 u64 offset = 0; in setup_file_extents() local 107 insert_extent(root, offset, 6, 6, 0, 0, 0, BTRFS_FILE_EXTENT_INLINE, 0, in setup_file_extents() 110 offset = sectorsize; in setup_file_extents() 113 insert_extent(root, offset, 4, 4, 0, 0, 0, BTRFS_FILE_EXTENT_REG, 0, in setup_file_extents() 116 offset += 4; in setup_file_extents() 119 insert_extent(root, offset, sectorsize - 1, sectorsize - 1, 0, in setup_file_extents() [all …]
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-da9062.c | 26 #define DA9062_TYPE(offset) (4 * (offset % 2)) argument 27 #define DA9062_PIN_SHIFT(offset) (4 * (offset % 2)) argument 41 unsigned int offset) in da9062_pctl_get_pin_mode() argument 46 ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val); in da9062_pctl_get_pin_mode() 50 val >>= DA9062_PIN_SHIFT(offset); in da9062_pctl_get_pin_mode() 57 unsigned int offset, unsigned int mode_req) in da9062_pctl_set_pin_mode() argument 65 mode <<= DA9062_PIN_SHIFT(offset); in da9062_pctl_set_pin_mode() 66 mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset); in da9062_pctl_set_pin_mode() 68 ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), in da9062_pctl_set_pin_mode() 71 pctl->pin_config[offset] = mode_req; in da9062_pctl_set_pin_mode() [all …]
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