220 	void (*reg_bit_set)(struct aspeed_gpio *gpio, unsigned int offset,
222 	bool (*reg_bit_get)(struct aspeed_gpio *gpio, unsigned int offset,
224 	int (*reg_bank_get)(struct aspeed_gpio *gpio, unsigned int offset,
226 	void (*privilege_ctrl)(struct aspeed_gpio *gpio, unsigned int offset, int owner);
228 	bool (*copro_request)(struct aspeed_gpio *gpio, unsigned int offset);
229 	void (*copro_release)(struct aspeed_gpio *gpio, unsigned int offset);
324 static const struct aspeed_gpio_bank *to_bank(unsigned int offset)  in to_bank()  argument
326 	unsigned int bank = GPIO_BANK(offset);  in to_bank()
338 		struct aspeed_gpio *gpio, unsigned int offset)  in find_bank_props()  argument
343 		if (props->bank == GPIO_BANK(offset))  in find_bank_props()
351 static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset)  in have_gpio()  argument
353 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_gpio()
355 	if (offset >= gpio->chip.ngpio)  in have_gpio()
358 	return (!props || ((props->input | props->output) & GPIO_BIT(offset)));  in have_gpio()
361 static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset)  in have_input()  argument
363 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_input()
365 	return !props || (props->input & GPIO_BIT(offset));  in have_input()
371 static inline bool have_output(struct aspeed_gpio *gpio, unsigned int offset)  in have_output()  argument
373 	const struct aspeed_bank_props *props = find_bank_props(gpio, offset);  in have_output()
375 	return !props || (props->output & GPIO_BIT(offset));  in have_output()
378 static void aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio, unsigned int offset, int cmdsrc)  in aspeed_gpio_change_cmd_source()  argument
381 		gpio->config->llops->privilege_ctrl(gpio, offset, cmdsrc);  in aspeed_gpio_change_cmd_source()
385 				      unsigned int offset)  in aspeed_gpio_copro_request()  argument
388 		return gpio->config->llops->copro_request(gpio, offset);  in aspeed_gpio_copro_request()
394 				      unsigned int offset)  in aspeed_gpio_copro_release()  argument
397 		gpio->config->llops->copro_release(gpio, offset);  in aspeed_gpio_copro_release()
406 static int aspeed_gpio_get(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_get()  argument
410 	return gpio->config->llops->reg_bit_get(gpio, offset, reg_val);  in aspeed_gpio_get()
413 static void __aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,  in __aspeed_gpio_set()  argument
418 	gpio->config->llops->reg_bit_set(gpio, offset, reg_val, val);  in __aspeed_gpio_set()
420 	gpio->config->llops->reg_bit_get(gpio, offset, reg_val);  in __aspeed_gpio_set()
423 static int aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)  in aspeed_gpio_set()  argument
430 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set()
432 	__aspeed_gpio_set(gc, offset, val);  in aspeed_gpio_set()
435 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set()
440 static int aspeed_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_dir_in()  argument
445 	if (!have_input(gpio, offset))  in aspeed_gpio_dir_in()
450 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_in()
451 	gpio->config->llops->reg_bit_set(gpio, offset, reg_dir, 0);  in aspeed_gpio_dir_in()
453 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_in()
459 			       unsigned int offset, int val)  in aspeed_gpio_dir_out()  argument
464 	if (!have_output(gpio, offset))  in aspeed_gpio_dir_out()
469 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_dir_out()
470 	__aspeed_gpio_set(gc, offset, val);  in aspeed_gpio_dir_out()
471 	gpio->config->llops->reg_bit_set(gpio, offset, reg_dir, 1);  in aspeed_gpio_dir_out()
474 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_dir_out()
479 static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)  in aspeed_gpio_get_direction()  argument
484 	if (!have_input(gpio, offset))  in aspeed_gpio_get_direction()
487 	if (!have_output(gpio, offset))  in aspeed_gpio_get_direction()
492 	val = gpio->config->llops->reg_bit_get(gpio, offset, reg_dir);  in aspeed_gpio_get_direction()
499 					   int *offset)  in irqd_to_aspeed_gpio_data()  argument
503 	*offset = irqd_to_hwirq(d);  in irqd_to_aspeed_gpio_data()
508 	if (!have_irq(internal, *offset))  in irqd_to_aspeed_gpio_data()
519 	int rc, offset;  in aspeed_gpio_irq_ack()  local
522 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &offset);  in aspeed_gpio_irq_ack()
528 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_ack()
530 	gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_status, 1);  in aspeed_gpio_irq_ack()
533 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_ack()
539 	int rc, offset;  in aspeed_gpio_irq_set_mask()  local
542 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &offset);  in aspeed_gpio_irq_set_mask()
552 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_irq_set_mask()
554 	gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_enable, set);  in aspeed_gpio_irq_set_mask()
557 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_irq_set_mask()
581 	int rc, offset;  in aspeed_gpio_set_type()  local
584 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &offset);  in aspeed_gpio_set_type()
610 		copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_set_type()
612 		gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type0,  in aspeed_gpio_set_type()
614 		gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type1,  in aspeed_gpio_set_type()
616 		gpio->config->llops->reg_bit_set(gpio, offset, reg_irq_type2,  in aspeed_gpio_set_type()
620 			aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_set_type()
657 		unsigned int offset;  in aspeed_init_irq_valid_mask()  local
661 		for_each_clear_bit(offset, &input, 32) {  in aspeed_init_irq_valid_mask()
662 			unsigned int i = props->bank * 32 + offset;  in aspeed_init_irq_valid_mask()
675 					unsigned int offset, bool enable)  in aspeed_gpio_reset_tolerance()  argument
682 	copro = aspeed_gpio_copro_request(gpio, offset);  in aspeed_gpio_reset_tolerance()
684 	gpio->config->llops->reg_bit_set(gpio, offset, reg_tolerance, enable);  in aspeed_gpio_reset_tolerance()
687 		aspeed_gpio_copro_release(gpio, offset);  in aspeed_gpio_reset_tolerance()
692 static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset)  in aspeed_gpio_request()  argument
694 	if (!have_gpio(gpiochip_get_data(chip), offset))  in aspeed_gpio_request()
697 	return pinctrl_gpio_request(chip, offset);  in aspeed_gpio_request()
700 static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset)  in aspeed_gpio_free()  argument
702 	pinctrl_gpio_free(chip, offset);  in aspeed_gpio_free()
730 		unsigned int offset, unsigned int timer)  in register_allocated_timer()  argument
732 	if (WARN(gpio->offset_timer[offset] != 0,  in register_allocated_timer()
734 				offset, gpio->offset_timer[offset]))  in register_allocated_timer()
741 	gpio->offset_timer[offset] = timer;  in register_allocated_timer()
749 		unsigned int offset)  in unregister_allocated_timer()  argument
751 	if (WARN(gpio->offset_timer[offset] == 0,  in unregister_allocated_timer()
752 				"No timer allocated to offset %d\n", offset))  in unregister_allocated_timer()
755 	if (WARN(gpio->timer_users[gpio->offset_timer[offset]] == 0,  in unregister_allocated_timer()
757 				gpio->offset_timer[offset]))  in unregister_allocated_timer()
760 	gpio->timer_users[gpio->offset_timer[offset]]--;  in unregister_allocated_timer()
761 	gpio->offset_timer[offset] = 0;  in unregister_allocated_timer()
768 		unsigned int offset)  in timer_allocation_registered()  argument
770 	return gpio->offset_timer[offset] > 0;  in timer_allocation_registered()
774 static void configure_timer(struct aspeed_gpio *gpio, unsigned int offset,  in configure_timer()  argument
780 	gpio->config->llops->reg_bit_set(gpio, offset, reg_debounce_sel1, !!(timer & BIT(1)));  in configure_timer()
781 	gpio->config->llops->reg_bit_set(gpio, offset, reg_debounce_sel2, !!(timer & BIT(0)));  in configure_timer()
784 static int enable_debounce(struct gpio_chip *chip, unsigned int offset,  in enable_debounce()  argument
804 	if (timer_allocation_registered(gpio, offset)) {  in enable_debounce()
805 		rc = unregister_allocated_timer(gpio, offset);  in enable_debounce()
844 			configure_timer(gpio, offset, 0);  in enable_debounce()
856 	register_allocated_timer(gpio, offset, i);  in enable_debounce()
857 	configure_timer(gpio, offset, i);  in enable_debounce()
862 static int disable_debounce(struct gpio_chip *chip, unsigned int offset)  in disable_debounce()  argument
869 	rc = unregister_allocated_timer(gpio, offset);  in disable_debounce()
871 		configure_timer(gpio, offset, 0);  in disable_debounce()
876 static int set_debounce(struct gpio_chip *chip, unsigned int offset,  in set_debounce()  argument
881 	if (!have_debounce(gpio, offset))  in set_debounce()
885 		return enable_debounce(chip, offset, usecs);  in set_debounce()
887 	return disable_debounce(chip, offset);  in set_debounce()
890 static int aspeed_gpio_set_config(struct gpio_chip *chip, unsigned int offset,  in aspeed_gpio_set_config()  argument
897 		return set_debounce(chip, offset, arg);  in aspeed_gpio_set_config()
901 		return pinctrl_gpio_set_config(chip, offset, config);  in aspeed_gpio_set_config()
907 		return aspeed_gpio_reset_tolerance(chip, offset, arg);  in aspeed_gpio_set_config()
941 	int rc = 0, bindex, offset = gpiod_hwgpio(desc);  in aspeed_gpio_copro_grab_gpio()  local
942 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_gpio_copro_grab_gpio()
951 	if (offset < 0 || offset > gpio->chip.ngpio)  in aspeed_gpio_copro_grab_gpio()
953 	bindex = offset >> 3;  in aspeed_gpio_copro_grab_gpio()
965 		aspeed_gpio_change_cmd_source(gpio, offset,  in aspeed_gpio_copro_grab_gpio()
973 		*bit = GPIO_OFFSET(offset);  in aspeed_gpio_copro_grab_gpio()
986 	int rc = 0, bindex, offset = gpiod_hwgpio(desc);  in aspeed_gpio_copro_release_gpio()  local
994 	if (offset < 0 || offset > gpio->chip.ngpio)  in aspeed_gpio_copro_release_gpio()
996 	bindex = offset >> 3;  in aspeed_gpio_copro_release_gpio()
1008 		aspeed_gpio_change_cmd_source(gpio, offset,  in aspeed_gpio_copro_release_gpio()
1018 	int rc, offset;  in aspeed_gpio_irq_print_chip()  local
1020 	rc = irqd_to_aspeed_gpio_data(d, &gpio, &offset);  in aspeed_gpio_irq_print_chip()
1037 static void aspeed_g4_reg_bit_set(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g4_reg_bit_set()  argument
1040 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_g4_reg_bit_set()
1045 		temp = gpio->dcache[GPIO_BANK(offset)];  in aspeed_g4_reg_bit_set()
1050 		temp |= GPIO_BIT(offset);  in aspeed_g4_reg_bit_set()
1052 		temp &= ~GPIO_BIT(offset);  in aspeed_g4_reg_bit_set()
1055 		gpio->dcache[GPIO_BANK(offset)] = temp;  in aspeed_g4_reg_bit_set()
1059 static bool aspeed_g4_reg_bit_get(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g4_reg_bit_get()  argument
1062 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_g4_reg_bit_get()
1065 	return !!(ioread32(addr) & GPIO_BIT(offset));  in aspeed_g4_reg_bit_get()
1068 static int aspeed_g4_reg_bank_get(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g4_reg_bank_get()  argument
1071 	const struct aspeed_gpio_bank *bank = to_bank(offset);  in aspeed_g4_reg_bank_get()
1080 static void aspeed_g4_privilege_ctrl(struct aspeed_gpio *gpio, unsigned int offset, int cmdsrc)  in aspeed_g4_privilege_ctrl()  argument
1087 	aspeed_g4_reg_bit_set(gpio, offset & ~(0x7), reg_cmdsrc1, !!(cmdsrc & BIT(1)));  in aspeed_g4_privilege_ctrl()
1089 	aspeed_g4_reg_bit_set(gpio, offset & ~(0x7), reg_cmdsrc0, !!(cmdsrc & BIT(0)));  in aspeed_g4_privilege_ctrl()
1105 static bool aspeed_g4_copro_request(struct aspeed_gpio *gpio, unsigned int offset)  in aspeed_g4_copro_request()  argument
1109 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_g4_copro_request()
1118 	aspeed_g4_privilege_ctrl(gpio, offset, GPIO_CMDSRC_ARM);  in aspeed_g4_copro_request()
1121 	gpio->dcache[GPIO_BANK(offset)] = aspeed_g4_reg_bank_get(gpio, offset, reg_rdata);  in aspeed_g4_copro_request()
1126 static void aspeed_g4_copro_release(struct aspeed_gpio *gpio, unsigned int offset)  in aspeed_g4_copro_release()  argument
1130 	if (!gpio->cf_copro_bankmap[offset >> 3])  in aspeed_g4_copro_release()
1136 	aspeed_g4_privilege_ctrl(gpio, offset, GPIO_CMDSRC_COLDFIRE);  in aspeed_g4_copro_release()
1152 static void aspeed_g7_reg_bit_set(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g7_reg_bit_set()  argument
1156 	void __iomem *addr = gpio->base + GPIO_G7_CTRL_REG_OFFSET(offset);  in aspeed_g7_reg_bit_set()
1165 static bool aspeed_g7_reg_bit_get(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g7_reg_bit_get()  argument
1171 	addr = gpio->base + GPIO_G7_CTRL_REG_OFFSET(offset);  in aspeed_g7_reg_bit_get()
1181 static int aspeed_g7_reg_bank_get(struct aspeed_gpio *gpio, unsigned int offset,  in aspeed_g7_reg_bank_get()  argument
1187 		addr = gpio->base + GPIO_G7_IRQ_STS_OFFSET(offset >> 5);  in aspeed_g7_reg_bank_get()