Searched refs:odf (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/clk/st/ |
| H A D | clkgen-pll.c | 52 struct clkgen_field odf[C32_MAX_ODFS]; member
83 .odf = { CLKGEN_FIELD(0x2b4, C32_ODF_MASK, 0) },
118 .odf = { CLKGEN_FIELD(0x2dc, C32_ODF_MASK, 0) },
144 .odf = { CLKGEN_FIELD(0x1b0, C32_ODF_MASK, 8) },
170 .odf = { CLKGEN_FIELD(0x1b0, C28_ODF_MASK, 8) },
222 unsigned long odf; member
708 unsigned long pll_flags, int odf, in clkgen_odf_register() argument
724 gate->reg = reg + pll_data->odf_gate[odf].offset; in clkgen_odf_register()
725 gate->bit_idx = pll_data->odf_gate[odf].shift; in clkgen_odf_register()
735 div->reg = reg + pll_data->odf[odf].offset; in clkgen_odf_register()
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| /linux/drivers/gpu/drm/stm/ |
| H A D | dw_mipi_dsi-stm.c | 136 static int dsi_pll_get_clkout_khz(int clkin_khz, int idf, int ndiv, int odf) in dsi_pll_get_clkout_khz() argument
138 int divisor = idf * odf; in dsi_pll_get_clkout_khz()
149 int *idf, int *ndiv, int *odf) in dsi_pll_get_params() argument
191 *odf = o; in dsi_pll_get_params()
255 unsigned int idf, ndiv, odf, pll_in_khz, pll_out_khz; in dw_mipi_dsi_clk_recalc_rate() local
268 odf = int_pow(2, (val & WRPCR_ODF) >> 16); in dw_mipi_dsi_clk_recalc_rate()
271 pll_out_khz = dsi_pll_get_clkout_khz(pll_in_khz, idf, ndiv, odf); in dw_mipi_dsi_clk_recalc_rate()
280 unsigned int idf, ndiv, odf, pll_in_khz, pll_out_khz; in dw_mipi_dsi_clk_determine_rate() local
290 odf = 0; in dw_mipi_dsi_clk_determine_rate()
293 &idf, &ndiv, &odf); in dw_mipi_dsi_clk_determine_rate()
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| /linux/drivers/clk/ |
| H A D | clk-stm32h7.c | 1305 int odf; in stm32h7_rcc_init() local
1314 for (odf = 0; odf < 3; odf++) { in stm32h7_rcc_init()
1315 int idx = n * 3 + odf; in stm32h7_rcc_init()
1317 get_cfg_composite_div(&odf_clk_gcfg, &stm32_odf[n][odf], in stm32h7_rcc_init()
1321 stm32_odf[n][odf].name, in stm32h7_rcc_init()
1322 stm32_odf[n][odf].parent_name, in stm32h7_rcc_init()
1323 stm32_odf[n][odf].num_parents, in stm32h7_rcc_init()
1327 stm32_odf[n][odf].flags); in stm32h7_rcc_init()
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| /linux/Documentation/devicetree/bindings/clock/st/ |
| H A D | st,clkgen-pll.txt | 38 clock-output-names = "clockgen-a9-pll-odf";
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| /linux/drivers/media/dvb-frontends/ |
| H A D | stv0910.c | 790 u32 odf = 4; in set_mclock() local
793 u32 ndiv = (fphi * odf * idf) / quartz; in set_mclock()
841 write_reg(state, RSTV0910_NCOARSE2, odf); in set_mclock()
845 state->base->mclk = fvco / (2 * odf) * 1000000; in set_mclock()
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