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Searched refs:od_table (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c1168 OverDriveTableExternal_t *od_table) in smu_v13_0_7_dump_od_table() argument
1172 dev_dbg(adev->dev, "OD: Gfxclk: (%d, %d)\n", od_table->OverDriveTable.GfxclkFmin, in smu_v13_0_7_dump_od_table()
1173 od_table->OverDriveTable.GfxclkFmax); in smu_v13_0_7_dump_od_table()
1174 dev_dbg(adev->dev, "OD: Uclk: (%d, %d)\n", od_table->OverDriveTable.UclkFmin, in smu_v13_0_7_dump_od_table()
1175 od_table->OverDriveTable.UclkFmax); in smu_v13_0_7_dump_od_table()
1179 OverDriveTableExternal_t *od_table) in smu_v13_0_7_get_overdrive_table() argument
1186 (void *)od_table, in smu_v13_0_7_get_overdrive_table()
1195 OverDriveTableExternal_t *od_table) in smu_v13_0_7_upload_overdrive_table() argument
1202 (void *)od_table, in smu_v13_0_7_upload_overdrive_table()
1216 OverDriveTableExternal_t *od_table = in smu_v13_0_7_emit_clk_levels() local
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H A Dsmu_v13_0_0_ppt.c1158 OverDriveTableExternal_t *od_table) in smu_v13_0_0_dump_od_table() argument
1162 dev_dbg(adev->dev, "OD: Gfxclk: (%d, %d)\n", od_table->OverDriveTable.GfxclkFmin, in smu_v13_0_0_dump_od_table()
1163 od_table->OverDriveTable.GfxclkFmax); in smu_v13_0_0_dump_od_table()
1164 dev_dbg(adev->dev, "OD: Uclk: (%d, %d)\n", od_table->OverDriveTable.UclkFmin, in smu_v13_0_0_dump_od_table()
1165 od_table->OverDriveTable.UclkFmax); in smu_v13_0_0_dump_od_table()
1169 OverDriveTableExternal_t *od_table) in smu_v13_0_0_get_overdrive_table() argument
1176 (void *)od_table, in smu_v13_0_0_get_overdrive_table()
1185 OverDriveTableExternal_t *od_table) in smu_v13_0_0_upload_overdrive_table() argument
1192 (void *)od_table, in smu_v13_0_0_upload_overdrive_table()
1206 OverDriveTableExternal_t *od_table = in smu_v13_0_0_emit_clk_levels() local
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c1035 OverDriveTableExternal_t *od_table = in smu_v14_0_2_emit_clk_levels() local
1099 od_table->OverDriveTable.GfxclkFoffset); in smu_v14_0_2_emit_clk_levels()
1109 od_table->OverDriveTable.UclkFmin, in smu_v14_0_2_emit_clk_levels()
1110 od_table->OverDriveTable.UclkFmax); in smu_v14_0_2_emit_clk_levels()
1120 od_table->OverDriveTable.VoltageOffsetPerZoneBoundary[0]); in smu_v14_0_2_emit_clk_levels()
1132 (int)od_table->OverDriveTable.FanLinearTempPoints[i], in smu_v14_0_2_emit_clk_levels()
1133 (int)od_table->OverDriveTable.FanLinearPwmPoints[i]); in smu_v14_0_2_emit_clk_levels()
1159 (int)od_table->OverDriveTable.AcousticLimitRpmThreshold); in smu_v14_0_2_emit_clk_levels()
1177 (int)od_table->OverDriveTable.AcousticTargetRpmThreshold); in smu_v14_0_2_emit_clk_levels()
1195 (int)od_table->OverDriveTable.FanTargetTemperature); in smu_v14_0_2_emit_clk_levels()
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c1228 static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum S… in navi10_od_feature_is_supported() argument
1230 return od_table->cap[cap]; in navi10_od_feature_is_supported()
1233 static void navi10_od_setting_get_range(struct smu_11_0_overdrive_table *od_table, in navi10_od_setting_get_range() argument
1238 *min = od_table->min[setting]; in navi10_od_setting_get_range()
1240 *max = od_table->max[setting]; in navi10_od_setting_get_range()
1256 OverDriveTable_t *od_table = in navi10_emit_clk_levels() local
1293 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1298 od_table->GfxclkFmin, od_table->GfxclkFmax); in navi10_emit_clk_levels()
1301 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()
1305 *offset += sysfs_emit_at(buf, *offset, "OD_MCLK:\n1: %uMHz\n", od_table->UclkFmax); in navi10_emit_clk_levels()
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H A Dsienna_cichlid_ppt.c621 static bool sienna_cichlid_is_od_feature_supported(struct smu_11_0_7_overdrive_table *od_table, in sienna_cichlid_is_od_feature_supported() argument
624 return od_table->cap[cap]; in sienna_cichlid_is_od_feature_supported()
1260 static void sienna_cichlid_get_od_setting_range(struct smu_11_0_7_overdrive_table *od_table, in sienna_cichlid_get_od_setting_range() argument
1265 *min = od_table->min[setting]; in sienna_cichlid_get_od_setting_range()
1267 *max = od_table->max[setting]; in sienna_cichlid_get_od_setting_range()
1279 OverDriveTable_t *od_table = in sienna_cichlid_emit_clk_levels() local
1321 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_emit_clk_levels()
1328 …size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMhz\n", od_table->GfxclkFmin, od_table->GfxclkFma… in sienna_cichlid_emit_clk_levels()
1332 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_emit_clk_levels()
1339 size += sysfs_emit_at(buf, size, "0: %uMhz\n1: %uMHz\n", od_table->UclkFmin, od_table->UclkFmax); in sienna_cichlid_emit_clk_levels()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c1254 OverDriveTable_t *od_table = &(data->smc_state_table.overdrive_table); in vega20_od8_initialize_default_settings() local
1264 ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true); in vega20_od8_initialize_default_settings()
1271 od_table->GfxclkFmin; in vega20_od8_initialize_default_settings()
1273 od_table->GfxclkFmax; in vega20_od8_initialize_default_settings()
1282 od_table->GfxclkFreq1 = od_table->GfxclkFmin; in vega20_od8_initialize_default_settings()
1284 od_table->GfxclkFreq1; in vega20_od8_initialize_default_settings()
1286 od_table->GfxclkFreq3 = od_table->GfxclkFmax; in vega20_od8_initialize_default_settings()
1288 od_table->GfxclkFreq3; in vega20_od8_initialize_default_settings()
1290 od_table->GfxclkFreq2 = (od_table->GfxclkFreq1 + od_table->GfxclkFreq3) / 2; in vega20_od8_initialize_default_settings()
1292 od_table->GfxclkFreq2; in vega20_od8_initialize_default_settings()
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H A Dvega10_hwmgr.c312 struct phm_ppt_v1_clock_voltage_dependency_table *od_table[3]; in vega10_odn_initial_default_setting() local
334 od_table[0] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()
335 od_table[1] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()
336 od_table[2] = (struct phm_ppt_v1_clock_voltage_dependency_table *)&odn_table->vdd_dep_on_socclk; in vega10_odn_initial_default_setting()
339 smu_get_voltage_dependency_table_ppt_v1(dep_table[i], od_table[i]); in vega10_odn_initial_default_setting()
346 i = od_table[2]->count - 1; in vega10_odn_initial_default_setting()
347 …od_table[2]->entries[i].clk = hwmgr->platform_descriptor.overdriveLimit.memoryClock > od_table[2]-… in vega10_odn_initial_default_setting()
349 od_table[2]->entries[i].clk; in vega10_odn_initial_default_setting()
350 od_table[2]->entries[i].vddc = odn_table->max_vddc > od_table[2]->entries[i].vddc ? in vega10_odn_initial_default_setting()
352 od_table[2]->entries[i].vddc; in vega10_odn_initial_default_setting()