xref: /linux/drivers/nvme/host/rdma.c (revision d0fc310b4dfd334023b90d2423818044190c0f68)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVMe over Fabrics RDMA host code.
4  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5  */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <rdma/mr_pool.h>
11 #include <linux/err.h>
12 #include <linux/string.h>
13 #include <linux/atomic.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-integrity.h>
16 #include <linux/types.h>
17 #include <linux/list.h>
18 #include <linux/mutex.h>
19 #include <linux/async.h>
20 #include <linux/scatterlist.h>
21 #include <linux/nvme.h>
22 #include <linux/unaligned.h>
23 
24 #include <rdma/ib_verbs.h>
25 #include <rdma/rdma_cm.h>
26 #include <linux/nvme-rdma.h>
27 
28 #include "nvme.h"
29 #include "fabrics.h"
30 
31 
32 #define NVME_RDMA_CM_TIMEOUT_MS		3000		/* 3 second */
33 
34 #define NVME_RDMA_MAX_SEGMENTS		256
35 
36 #define NVME_RDMA_MAX_INLINE_SEGMENTS	4
37 
38 #define NVME_RDMA_DATA_SGL_SIZE \
39 	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
40 #define NVME_RDMA_METADATA_SGL_SIZE \
41 	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
42 
43 static DEFINE_MUTEX(device_list_mutex);
44 static LIST_HEAD_GUARDED(device_list, device_list_mutex);
45 
46 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
47 static LIST_HEAD_GUARDED(nvme_rdma_ctrl_list, nvme_rdma_ctrl_mutex);
48 
49 struct nvme_rdma_device {
50 	struct ib_device	*dev;
51 	struct ib_pd		*pd;
52 	struct kref		ref;
53 	struct list_head	entry
54 		__guarded_by(&device_list_mutex);
55 	unsigned int		num_inline_segments;
56 };
57 
58 struct nvme_rdma_qe {
59 	struct ib_cqe		cqe;
60 	void			*data;
61 	u64			dma;
62 };
63 
64 struct nvme_rdma_sgl {
65 	int			nents;
66 	struct sg_table		sg_table;
67 };
68 
69 struct nvme_rdma_queue;
70 struct nvme_rdma_request {
71 	struct nvme_request	req;
72 	struct ib_mr		*mr;
73 	struct nvme_rdma_qe	sqe;
74 	union nvme_result	result;
75 	__le16			status;
76 	refcount_t		ref;
77 	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
78 	u32			num_sge;
79 	struct ib_reg_wr	reg_wr;
80 	struct ib_cqe		reg_cqe;
81 	struct nvme_rdma_queue  *queue;
82 	struct nvme_rdma_sgl	data_sgl;
83 	struct nvme_rdma_sgl	*metadata_sgl;
84 	bool			use_sig_mr;
85 };
86 
87 enum nvme_rdma_queue_flags {
88 	NVME_RDMA_Q_ALLOCATED		= 0,
89 	NVME_RDMA_Q_LIVE		= 1,
90 	NVME_RDMA_Q_TR_READY		= 2,
91 };
92 
93 struct nvme_rdma_queue {
94 	struct nvme_rdma_qe	*rsp_ring;
95 	int			queue_size;
96 	size_t			cmnd_capsule_len;
97 	struct nvme_rdma_ctrl	*ctrl;
98 	struct nvme_rdma_device	*device;
99 	struct ib_cq		*ib_cq;
100 	struct ib_qp		*qp;
101 
102 	unsigned long		flags;
103 	struct rdma_cm_id	*cm_id;
104 	int			cm_error;
105 	struct completion	cm_done;
106 	bool			pi_support;
107 	int			cq_size;
108 	struct mutex		queue_lock;
109 };
110 
111 struct nvme_rdma_setup_ctx {
112 	struct nvme_rdma_queue	*queue;
113 	int			*err;
114 };
115 
116 struct nvme_rdma_ctrl {
117 	/* read only in the hot path */
118 	struct nvme_rdma_queue	*queues;
119 
120 	/* other member variables */
121 	struct blk_mq_tag_set	tag_set;
122 	struct work_struct	err_work;
123 
124 	struct nvme_rdma_qe	async_event_sqe;
125 
126 	struct delayed_work	reconnect_work;
127 
128 	struct list_head	list
129 		__guarded_by(&nvme_rdma_ctrl_mutex);
130 
131 	struct blk_mq_tag_set	admin_tag_set;
132 	struct nvme_rdma_device	*device;
133 
134 	u32			max_fr_pages;
135 
136 	struct sockaddr_storage addr;
137 	struct sockaddr_storage src_addr;
138 
139 	struct nvme_ctrl	ctrl;
140 	bool			use_inline_data;
141 	u32			io_queues[HCTX_MAX_TYPES];
142 };
143 
to_rdma_ctrl(struct nvme_ctrl * ctrl)144 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
145 {
146 	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
147 }
148 
149 /*
150  * Disabling this option makes small I/O goes faster, but is fundamentally
151  * unsafe.  With it turned off we will have to register a global rkey that
152  * allows read and write access to all physical memory.
153  */
154 static bool register_always = true;
155 module_param(register_always, bool, 0444);
156 MODULE_PARM_DESC(register_always,
157 	 "Use memory registration even for contiguous memory regions");
158 
159 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
160 		struct rdma_cm_event *event);
161 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
162 static void nvme_rdma_complete_rq(struct request *rq);
163 
164 static const struct blk_mq_ops nvme_rdma_mq_ops;
165 static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
166 
nvme_rdma_queue_idx(struct nvme_rdma_queue * queue)167 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
168 {
169 	return queue - queue->ctrl->queues;
170 }
171 
nvme_rdma_poll_queue(struct nvme_rdma_queue * queue)172 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
173 {
174 	return nvme_rdma_queue_idx(queue) >
175 		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
176 		queue->ctrl->io_queues[HCTX_TYPE_READ];
177 }
178 
nvme_rdma_inline_data_size(struct nvme_rdma_queue * queue)179 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
180 {
181 	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
182 }
183 
nvme_rdma_free_qe(struct ib_device * ibdev,struct nvme_rdma_qe * qe,size_t capsule_size,enum dma_data_direction dir)184 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
185 		size_t capsule_size, enum dma_data_direction dir)
186 {
187 	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
188 	kfree(qe->data);
189 }
190 
nvme_rdma_alloc_qe(struct ib_device * ibdev,struct nvme_rdma_qe * qe,size_t capsule_size,enum dma_data_direction dir)191 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
192 		size_t capsule_size, enum dma_data_direction dir)
193 {
194 	qe->data = kzalloc(capsule_size, GFP_KERNEL);
195 	if (!qe->data)
196 		return -ENOMEM;
197 
198 	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
199 	if (ib_dma_mapping_error(ibdev, qe->dma)) {
200 		kfree(qe->data);
201 		qe->data = NULL;
202 		return -ENOMEM;
203 	}
204 
205 	return 0;
206 }
207 
nvme_rdma_free_ring(struct ib_device * ibdev,struct nvme_rdma_qe * ring,size_t ib_queue_size,size_t capsule_size,enum dma_data_direction dir)208 static void nvme_rdma_free_ring(struct ib_device *ibdev,
209 		struct nvme_rdma_qe *ring, size_t ib_queue_size,
210 		size_t capsule_size, enum dma_data_direction dir)
211 {
212 	int i;
213 
214 	for (i = 0; i < ib_queue_size; i++)
215 		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
216 	kfree(ring);
217 }
218 
nvme_rdma_alloc_ring(struct ib_device * ibdev,size_t ib_queue_size,size_t capsule_size,enum dma_data_direction dir)219 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
220 		size_t ib_queue_size, size_t capsule_size,
221 		enum dma_data_direction dir)
222 {
223 	struct nvme_rdma_qe *ring;
224 	int i;
225 
226 	ring = kzalloc_objs(struct nvme_rdma_qe, ib_queue_size);
227 	if (!ring)
228 		return NULL;
229 
230 	/*
231 	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
232 	 * lifetime. It's safe, since any change in the underlying RDMA device
233 	 * will issue error recovery and queue re-creation.
234 	 */
235 	for (i = 0; i < ib_queue_size; i++) {
236 		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
237 			goto out_free_ring;
238 	}
239 
240 	return ring;
241 
242 out_free_ring:
243 	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
244 	return NULL;
245 }
246 
nvme_rdma_qp_event(struct ib_event * event,void * context)247 static void nvme_rdma_qp_event(struct ib_event *event, void *context)
248 {
249 	pr_debug("QP event %s (%d)\n",
250 		 ib_event_msg(event->event), event->event);
251 
252 }
253 
nvme_rdma_wait_for_cm(struct nvme_rdma_queue * queue)254 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
255 {
256 	int ret;
257 
258 	ret = wait_for_completion_interruptible(&queue->cm_done);
259 	if (ret)
260 		return ret;
261 	WARN_ON_ONCE(queue->cm_error > 0);
262 	return queue->cm_error;
263 }
264 
nvme_rdma_create_qp(struct nvme_rdma_queue * queue,const int factor)265 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
266 {
267 	struct nvme_rdma_device *dev = queue->device;
268 	struct ib_qp_init_attr init_attr;
269 	int ret;
270 
271 	memset(&init_attr, 0, sizeof(init_attr));
272 	init_attr.event_handler = nvme_rdma_qp_event;
273 	/* +1 for drain */
274 	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
275 	/* +1 for drain */
276 	init_attr.cap.max_recv_wr = queue->queue_size + 1;
277 	init_attr.cap.max_recv_sge = 1;
278 	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
279 	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
280 	init_attr.qp_type = IB_QPT_RC;
281 	init_attr.send_cq = queue->ib_cq;
282 	init_attr.recv_cq = queue->ib_cq;
283 	if (queue->pi_support)
284 		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
285 	init_attr.qp_context = queue;
286 
287 	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
288 
289 	queue->qp = queue->cm_id->qp;
290 	return ret;
291 }
292 
nvme_rdma_exit_request(struct blk_mq_tag_set * set,struct request * rq,unsigned int hctx_idx)293 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
294 		struct request *rq, unsigned int hctx_idx)
295 {
296 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
297 
298 	kfree(req->sqe.data);
299 }
300 
nvme_rdma_init_request(struct blk_mq_tag_set * set,struct request * rq,unsigned int hctx_idx,int numa_node)301 static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
302 		struct request *rq, unsigned int hctx_idx,
303 		int numa_node)
304 {
305 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
306 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
307 	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
308 	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
309 
310 	nvme_req(rq)->ctrl = &ctrl->ctrl;
311 	req->sqe.data = kzalloc_obj(struct nvme_command);
312 	if (!req->sqe.data)
313 		return -ENOMEM;
314 
315 	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
316 	if (queue->pi_support)
317 		req->metadata_sgl = (void *)nvme_req(rq) +
318 			sizeof(struct nvme_rdma_request) +
319 			NVME_RDMA_DATA_SGL_SIZE;
320 
321 	req->queue = queue;
322 	nvme_req(rq)->cmd = req->sqe.data;
323 
324 	return 0;
325 }
326 
nvme_rdma_init_hctx(struct blk_mq_hw_ctx * hctx,void * data,unsigned int hctx_idx)327 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
328 		unsigned int hctx_idx)
329 {
330 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
331 	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
332 
333 	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
334 
335 	hctx->driver_data = queue;
336 	return 0;
337 }
338 
nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx * hctx,void * data,unsigned int hctx_idx)339 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
340 		unsigned int hctx_idx)
341 {
342 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(data);
343 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
344 
345 	BUG_ON(hctx_idx != 0);
346 
347 	hctx->driver_data = queue;
348 	return 0;
349 }
350 
nvme_rdma_free_dev(struct kref * ref)351 static void nvme_rdma_free_dev(struct kref *ref)
352 {
353 	struct nvme_rdma_device *ndev =
354 		container_of(ref, struct nvme_rdma_device, ref);
355 
356 	mutex_lock(&device_list_mutex);
357 	list_del(&ndev->entry);
358 	mutex_unlock(&device_list_mutex);
359 
360 	ib_dealloc_pd(ndev->pd);
361 	kfree(ndev);
362 }
363 
nvme_rdma_dev_put(struct nvme_rdma_device * dev)364 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
365 {
366 	kref_put(&dev->ref, nvme_rdma_free_dev);
367 }
368 
nvme_rdma_dev_get(struct nvme_rdma_device * dev)369 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
370 {
371 	return kref_get_unless_zero(&dev->ref);
372 }
373 
374 static struct nvme_rdma_device *
nvme_rdma_find_get_device(struct rdma_cm_id * cm_id)375 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
376 {
377 	struct nvme_rdma_device *ndev;
378 
379 	mutex_lock(&device_list_mutex);
380 	list_for_each_entry(ndev, &device_list, entry) {
381 		if (ndev->dev->node_guid == cm_id->device->node_guid &&
382 		    nvme_rdma_dev_get(ndev))
383 			goto out_unlock;
384 	}
385 
386 	ndev = kzalloc_obj(*ndev);
387 	if (!ndev)
388 		goto out_err;
389 
390 	ndev->dev = cm_id->device;
391 	kref_init(&ndev->ref);
392 
393 	ndev->pd = ib_alloc_pd(ndev->dev,
394 		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
395 	if (IS_ERR(ndev->pd))
396 		goto out_free_dev;
397 
398 	if (!(ndev->dev->attrs.device_cap_flags &
399 	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
400 		dev_err(&ndev->dev->dev,
401 			"Memory registrations not supported.\n");
402 		goto out_free_pd;
403 	}
404 
405 	ndev->num_inline_segments = ndev->dev->attrs.max_send_sge;
406 	if (ndev->num_inline_segments)
407 		ndev->num_inline_segments--;
408 	ndev->num_inline_segments = min(ndev->num_inline_segments, NVME_RDMA_MAX_INLINE_SEGMENTS);
409 	list_add(&ndev->entry, &device_list);
410 out_unlock:
411 	mutex_unlock(&device_list_mutex);
412 	return ndev;
413 
414 out_free_pd:
415 	ib_dealloc_pd(ndev->pd);
416 out_free_dev:
417 	kfree(ndev);
418 out_err:
419 	mutex_unlock(&device_list_mutex);
420 	return NULL;
421 }
422 
nvme_rdma_free_cq(struct nvme_rdma_queue * queue)423 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
424 {
425 	if (nvme_rdma_poll_queue(queue))
426 		ib_free_cq(queue->ib_cq);
427 	else
428 		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
429 }
430 
nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue * queue)431 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
432 {
433 	struct nvme_rdma_device *dev;
434 	struct ib_device *ibdev;
435 
436 	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
437 		return;
438 
439 	dev = queue->device;
440 	ibdev = dev->dev;
441 
442 	if (queue->pi_support)
443 		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
444 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
445 
446 	/*
447 	 * The cm_id object might have been destroyed during RDMA connection
448 	 * establishment error flow to avoid getting other cma events, thus
449 	 * the destruction of the QP shouldn't use rdma_cm API.
450 	 */
451 	ib_destroy_qp(queue->qp);
452 	nvme_rdma_free_cq(queue);
453 
454 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
455 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
456 
457 	nvme_rdma_dev_put(dev);
458 }
459 
nvme_rdma_get_max_fr_pages(struct ib_device * ibdev,bool pi_support)460 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
461 {
462 	u32 max_page_list_len;
463 
464 	if (pi_support)
465 		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
466 	else
467 		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
468 
469 	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
470 }
471 
nvme_rdma_create_cq(struct ib_device * ibdev,struct nvme_rdma_queue * queue)472 static int nvme_rdma_create_cq(struct ib_device *ibdev,
473 		struct nvme_rdma_queue *queue)
474 {
475 	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
476 
477 	/*
478 	 * Spread I/O queues completion vectors according their queue index.
479 	 * Admin queues can always go on completion vector 0.
480 	 */
481 	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
482 
483 	/* Polling queues need direct cq polling context */
484 	if (nvme_rdma_poll_queue(queue))
485 		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
486 					   comp_vector, IB_POLL_DIRECT);
487 	else
488 		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
489 					      comp_vector, IB_POLL_SOFTIRQ);
490 
491 	if (IS_ERR(queue->ib_cq)) {
492 		ret = PTR_ERR(queue->ib_cq);
493 		return ret;
494 	}
495 
496 	return 0;
497 }
498 
nvme_rdma_create_queue_ib(struct nvme_rdma_queue * queue)499 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
500 {
501 	struct ib_device *ibdev;
502 	const int send_wr_factor = 3;			/* MR, SEND, INV */
503 	const int cq_factor = send_wr_factor + 1;	/* + RECV */
504 	int ret, pages_per_mr;
505 
506 	queue->device = nvme_rdma_find_get_device(queue->cm_id);
507 	if (!queue->device) {
508 		dev_err(queue->cm_id->device->dev.parent,
509 			"no client data found!\n");
510 		return -ECONNREFUSED;
511 	}
512 	ibdev = queue->device->dev;
513 
514 	/* +1 for ib_drain_qp */
515 	queue->cq_size = cq_factor * queue->queue_size + 1;
516 
517 	ret = nvme_rdma_create_cq(ibdev, queue);
518 	if (ret)
519 		goto out_put_dev;
520 
521 	ret = nvme_rdma_create_qp(queue, send_wr_factor);
522 	if (ret)
523 		goto out_destroy_ib_cq;
524 
525 	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
526 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
527 	if (!queue->rsp_ring) {
528 		ret = -ENOMEM;
529 		goto out_destroy_qp;
530 	}
531 
532 	/*
533 	 * Currently we don't use SG_GAPS MR's so if the first entry is
534 	 * misaligned we'll end up using two entries for a single data page,
535 	 * so one additional entry is required.
536 	 */
537 	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
538 	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
539 			      queue->queue_size,
540 			      IB_MR_TYPE_MEM_REG,
541 			      pages_per_mr, 0);
542 	if (ret) {
543 		dev_err(queue->ctrl->ctrl.device,
544 			"failed to initialize MR pool sized %d for QID %d\n",
545 			queue->queue_size, nvme_rdma_queue_idx(queue));
546 		goto out_destroy_ring;
547 	}
548 
549 	if (queue->pi_support) {
550 		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
551 				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
552 				      pages_per_mr, pages_per_mr);
553 		if (ret) {
554 			dev_err(queue->ctrl->ctrl.device,
555 				"failed to initialize PI MR pool sized %d for QID %d\n",
556 				queue->queue_size, nvme_rdma_queue_idx(queue));
557 			goto out_destroy_mr_pool;
558 		}
559 	}
560 
561 	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
562 
563 	return 0;
564 
565 out_destroy_mr_pool:
566 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
567 out_destroy_ring:
568 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
569 			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
570 out_destroy_qp:
571 	rdma_destroy_qp(queue->cm_id);
572 out_destroy_ib_cq:
573 	nvme_rdma_free_cq(queue);
574 out_put_dev:
575 	nvme_rdma_dev_put(queue->device);
576 	return ret;
577 }
578 
nvme_rdma_alloc_queue(struct nvme_rdma_queue * queue)579 static int nvme_rdma_alloc_queue(struct nvme_rdma_queue *queue)
580 {
581 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
582 	int idx = nvme_rdma_queue_idx(queue);
583 	struct sockaddr *src_addr = NULL;
584 	int ret;
585 
586 	mutex_init(&queue->queue_lock);
587 	if (idx && ctrl->ctrl.max_integrity_segments)
588 		queue->pi_support = true;
589 	else
590 		queue->pi_support = false;
591 	init_completion(&queue->cm_done);
592 
593 	if (idx > 0)
594 		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
595 	else
596 		queue->cmnd_capsule_len = sizeof(struct nvme_command);
597 
598 	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
599 			RDMA_PS_TCP, IB_QPT_RC);
600 	if (IS_ERR(queue->cm_id)) {
601 		dev_info(ctrl->ctrl.device,
602 			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
603 		ret = PTR_ERR(queue->cm_id);
604 		goto out_destroy_mutex;
605 	}
606 
607 	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
608 		src_addr = (struct sockaddr *)&ctrl->src_addr;
609 
610 	queue->cm_error = -ETIMEDOUT;
611 	ret = rdma_resolve_addr(queue->cm_id, src_addr,
612 			(struct sockaddr *)&ctrl->addr,
613 			NVME_RDMA_CM_TIMEOUT_MS);
614 	if (ret) {
615 		dev_info(ctrl->ctrl.device,
616 			"rdma_resolve_addr failed (%d).\n", ret);
617 		goto out_destroy_cm_id;
618 	}
619 
620 	ret = nvme_rdma_wait_for_cm(queue);
621 	if (ret) {
622 		dev_info(ctrl->ctrl.device,
623 			"rdma connection establishment failed (%d)\n", ret);
624 		goto out_destroy_cm_id;
625 	}
626 
627 	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
628 
629 	return 0;
630 
631 out_destroy_cm_id:
632 	rdma_destroy_id(queue->cm_id);
633 	nvme_rdma_destroy_queue_ib(queue);
634 out_destroy_mutex:
635 	mutex_destroy(&queue->queue_lock);
636 	return ret;
637 }
638 
__nvme_rdma_stop_queue(struct nvme_rdma_queue * queue)639 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
640 {
641 	rdma_disconnect(queue->cm_id);
642 	ib_drain_qp(queue->qp);
643 }
644 
nvme_rdma_stop_queue(struct nvme_rdma_queue * queue)645 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
646 {
647 	if (!test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
648 		return;
649 
650 	mutex_lock(&queue->queue_lock);
651 	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
652 		__nvme_rdma_stop_queue(queue);
653 	mutex_unlock(&queue->queue_lock);
654 }
655 
nvme_rdma_free_queue(struct nvme_rdma_queue * queue)656 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
657 {
658 	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
659 		return;
660 
661 	rdma_destroy_id(queue->cm_id);
662 	nvme_rdma_destroy_queue_ib(queue);
663 	mutex_destroy(&queue->queue_lock);
664 }
665 
nvme_rdma_free_io_queues(struct nvme_rdma_ctrl * ctrl)666 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
667 {
668 	int i;
669 
670 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
671 		nvme_rdma_free_queue(&ctrl->queues[i]);
672 }
673 
nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl * ctrl)674 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
675 {
676 	int i;
677 
678 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
679 		nvme_rdma_stop_queue(&ctrl->queues[i]);
680 }
681 
nvme_rdma_start_queue(struct nvme_rdma_ctrl * ctrl,int idx)682 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
683 {
684 	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
685 	int ret;
686 
687 	if (idx)
688 		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
689 	else
690 		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
691 
692 	if (!ret) {
693 		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
694 	} else {
695 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
696 			__nvme_rdma_stop_queue(queue);
697 		dev_info(ctrl->ctrl.device,
698 			"failed to connect queue: %d ret=%d\n", idx, ret);
699 	}
700 	return ret;
701 }
702 
nvme_rdma_setup_queue_async(void * data,async_cookie_t cookie)703 static void nvme_rdma_setup_queue_async(void *data, async_cookie_t cookie)
704 {
705 	struct nvme_rdma_setup_ctx *ctx = data;
706 	struct nvme_rdma_queue *queue;
707 	int ret;
708 
709 	queue = ctx->queue;
710 	ret = nvme_rdma_alloc_queue(queue);
711 	if (ret)
712 		goto out_err;
713 
714 	ret = nvme_rdma_start_queue(queue->ctrl, nvme_rdma_queue_idx(queue));
715 	if (ret)
716 		goto out_err;
717 
718 	return;
719 out_err:
720 	WRITE_ONCE(*ctx->err, ret);
721 }
722 
nvme_rdma_setup_io_queues(struct nvme_rdma_ctrl * ctrl,unsigned int first,unsigned int last,size_t queue_size)723 static int nvme_rdma_setup_io_queues(struct nvme_rdma_ctrl *ctrl,
724 		unsigned int first, unsigned int last, size_t queue_size)
725 {
726 	ASYNC_DOMAIN_EXCLUSIVE(queue_domain);
727 	struct nvme_rdma_setup_ctx *ctxs;
728 	int nr_queues = last - first;
729 	int err = 0, i, ret;
730 
731 	ctxs = kmalloc_objs(*ctxs, nr_queues);
732 	if (!ctxs)
733 		return -ENOMEM;
734 
735 	for (i = 0; i < nr_queues; i++) {
736 		struct nvme_rdma_queue *queue = &ctrl->queues[first + i];
737 
738 		queue->ctrl = ctrl;
739 		queue->queue_size = queue_size;
740 
741 		ctxs[i].queue = queue;
742 		ctxs[i].err = &err;
743 		async_schedule_domain(nvme_rdma_setup_queue_async, &ctxs[i],
744 				&queue_domain);
745 	}
746 
747 	async_synchronize_full_domain(&queue_domain);
748 	kfree(ctxs);
749 
750 	ret = READ_ONCE(err);
751 	if (ret)
752 		goto out_free_queues;
753 
754 	return 0;
755 out_free_queues:
756 	for (i = 0; i < nr_queues; i++) {
757 		struct nvme_rdma_queue *queue =
758 			&ctrl->queues[first + i];
759 
760 		if (test_bit(NVME_RDMA_Q_LIVE, &queue->flags))
761 			nvme_rdma_stop_queue(queue);
762 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
763 			nvme_rdma_free_queue(queue);
764 	}
765 
766 	return ret;
767 }
768 
nvme_rdma_alloc_tag_set(struct nvme_ctrl * ctrl)769 static int nvme_rdma_alloc_tag_set(struct nvme_ctrl *ctrl)
770 {
771 	unsigned int cmd_size = sizeof(struct nvme_rdma_request) +
772 				NVME_RDMA_DATA_SGL_SIZE;
773 
774 	if (ctrl->max_integrity_segments)
775 		cmd_size += sizeof(struct nvme_rdma_sgl) +
776 			    NVME_RDMA_METADATA_SGL_SIZE;
777 
778 	return nvme_alloc_io_tag_set(ctrl, &to_rdma_ctrl(ctrl)->tag_set,
779 			&nvme_rdma_mq_ops,
780 			ctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2,
781 			cmd_size);
782 }
783 
nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl * ctrl)784 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl)
785 {
786 	if (ctrl->async_event_sqe.data) {
787 		cancel_work_sync(&ctrl->ctrl.async_event_work);
788 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
789 				sizeof(struct nvme_command), DMA_TO_DEVICE);
790 		ctrl->async_event_sqe.data = NULL;
791 	}
792 	nvme_rdma_free_queue(&ctrl->queues[0]);
793 }
794 
nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl * ctrl,bool new)795 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
796 		bool new)
797 {
798 	bool pi_capable = false;
799 	int error;
800 
801 	ctrl->queues[0].ctrl = ctrl;
802 	ctrl->queues[0].queue_size = NVME_AQ_DEPTH;
803 	error = nvme_rdma_alloc_queue(&ctrl->queues[0]);
804 	if (error)
805 		return error;
806 
807 	ctrl->device = ctrl->queues[0].device;
808 	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
809 
810 	/* T10-PI support */
811 	if (ctrl->device->dev->attrs.kernel_cap_flags &
812 	    IBK_INTEGRITY_HANDOVER)
813 		pi_capable = true;
814 
815 	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
816 							pi_capable);
817 
818 	/*
819 	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
820 	 * It's safe, since any change in the underlying RDMA device will issue
821 	 * error recovery and queue re-creation.
822 	 */
823 	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
824 			sizeof(struct nvme_command), DMA_TO_DEVICE);
825 	if (error)
826 		goto out_free_queue;
827 
828 	if (new) {
829 		error = nvme_alloc_admin_tag_set(&ctrl->ctrl,
830 				&ctrl->admin_tag_set, &nvme_rdma_admin_mq_ops,
831 				sizeof(struct nvme_rdma_request) +
832 				NVME_RDMA_DATA_SGL_SIZE);
833 		if (error)
834 			goto out_free_async_qe;
835 
836 	}
837 
838 	error = nvme_rdma_start_queue(ctrl, 0);
839 	if (error)
840 		goto out_remove_admin_tag_set;
841 
842 	error = nvme_enable_ctrl(&ctrl->ctrl);
843 	if (error)
844 		goto out_stop_queue;
845 
846 	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
847 	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
848 	if (pi_capable)
849 		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
850 	else
851 		ctrl->ctrl.max_integrity_segments = 0;
852 
853 	nvme_unquiesce_admin_queue(&ctrl->ctrl);
854 
855 	error = nvme_init_ctrl_finish(&ctrl->ctrl, false);
856 	if (error)
857 		goto out_quiesce_queue;
858 
859 	return 0;
860 
861 out_quiesce_queue:
862 	nvme_quiesce_admin_queue(&ctrl->ctrl);
863 	blk_sync_queue(ctrl->ctrl.admin_q);
864 out_stop_queue:
865 	nvme_rdma_stop_queue(&ctrl->queues[0]);
866 	nvme_cancel_admin_tagset(&ctrl->ctrl);
867 out_remove_admin_tag_set:
868 	if (new)
869 		nvme_remove_admin_tag_set(&ctrl->ctrl);
870 out_free_async_qe:
871 	if (ctrl->async_event_sqe.data) {
872 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
873 			sizeof(struct nvme_command), DMA_TO_DEVICE);
874 		ctrl->async_event_sqe.data = NULL;
875 	}
876 out_free_queue:
877 	nvme_rdma_free_queue(&ctrl->queues[0]);
878 	return error;
879 }
880 
nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl * ctrl,bool new)881 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
882 {
883 	unsigned int nr_io_queues;
884 	int ret, nr_queues;
885 
886 	nr_io_queues = nvmf_nr_io_queues(ctrl->ctrl.opts);
887 	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
888 	if (ret)
889 		return ret;
890 
891 	if (nr_io_queues == 0) {
892 		dev_err(ctrl->ctrl.device, "unable to set any I/O queues\n");
893 		return -ENOMEM;
894 	}
895 
896 	ctrl->ctrl.queue_count = nr_io_queues + 1;
897 	dev_info(ctrl->ctrl.device, "creating %d I/O queues.\n", nr_io_queues);
898 	nvmf_set_io_queues(ctrl->ctrl.opts, nr_io_queues, ctrl->io_queues);
899 
900 	if (new) {
901 		ret = nvme_rdma_alloc_tag_set(&ctrl->ctrl);
902 		if (ret)
903 			goto out_free_io_queues;
904 	}
905 
906 	/*
907 	 * Only start IO queues for which we have allocated the tagset
908 	 * and limited it to the available queues. On reconnects, the
909 	 * queue number might have changed.
910 	 */
911 	nr_queues = min(ctrl->tag_set.nr_hw_queues + 1, ctrl->ctrl.queue_count);
912 	ret = nvme_rdma_setup_io_queues(ctrl, 1, nr_queues,
913 			ctrl->ctrl.sqsize + 1);
914 
915 	if (ret)
916 		goto out_cleanup_tagset;
917 
918 	if (!new) {
919 		nvme_start_freeze(&ctrl->ctrl);
920 		nvme_unquiesce_io_queues(&ctrl->ctrl);
921 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl)) {
922 			/*
923 			 * If we timed out waiting for freeze we are likely to
924 			 * be stuck.  Fail the controller initialization just
925 			 * to be safe.
926 			 */
927 			ret = -ENODEV;
928 			nvme_unfreeze(&ctrl->ctrl);
929 			goto out_wait_freeze_timed_out;
930 		}
931 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
932 			ctrl->ctrl.queue_count - 1);
933 		nvme_unfreeze(&ctrl->ctrl);
934 	}
935 
936 	/*
937 	 * If the number of queues has increased (reconnect case)
938 	 * setup all new queues now.
939 	 */
940 	if (ctrl->tag_set.nr_hw_queues + 1 > nr_queues) {
941 		ret = nvme_rdma_setup_io_queues(ctrl, nr_queues,
942 				ctrl->tag_set.nr_hw_queues + 1,
943 				ctrl->ctrl.sqsize + 1);
944 		if (ret)
945 			goto out_wait_freeze_timed_out;
946 	}
947 
948 	return 0;
949 
950 out_wait_freeze_timed_out:
951 	nvme_quiesce_io_queues(&ctrl->ctrl);
952 	nvme_sync_io_queues(&ctrl->ctrl);
953 	nvme_rdma_stop_io_queues(ctrl);
954 out_cleanup_tagset:
955 	nvme_cancel_tagset(&ctrl->ctrl);
956 	if (new)
957 		nvme_remove_io_tag_set(&ctrl->ctrl);
958 out_free_io_queues:
959 	nvme_rdma_free_io_queues(ctrl);
960 	return ret;
961 }
962 
nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl * ctrl,bool remove)963 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
964 		bool remove)
965 {
966 	nvme_quiesce_admin_queue(&ctrl->ctrl);
967 	blk_sync_queue(ctrl->ctrl.admin_q);
968 	nvme_rdma_stop_queue(&ctrl->queues[0]);
969 	nvme_cancel_admin_tagset(&ctrl->ctrl);
970 	if (remove) {
971 		nvme_unquiesce_admin_queue(&ctrl->ctrl);
972 		nvme_remove_admin_tag_set(&ctrl->ctrl);
973 	}
974 	nvme_rdma_destroy_admin_queue(ctrl);
975 }
976 
nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl * ctrl,bool remove)977 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
978 		bool remove)
979 {
980 	if (ctrl->ctrl.queue_count > 1) {
981 		nvme_quiesce_io_queues(&ctrl->ctrl);
982 		nvme_sync_io_queues(&ctrl->ctrl);
983 		nvme_rdma_stop_io_queues(ctrl);
984 		nvme_cancel_tagset(&ctrl->ctrl);
985 		if (remove) {
986 			nvme_unquiesce_io_queues(&ctrl->ctrl);
987 			nvme_remove_io_tag_set(&ctrl->ctrl);
988 		}
989 		nvme_rdma_free_io_queues(ctrl);
990 	}
991 }
992 
nvme_rdma_stop_ctrl(struct nvme_ctrl * nctrl)993 static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
994 {
995 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
996 
997 	flush_work(&ctrl->err_work);
998 	cancel_delayed_work_sync(&ctrl->reconnect_work);
999 }
1000 
nvme_rdma_free_ctrl(struct nvme_ctrl * nctrl)1001 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1002 {
1003 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1004 
1005 	if (list_empty_careful(&ctrl->list))
1006 		goto free_ctrl;
1007 
1008 	mutex_lock(&nvme_rdma_ctrl_mutex);
1009 	list_del(&ctrl->list);
1010 	mutex_unlock(&nvme_rdma_ctrl_mutex);
1011 
1012 	nvmf_free_options(nctrl->opts);
1013 free_ctrl:
1014 	kfree(ctrl->queues);
1015 	kfree(ctrl);
1016 }
1017 
nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl * ctrl,int status)1018 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl,
1019 					  int status)
1020 {
1021 	enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1022 
1023 	/* If we are resetting/deleting then do nothing */
1024 	if (state != NVME_CTRL_CONNECTING) {
1025 		WARN_ON_ONCE(state == NVME_CTRL_NEW || state == NVME_CTRL_LIVE);
1026 		return;
1027 	}
1028 
1029 	if (nvmf_should_reconnect(&ctrl->ctrl, status)) {
1030 		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1031 			ctrl->ctrl.opts->reconnect_delay);
1032 		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
1033 				ctrl->ctrl.opts->reconnect_delay * HZ);
1034 	} else {
1035 		nvme_delete_ctrl(&ctrl->ctrl);
1036 	}
1037 }
1038 
nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl * ctrl,bool new)1039 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1040 {
1041 	int ret;
1042 	bool changed;
1043 	u16 max_queue_size;
1044 
1045 	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1046 	if (ret)
1047 		return ret;
1048 
1049 	if (ctrl->ctrl.icdoff) {
1050 		ret = -EOPNOTSUPP;
1051 		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1052 		goto destroy_admin;
1053 	}
1054 
1055 	if (!(ctrl->ctrl.sgls & NVME_CTRL_SGLS_KSDBDS)) {
1056 		ret = -EOPNOTSUPP;
1057 		dev_err(ctrl->ctrl.device,
1058 			"Mandatory keyed sgls are not supported!\n");
1059 		goto destroy_admin;
1060 	}
1061 
1062 	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1063 		dev_warn(ctrl->ctrl.device,
1064 			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1065 			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1066 	}
1067 
1068 	if (ctrl->ctrl.max_integrity_segments)
1069 		max_queue_size = NVME_RDMA_MAX_METADATA_QUEUE_SIZE;
1070 	else
1071 		max_queue_size = NVME_RDMA_MAX_QUEUE_SIZE;
1072 
1073 	if (ctrl->ctrl.sqsize + 1 > max_queue_size) {
1074 		dev_warn(ctrl->ctrl.device,
1075 			 "ctrl sqsize %u > max queue size %u, clamping down\n",
1076 			 ctrl->ctrl.sqsize + 1, max_queue_size);
1077 		ctrl->ctrl.sqsize = max_queue_size - 1;
1078 	}
1079 
1080 	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1081 		dev_warn(ctrl->ctrl.device,
1082 			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1083 			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1084 		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1085 	}
1086 
1087 	if (ctrl->ctrl.sgls & NVME_CTRL_SGLS_SAOS)
1088 		ctrl->use_inline_data = true;
1089 
1090 	if (ctrl->ctrl.queue_count > 1) {
1091 		ret = nvme_rdma_configure_io_queues(ctrl, new);
1092 		if (ret)
1093 			goto destroy_admin;
1094 	}
1095 
1096 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1097 	if (!changed) {
1098 		/*
1099 		 * state change failure is ok if we started ctrl delete,
1100 		 * unless we're during creation of a new controller to
1101 		 * avoid races with teardown flow.
1102 		 */
1103 		enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1104 
1105 		WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1106 			     state != NVME_CTRL_DELETING_NOIO);
1107 		WARN_ON_ONCE(new);
1108 		ret = -EINVAL;
1109 		goto destroy_io;
1110 	}
1111 
1112 	nvme_start_ctrl(&ctrl->ctrl);
1113 	return 0;
1114 
1115 destroy_io:
1116 	if (ctrl->ctrl.queue_count > 1) {
1117 		nvme_quiesce_io_queues(&ctrl->ctrl);
1118 		nvme_sync_io_queues(&ctrl->ctrl);
1119 		nvme_rdma_stop_io_queues(ctrl);
1120 		nvme_cancel_tagset(&ctrl->ctrl);
1121 		if (new)
1122 			nvme_remove_io_tag_set(&ctrl->ctrl);
1123 		nvme_rdma_free_io_queues(ctrl);
1124 	}
1125 destroy_admin:
1126 	nvme_stop_keep_alive(&ctrl->ctrl);
1127 	nvme_rdma_teardown_admin_queue(ctrl, new);
1128 	return ret;
1129 }
1130 
nvme_rdma_reconnect_ctrl_work(struct work_struct * work)1131 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1132 {
1133 	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1134 			struct nvme_rdma_ctrl, reconnect_work);
1135 	int ret;
1136 
1137 	++ctrl->ctrl.nr_reconnects;
1138 
1139 	ret = nvme_rdma_setup_ctrl(ctrl, false);
1140 	if (ret)
1141 		goto requeue;
1142 
1143 	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1144 			ctrl->ctrl.nr_reconnects);
1145 
1146 	/* accumulate reconnect attempts before resetting it to zero */
1147 	atomic_long_add(ctrl->ctrl.nr_reconnects, &ctrl->ctrl.acc_reconnects);
1148 	ctrl->ctrl.nr_reconnects = 0;
1149 
1150 	return;
1151 
1152 requeue:
1153 	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d/%d\n",
1154 		 ctrl->ctrl.nr_reconnects, ctrl->ctrl.opts->max_reconnects);
1155 	nvme_rdma_reconnect_or_remove(ctrl, ret);
1156 }
1157 
nvme_rdma_error_recovery_work(struct work_struct * work)1158 static void nvme_rdma_error_recovery_work(struct work_struct *work)
1159 {
1160 	struct nvme_rdma_ctrl *ctrl = container_of(work,
1161 			struct nvme_rdma_ctrl, err_work);
1162 
1163 	nvme_stop_keep_alive(&ctrl->ctrl);
1164 	flush_work(&ctrl->ctrl.async_event_work);
1165 	nvme_rdma_teardown_io_queues(ctrl, false);
1166 	nvme_unquiesce_io_queues(&ctrl->ctrl);
1167 	nvme_rdma_teardown_admin_queue(ctrl, false);
1168 	nvme_unquiesce_admin_queue(&ctrl->ctrl);
1169 	nvme_auth_stop(&ctrl->ctrl);
1170 
1171 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1172 		/* state change failure is ok if we started ctrl delete */
1173 		enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
1174 
1175 		WARN_ON_ONCE(state != NVME_CTRL_DELETING &&
1176 			     state != NVME_CTRL_DELETING_NOIO);
1177 		return;
1178 	}
1179 
1180 	nvme_rdma_reconnect_or_remove(ctrl, 0);
1181 }
1182 
nvme_rdma_error_recovery(struct nvme_rdma_ctrl * ctrl)1183 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1184 {
1185 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1186 		return;
1187 
1188 	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1189 	queue_work(nvme_reset_wq, &ctrl->err_work);
1190 }
1191 
nvme_rdma_end_request(struct nvme_rdma_request * req)1192 static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1193 {
1194 	struct request *rq = blk_mq_rq_from_pdu(req);
1195 
1196 	if (!refcount_dec_and_test(&req->ref))
1197 		return;
1198 	if (!nvme_try_complete_req(rq, req->status, req->result))
1199 		nvme_rdma_complete_rq(rq);
1200 }
1201 
nvme_rdma_wr_error(struct ib_cq * cq,struct ib_wc * wc,const char * op)1202 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1203 		const char *op)
1204 {
1205 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1206 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1207 
1208 	if (nvme_ctrl_state(&ctrl->ctrl) == NVME_CTRL_LIVE)
1209 		dev_info(ctrl->ctrl.device,
1210 			     "%s for CQE 0x%p failed with status %s (%d)\n",
1211 			     op, wc->wr_cqe,
1212 			     ib_wc_status_msg(wc->status), wc->status);
1213 	nvme_rdma_error_recovery(ctrl);
1214 }
1215 
nvme_rdma_memreg_done(struct ib_cq * cq,struct ib_wc * wc)1216 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1217 {
1218 	if (unlikely(wc->status != IB_WC_SUCCESS))
1219 		nvme_rdma_wr_error(cq, wc, "MEMREG");
1220 }
1221 
nvme_rdma_inv_rkey_done(struct ib_cq * cq,struct ib_wc * wc)1222 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1223 {
1224 	struct nvme_rdma_request *req =
1225 		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1226 
1227 	if (unlikely(wc->status != IB_WC_SUCCESS))
1228 		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1229 	else
1230 		nvme_rdma_end_request(req);
1231 }
1232 
nvme_rdma_inv_rkey(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req)1233 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1234 		struct nvme_rdma_request *req)
1235 {
1236 	struct ib_send_wr wr = {
1237 		.opcode		    = IB_WR_LOCAL_INV,
1238 		.next		    = NULL,
1239 		.num_sge	    = 0,
1240 		.send_flags	    = IB_SEND_SIGNALED,
1241 		.ex.invalidate_rkey = req->mr->rkey,
1242 	};
1243 
1244 	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1245 	wr.wr_cqe = &req->reg_cqe;
1246 
1247 	return ib_post_send(queue->qp, &wr, NULL);
1248 }
1249 
nvme_rdma_dma_unmap_req(struct ib_device * ibdev,struct request * rq)1250 static void nvme_rdma_dma_unmap_req(struct ib_device *ibdev, struct request *rq)
1251 {
1252 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1253 
1254 	if (blk_integrity_rq(rq)) {
1255 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1256 				req->metadata_sgl->nents, rq_dma_dir(rq));
1257 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1258 				      NVME_INLINE_METADATA_SG_CNT);
1259 	}
1260 
1261 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1262 			rq_dma_dir(rq));
1263 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1264 }
1265 
nvme_rdma_unmap_data(struct nvme_rdma_queue * queue,struct request * rq)1266 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1267 		struct request *rq)
1268 {
1269 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1270 	struct nvme_rdma_device *dev = queue->device;
1271 	struct ib_device *ibdev = dev->dev;
1272 	struct list_head *pool = &queue->qp->rdma_mrs;
1273 
1274 	if (!blk_rq_nr_phys_segments(rq))
1275 		return;
1276 
1277 	if (req->use_sig_mr)
1278 		pool = &queue->qp->sig_mrs;
1279 
1280 	if (req->mr) {
1281 		ib_mr_pool_put(queue->qp, pool, req->mr);
1282 		req->mr = NULL;
1283 	}
1284 
1285 	nvme_rdma_dma_unmap_req(ibdev, rq);
1286 }
1287 
nvme_rdma_set_sg_null(struct nvme_command * c)1288 static int nvme_rdma_set_sg_null(struct nvme_command *c)
1289 {
1290 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1291 
1292 	sg->addr = 0;
1293 	put_unaligned_le24(0, sg->length);
1294 	put_unaligned_le32(0, sg->key);
1295 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1296 	return 0;
1297 }
1298 
nvme_rdma_map_sg_inline(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count)1299 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1300 		struct nvme_rdma_request *req, struct nvme_command *c,
1301 		int count)
1302 {
1303 	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1304 	struct ib_sge *sge = &req->sge[1];
1305 	struct scatterlist *sgl;
1306 	u32 len = 0;
1307 	int i;
1308 
1309 	for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
1310 		sge->addr = sg_dma_address(sgl);
1311 		sge->length = sg_dma_len(sgl);
1312 		sge->lkey = queue->device->pd->local_dma_lkey;
1313 		len += sge->length;
1314 		sge++;
1315 	}
1316 
1317 	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1318 	sg->length = cpu_to_le32(len);
1319 	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1320 
1321 	req->num_sge += count;
1322 	return 0;
1323 }
1324 
nvme_rdma_map_sg_single(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c)1325 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1326 		struct nvme_rdma_request *req, struct nvme_command *c)
1327 {
1328 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1329 
1330 	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1331 	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1332 	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1333 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1334 	return 0;
1335 }
1336 
nvme_rdma_map_sg_fr(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count)1337 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1338 		struct nvme_rdma_request *req, struct nvme_command *c,
1339 		int count)
1340 {
1341 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1342 	int nr;
1343 
1344 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1345 	if (WARN_ON_ONCE(!req->mr))
1346 		return -EAGAIN;
1347 
1348 	/*
1349 	 * Align the MR to a 4K page size to match the ctrl page size and
1350 	 * the block virtual boundary.
1351 	 */
1352 	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1353 			  SZ_4K);
1354 	if (unlikely(nr < count)) {
1355 		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1356 		req->mr = NULL;
1357 		if (nr < 0)
1358 			return nr;
1359 		return -EINVAL;
1360 	}
1361 
1362 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1363 
1364 	req->reg_cqe.done = nvme_rdma_memreg_done;
1365 	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1366 	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1367 	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1368 	req->reg_wr.wr.num_sge = 0;
1369 	req->reg_wr.mr = req->mr;
1370 	req->reg_wr.key = req->mr->rkey;
1371 	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1372 			     IB_ACCESS_REMOTE_READ |
1373 			     IB_ACCESS_REMOTE_WRITE;
1374 
1375 	sg->addr = cpu_to_le64(req->mr->iova);
1376 	put_unaligned_le24(req->mr->length, sg->length);
1377 	put_unaligned_le32(req->mr->rkey, sg->key);
1378 	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1379 			NVME_SGL_FMT_INVALIDATE;
1380 
1381 	return 0;
1382 }
1383 
nvme_rdma_set_sig_domain(struct blk_integrity * bi,struct nvme_command * cmd,struct ib_sig_domain * domain,u16 control,u8 pi_type)1384 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1385 		struct nvme_command *cmd, struct ib_sig_domain *domain,
1386 		u16 control, u8 pi_type)
1387 {
1388 	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1389 	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1390 	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1391 	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1392 	if (control & NVME_RW_PRINFO_PRCHK_REF)
1393 		domain->sig.dif.ref_remap = true;
1394 
1395 	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.lbat);
1396 	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.lbatm);
1397 	domain->sig.dif.app_escape = true;
1398 	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1399 		domain->sig.dif.ref_escape = true;
1400 }
1401 
nvme_rdma_set_sig_attrs(struct blk_integrity * bi,struct nvme_command * cmd,struct ib_sig_attrs * sig_attrs,u8 pi_type)1402 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1403 		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1404 		u8 pi_type)
1405 {
1406 	u16 control = le16_to_cpu(cmd->rw.control);
1407 
1408 	memset(sig_attrs, 0, sizeof(*sig_attrs));
1409 	if (control & NVME_RW_PRINFO_PRACT) {
1410 		/* for WRITE_INSERT/READ_STRIP no memory domain */
1411 		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1412 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1413 					 pi_type);
1414 		/* Clear the PRACT bit since HCA will generate/verify the PI */
1415 		control &= ~NVME_RW_PRINFO_PRACT;
1416 		cmd->rw.control = cpu_to_le16(control);
1417 	} else {
1418 		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1419 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1420 					 pi_type);
1421 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1422 					 pi_type);
1423 	}
1424 }
1425 
nvme_rdma_set_prot_checks(struct nvme_command * cmd,u8 * mask)1426 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1427 {
1428 	*mask = 0;
1429 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1430 		*mask |= IB_SIG_CHECK_REFTAG;
1431 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1432 		*mask |= IB_SIG_CHECK_GUARD;
1433 }
1434 
nvme_rdma_sig_done(struct ib_cq * cq,struct ib_wc * wc)1435 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1436 {
1437 	if (unlikely(wc->status != IB_WC_SUCCESS))
1438 		nvme_rdma_wr_error(cq, wc, "SIG");
1439 }
1440 
nvme_rdma_map_sg_pi(struct nvme_rdma_queue * queue,struct nvme_rdma_request * req,struct nvme_command * c,int count,int pi_count)1441 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1442 		struct nvme_rdma_request *req, struct nvme_command *c,
1443 		int count, int pi_count)
1444 {
1445 	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1446 	struct ib_reg_wr *wr = &req->reg_wr;
1447 	struct request *rq = blk_mq_rq_from_pdu(req);
1448 	struct nvme_ns *ns = rq->q->queuedata;
1449 	struct bio *bio = rq->bio;
1450 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1451 	struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);
1452 	u32 xfer_len;
1453 	int nr;
1454 
1455 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1456 	if (WARN_ON_ONCE(!req->mr))
1457 		return -EAGAIN;
1458 
1459 	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1460 			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1461 			     SZ_4K);
1462 	if (unlikely(nr))
1463 		goto mr_put;
1464 
1465 	nvme_rdma_set_sig_attrs(bi, c, req->mr->sig_attrs, ns->head->pi_type);
1466 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1467 
1468 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1469 
1470 	req->reg_cqe.done = nvme_rdma_sig_done;
1471 	memset(wr, 0, sizeof(*wr));
1472 	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1473 	wr->wr.wr_cqe = &req->reg_cqe;
1474 	wr->wr.num_sge = 0;
1475 	wr->wr.send_flags = 0;
1476 	wr->mr = req->mr;
1477 	wr->key = req->mr->rkey;
1478 	wr->access = IB_ACCESS_LOCAL_WRITE |
1479 		     IB_ACCESS_REMOTE_READ |
1480 		     IB_ACCESS_REMOTE_WRITE;
1481 
1482 	sg->addr = cpu_to_le64(req->mr->iova);
1483 	xfer_len = req->mr->length;
1484 	/* Check if PI is added by the HW */
1485 	if (!pi_count)
1486 		xfer_len += (xfer_len >> bi->interval_exp) * ns->head->pi_size;
1487 	put_unaligned_le24(xfer_len, sg->length);
1488 	put_unaligned_le32(req->mr->rkey, sg->key);
1489 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1490 
1491 	return 0;
1492 
1493 mr_put:
1494 	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1495 	req->mr = NULL;
1496 	if (nr < 0)
1497 		return nr;
1498 	return -EINVAL;
1499 }
1500 
nvme_rdma_dma_map_req(struct ib_device * ibdev,struct request * rq,int * count,int * pi_count)1501 static int nvme_rdma_dma_map_req(struct ib_device *ibdev, struct request *rq,
1502 		int *count, int *pi_count)
1503 {
1504 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1505 	int ret;
1506 
1507 	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1508 	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1509 			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1510 			NVME_INLINE_SG_CNT);
1511 	if (ret)
1512 		return -ENOMEM;
1513 
1514 	req->data_sgl.nents = blk_rq_map_sg(rq, req->data_sgl.sg_table.sgl);
1515 
1516 	*count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1517 			       req->data_sgl.nents, rq_dma_dir(rq));
1518 	if (unlikely(*count <= 0)) {
1519 		ret = -EIO;
1520 		goto out_free_table;
1521 	}
1522 
1523 	if (blk_integrity_rq(rq)) {
1524 		req->metadata_sgl->sg_table.sgl =
1525 			(struct scatterlist *)(req->metadata_sgl + 1);
1526 		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1527 				rq->nr_integrity_segments,
1528 				req->metadata_sgl->sg_table.sgl,
1529 				NVME_INLINE_METADATA_SG_CNT);
1530 		if (unlikely(ret)) {
1531 			ret = -ENOMEM;
1532 			goto out_unmap_sg;
1533 		}
1534 
1535 		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq,
1536 				req->metadata_sgl->sg_table.sgl);
1537 		*pi_count = ib_dma_map_sg(ibdev,
1538 					  req->metadata_sgl->sg_table.sgl,
1539 					  req->metadata_sgl->nents,
1540 					  rq_dma_dir(rq));
1541 		if (unlikely(*pi_count <= 0)) {
1542 			ret = -EIO;
1543 			goto out_free_pi_table;
1544 		}
1545 	}
1546 
1547 	return 0;
1548 
1549 out_free_pi_table:
1550 	sg_free_table_chained(&req->metadata_sgl->sg_table,
1551 			      NVME_INLINE_METADATA_SG_CNT);
1552 out_unmap_sg:
1553 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1554 			rq_dma_dir(rq));
1555 out_free_table:
1556 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1557 	return ret;
1558 }
1559 
nvme_rdma_map_data(struct nvme_rdma_queue * queue,struct request * rq,struct nvme_command * c)1560 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1561 		struct request *rq, struct nvme_command *c)
1562 {
1563 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1564 	struct nvme_rdma_device *dev = queue->device;
1565 	struct ib_device *ibdev = dev->dev;
1566 	int pi_count = 0;
1567 	int count, ret;
1568 
1569 	req->num_sge = 1;
1570 	refcount_set(&req->ref, 2); /* send and recv completions */
1571 
1572 	c->common.flags |= NVME_CMD_SGL_METABUF;
1573 
1574 	if (!blk_rq_nr_phys_segments(rq))
1575 		return nvme_rdma_set_sg_null(c);
1576 
1577 	ret = nvme_rdma_dma_map_req(ibdev, rq, &count, &pi_count);
1578 	if (unlikely(ret))
1579 		return ret;
1580 
1581 	if (req->use_sig_mr) {
1582 		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1583 		goto out;
1584 	}
1585 
1586 	if (count <= dev->num_inline_segments) {
1587 		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1588 		    queue->ctrl->use_inline_data &&
1589 		    blk_rq_payload_bytes(rq) <=
1590 				nvme_rdma_inline_data_size(queue)) {
1591 			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1592 			goto out;
1593 		}
1594 
1595 		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1596 			ret = nvme_rdma_map_sg_single(queue, req, c);
1597 			goto out;
1598 		}
1599 	}
1600 
1601 	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1602 out:
1603 	if (unlikely(ret))
1604 		goto out_dma_unmap_req;
1605 
1606 	return 0;
1607 
1608 out_dma_unmap_req:
1609 	nvme_rdma_dma_unmap_req(ibdev, rq);
1610 	return ret;
1611 }
1612 
nvme_rdma_send_done(struct ib_cq * cq,struct ib_wc * wc)1613 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1614 {
1615 	struct nvme_rdma_qe *qe =
1616 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1617 	struct nvme_rdma_request *req =
1618 		container_of(qe, struct nvme_rdma_request, sqe);
1619 
1620 	if (unlikely(wc->status != IB_WC_SUCCESS))
1621 		nvme_rdma_wr_error(cq, wc, "SEND");
1622 	else
1623 		nvme_rdma_end_request(req);
1624 }
1625 
nvme_rdma_post_send(struct nvme_rdma_queue * queue,struct nvme_rdma_qe * qe,struct ib_sge * sge,u32 num_sge,struct ib_send_wr * first)1626 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1627 		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1628 		struct ib_send_wr *first)
1629 {
1630 	struct ib_send_wr wr;
1631 	int ret;
1632 
1633 	sge->addr   = qe->dma;
1634 	sge->length = sizeof(struct nvme_command);
1635 	sge->lkey   = queue->device->pd->local_dma_lkey;
1636 
1637 	wr.next       = NULL;
1638 	wr.wr_cqe     = &qe->cqe;
1639 	wr.sg_list    = sge;
1640 	wr.num_sge    = num_sge;
1641 	wr.opcode     = IB_WR_SEND;
1642 	wr.send_flags = IB_SEND_SIGNALED;
1643 
1644 	if (first)
1645 		first->next = &wr;
1646 	else
1647 		first = &wr;
1648 
1649 	ret = ib_post_send(queue->qp, first, NULL);
1650 	if (unlikely(ret)) {
1651 		dev_err(queue->ctrl->ctrl.device,
1652 			     "%s failed with error code %d\n", __func__, ret);
1653 	}
1654 	return ret;
1655 }
1656 
nvme_rdma_post_recv(struct nvme_rdma_queue * queue,struct nvme_rdma_qe * qe)1657 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1658 		struct nvme_rdma_qe *qe)
1659 {
1660 	struct ib_recv_wr wr;
1661 	struct ib_sge list;
1662 	int ret;
1663 
1664 	list.addr   = qe->dma;
1665 	list.length = sizeof(struct nvme_completion);
1666 	list.lkey   = queue->device->pd->local_dma_lkey;
1667 
1668 	qe->cqe.done = nvme_rdma_recv_done;
1669 
1670 	wr.next     = NULL;
1671 	wr.wr_cqe   = &qe->cqe;
1672 	wr.sg_list  = &list;
1673 	wr.num_sge  = 1;
1674 
1675 	ret = ib_post_recv(queue->qp, &wr, NULL);
1676 	if (unlikely(ret)) {
1677 		dev_err(queue->ctrl->ctrl.device,
1678 			"%s failed with error code %d\n", __func__, ret);
1679 	}
1680 	return ret;
1681 }
1682 
nvme_rdma_tagset(struct nvme_rdma_queue * queue)1683 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1684 {
1685 	u32 queue_idx = nvme_rdma_queue_idx(queue);
1686 
1687 	if (queue_idx == 0)
1688 		return queue->ctrl->admin_tag_set.tags[queue_idx];
1689 	return queue->ctrl->tag_set.tags[queue_idx - 1];
1690 }
1691 
nvme_rdma_async_done(struct ib_cq * cq,struct ib_wc * wc)1692 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1693 {
1694 	if (unlikely(wc->status != IB_WC_SUCCESS))
1695 		nvme_rdma_wr_error(cq, wc, "ASYNC");
1696 }
1697 
nvme_rdma_submit_async_event(struct nvme_ctrl * arg)1698 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1699 {
1700 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1701 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1702 	struct ib_device *dev = queue->device->dev;
1703 	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1704 	struct nvme_command *cmd = sqe->data;
1705 	struct ib_sge sge;
1706 	int ret;
1707 
1708 	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1709 
1710 	memset(cmd, 0, sizeof(*cmd));
1711 	cmd->common.opcode = nvme_admin_async_event;
1712 	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1713 	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1714 	nvme_rdma_set_sg_null(cmd);
1715 
1716 	sqe->cqe.done = nvme_rdma_async_done;
1717 
1718 	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1719 			DMA_TO_DEVICE);
1720 
1721 	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1722 	WARN_ON_ONCE(ret);
1723 }
1724 
nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue * queue,struct nvme_completion * cqe,struct ib_wc * wc)1725 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1726 		struct nvme_completion *cqe, struct ib_wc *wc)
1727 {
1728 	struct request *rq;
1729 	struct nvme_rdma_request *req;
1730 
1731 	rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
1732 	if (!rq) {
1733 		dev_err(queue->ctrl->ctrl.device,
1734 			"got bad command_id %#x on QP %#x\n",
1735 			cqe->command_id, queue->qp->qp_num);
1736 		nvme_rdma_error_recovery(queue->ctrl);
1737 		return;
1738 	}
1739 	req = blk_mq_rq_to_pdu(rq);
1740 
1741 	req->status = cqe->status;
1742 	req->result = cqe->result;
1743 
1744 	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1745 		if (unlikely(!req->mr ||
1746 			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1747 			dev_err(queue->ctrl->ctrl.device,
1748 				"Bogus remote invalidation for rkey %#x\n",
1749 				req->mr ? req->mr->rkey : 0);
1750 			nvme_rdma_error_recovery(queue->ctrl);
1751 		}
1752 	} else if (req->mr) {
1753 		int ret;
1754 
1755 		ret = nvme_rdma_inv_rkey(queue, req);
1756 		if (unlikely(ret < 0)) {
1757 			dev_err(queue->ctrl->ctrl.device,
1758 				"Queueing INV WR for rkey %#x failed (%d)\n",
1759 				req->mr->rkey, ret);
1760 			nvme_rdma_error_recovery(queue->ctrl);
1761 		}
1762 		/* the local invalidation completion will end the request */
1763 		return;
1764 	}
1765 
1766 	nvme_rdma_end_request(req);
1767 }
1768 
nvme_rdma_recv_done(struct ib_cq * cq,struct ib_wc * wc)1769 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1770 {
1771 	struct nvme_rdma_qe *qe =
1772 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1773 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1774 	struct ib_device *ibdev = queue->device->dev;
1775 	struct nvme_completion *cqe = qe->data;
1776 	const size_t len = sizeof(struct nvme_completion);
1777 
1778 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1779 		nvme_rdma_wr_error(cq, wc, "RECV");
1780 		return;
1781 	}
1782 
1783 	/* sanity checking for received data length */
1784 	if (unlikely(wc->byte_len < len)) {
1785 		dev_err(queue->ctrl->ctrl.device,
1786 			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1787 		nvme_rdma_error_recovery(queue->ctrl);
1788 		return;
1789 	}
1790 
1791 	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1792 	/*
1793 	 * AEN requests are special as they don't time out and can
1794 	 * survive any kind of queue freeze and often don't respond to
1795 	 * aborts.  We don't even bother to allocate a struct request
1796 	 * for them but rather special case them here.
1797 	 */
1798 	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1799 				     cqe->command_id)))
1800 		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1801 				&cqe->result);
1802 	else
1803 		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1804 	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1805 
1806 	nvme_rdma_post_recv(queue, qe);
1807 }
1808 
nvme_rdma_conn_established(struct nvme_rdma_queue * queue)1809 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1810 {
1811 	int ret, i;
1812 
1813 	for (i = 0; i < queue->queue_size; i++) {
1814 		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1815 		if (ret)
1816 			return ret;
1817 	}
1818 
1819 	return 0;
1820 }
1821 
nvme_rdma_conn_rejected(struct nvme_rdma_queue * queue,struct rdma_cm_event * ev)1822 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1823 		struct rdma_cm_event *ev)
1824 {
1825 	struct rdma_cm_id *cm_id = queue->cm_id;
1826 	int status = ev->status;
1827 	const char *rej_msg;
1828 	const struct nvme_rdma_cm_rej *rej_data;
1829 	u8 rej_data_len;
1830 
1831 	rej_msg = rdma_reject_msg(cm_id, status);
1832 	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1833 
1834 	if (rej_data && rej_data_len >= sizeof(u16)) {
1835 		u16 sts = le16_to_cpu(rej_data->sts);
1836 
1837 		dev_err(queue->ctrl->ctrl.device,
1838 		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1839 		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1840 	} else {
1841 		dev_err(queue->ctrl->ctrl.device,
1842 			"Connect rejected: status %d (%s).\n", status, rej_msg);
1843 	}
1844 
1845 	return -ECONNRESET;
1846 }
1847 
nvme_rdma_addr_resolved(struct nvme_rdma_queue * queue)1848 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1849 {
1850 	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1851 	int ret;
1852 
1853 	ret = nvme_rdma_create_queue_ib(queue);
1854 	if (ret)
1855 		return ret;
1856 
1857 	if (ctrl->opts->tos >= 0)
1858 		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1859 	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CM_TIMEOUT_MS);
1860 	if (ret) {
1861 		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1862 			queue->cm_error);
1863 		goto out_destroy_queue;
1864 	}
1865 
1866 	return 0;
1867 
1868 out_destroy_queue:
1869 	nvme_rdma_destroy_queue_ib(queue);
1870 	return ret;
1871 }
1872 
nvme_rdma_route_resolved(struct nvme_rdma_queue * queue)1873 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1874 {
1875 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1876 	struct rdma_conn_param param = { };
1877 	struct nvme_rdma_cm_req priv = { };
1878 	int ret;
1879 
1880 	param.qp_num = queue->qp->qp_num;
1881 	param.flow_control = 1;
1882 
1883 	param.responder_resources = min(queue->device->dev->attrs.max_qp_rd_atom, U8_MAX);
1884 	/* maximum retry count */
1885 	param.retry_count = 7;
1886 	param.rnr_retry_count = 7;
1887 	param.private_data = &priv;
1888 	param.private_data_len = sizeof(priv);
1889 
1890 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1891 	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1892 	/*
1893 	 * set the admin queue depth to the minimum size
1894 	 * specified by the Fabrics standard.
1895 	 */
1896 	if (priv.qid == 0) {
1897 		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1898 		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1899 	} else {
1900 		/*
1901 		 * current interpretation of the fabrics spec
1902 		 * is at minimum you make hrqsize sqsize+1, or a
1903 		 * 1's based representation of sqsize.
1904 		 */
1905 		priv.hrqsize = cpu_to_le16(queue->queue_size);
1906 		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1907 		/* cntlid should only be set when creating an I/O queue */
1908 		priv.cntlid = cpu_to_le16(ctrl->ctrl.cntlid);
1909 	}
1910 
1911 	ret = rdma_connect_locked(queue->cm_id, &param);
1912 	if (ret) {
1913 		dev_err(ctrl->ctrl.device,
1914 			"rdma_connect_locked failed (%d).\n", ret);
1915 		return ret;
1916 	}
1917 
1918 	return 0;
1919 }
1920 
nvme_rdma_cm_handler(struct rdma_cm_id * cm_id,struct rdma_cm_event * ev)1921 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1922 		struct rdma_cm_event *ev)
1923 {
1924 	struct nvme_rdma_queue *queue = cm_id->context;
1925 	int cm_error = 0;
1926 
1927 	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1928 		rdma_event_msg(ev->event), ev->event,
1929 		ev->status, cm_id);
1930 
1931 	switch (ev->event) {
1932 	case RDMA_CM_EVENT_ADDR_RESOLVED:
1933 		cm_error = nvme_rdma_addr_resolved(queue);
1934 		break;
1935 	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1936 		cm_error = nvme_rdma_route_resolved(queue);
1937 		break;
1938 	case RDMA_CM_EVENT_ESTABLISHED:
1939 		queue->cm_error = nvme_rdma_conn_established(queue);
1940 		/* complete cm_done regardless of success/failure */
1941 		complete(&queue->cm_done);
1942 		return 0;
1943 	case RDMA_CM_EVENT_REJECTED:
1944 		cm_error = nvme_rdma_conn_rejected(queue, ev);
1945 		break;
1946 	case RDMA_CM_EVENT_ROUTE_ERROR:
1947 	case RDMA_CM_EVENT_CONNECT_ERROR:
1948 	case RDMA_CM_EVENT_UNREACHABLE:
1949 	case RDMA_CM_EVENT_ADDR_ERROR:
1950 		dev_dbg(queue->ctrl->ctrl.device,
1951 			"CM error event %d\n", ev->event);
1952 		cm_error = -ECONNRESET;
1953 		break;
1954 	case RDMA_CM_EVENT_DISCONNECTED:
1955 	case RDMA_CM_EVENT_ADDR_CHANGE:
1956 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1957 		dev_dbg(queue->ctrl->ctrl.device,
1958 			"disconnect received - connection closed\n");
1959 		nvme_rdma_error_recovery(queue->ctrl);
1960 		break;
1961 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1962 		/* device removal is handled via the ib_client API */
1963 		break;
1964 	default:
1965 		dev_err(queue->ctrl->ctrl.device,
1966 			"Unexpected RDMA CM event (%d)\n", ev->event);
1967 		nvme_rdma_error_recovery(queue->ctrl);
1968 		break;
1969 	}
1970 
1971 	if (cm_error) {
1972 		queue->cm_error = cm_error;
1973 		complete(&queue->cm_done);
1974 	}
1975 
1976 	return 0;
1977 }
1978 
nvme_rdma_complete_timed_out(struct request * rq)1979 static void nvme_rdma_complete_timed_out(struct request *rq)
1980 {
1981 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1982 	struct nvme_rdma_queue *queue = req->queue;
1983 
1984 	nvme_rdma_stop_queue(queue);
1985 	nvmf_complete_timed_out_request(rq);
1986 }
1987 
nvme_rdma_timeout(struct request * rq)1988 static enum blk_eh_timer_return nvme_rdma_timeout(struct request *rq)
1989 {
1990 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1991 	struct nvme_rdma_queue *queue = req->queue;
1992 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1993 	struct nvme_command *cmd = req->req.cmd;
1994 	int qid = nvme_rdma_queue_idx(queue);
1995 
1996 	dev_warn(ctrl->ctrl.device,
1997 		 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout\n",
1998 		 rq->tag, nvme_cid(rq), cmd->common.opcode,
1999 		 nvme_fabrics_opcode_str(qid, cmd), qid);
2000 
2001 	if (nvme_ctrl_state(&ctrl->ctrl) != NVME_CTRL_LIVE) {
2002 		/*
2003 		 * If we are resetting, connecting or deleting we should
2004 		 * complete immediately because we may block controller
2005 		 * teardown or setup sequence
2006 		 * - ctrl disable/shutdown fabrics requests
2007 		 * - connect requests
2008 		 * - initialization admin requests
2009 		 * - I/O requests that entered after unquiescing and
2010 		 *   the controller stopped responding
2011 		 *
2012 		 * All other requests should be cancelled by the error
2013 		 * recovery work, so it's fine that we fail it here.
2014 		 */
2015 		nvme_rdma_complete_timed_out(rq);
2016 		return BLK_EH_DONE;
2017 	}
2018 
2019 	/*
2020 	 * LIVE state should trigger the normal error recovery which will
2021 	 * handle completing this request.
2022 	 */
2023 	nvme_rdma_error_recovery(ctrl);
2024 	return BLK_EH_RESET_TIMER;
2025 }
2026 
nvme_rdma_queue_rq(struct blk_mq_hw_ctx * hctx,const struct blk_mq_queue_data * bd)2027 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
2028 		const struct blk_mq_queue_data *bd)
2029 {
2030 	struct nvme_ns *ns = hctx->queue->queuedata;
2031 	struct nvme_rdma_queue *queue = hctx->driver_data;
2032 	struct request *rq = bd->rq;
2033 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2034 	struct nvme_rdma_qe *sqe = &req->sqe;
2035 	struct nvme_command *c = nvme_req(rq)->cmd;
2036 	struct ib_device *dev;
2037 	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
2038 	blk_status_t ret;
2039 	int err = 0;
2040 
2041 	WARN_ON_ONCE(rq->tag < 0);
2042 
2043 	if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2044 		return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
2045 
2046 	dev = queue->device->dev;
2047 
2048 	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2049 					 sizeof(struct nvme_command),
2050 					 DMA_TO_DEVICE);
2051 	err = ib_dma_mapping_error(dev, req->sqe.dma);
2052 	if (unlikely(err))
2053 		return BLK_STS_RESOURCE;
2054 
2055 	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2056 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2057 
2058 	ret = nvme_setup_cmd(ns, rq);
2059 	if (ret)
2060 		goto unmap_qe;
2061 
2062 	nvme_start_request(rq);
2063 
2064 	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2065 	    queue->pi_support &&
2066 	    (c->common.opcode == nvme_cmd_write ||
2067 	     c->common.opcode == nvme_cmd_read) &&
2068 	    nvme_ns_has_pi(ns->head))
2069 		req->use_sig_mr = true;
2070 	else
2071 		req->use_sig_mr = false;
2072 
2073 	err = nvme_rdma_map_data(queue, rq, c);
2074 	if (unlikely(err < 0)) {
2075 		dev_err(queue->ctrl->ctrl.device,
2076 			     "Failed to map data (%d)\n", err);
2077 		goto err;
2078 	}
2079 
2080 	sqe->cqe.done = nvme_rdma_send_done;
2081 
2082 	ib_dma_sync_single_for_device(dev, sqe->dma,
2083 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2084 
2085 	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2086 			req->mr ? &req->reg_wr.wr : NULL);
2087 	if (unlikely(err))
2088 		goto err_unmap;
2089 
2090 	return BLK_STS_OK;
2091 
2092 err_unmap:
2093 	nvme_rdma_unmap_data(queue, rq);
2094 err:
2095 	if (err != -EIO) {
2096 		nvme_cleanup_cmd(rq);
2097 		if (err == -ENOMEM || err == -EAGAIN)
2098 			ret = BLK_STS_RESOURCE;
2099 		else
2100 			ret = BLK_STS_IOERR;
2101 	}
2102 unmap_qe:
2103 	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2104 			    DMA_TO_DEVICE);
2105 	if (err == -EIO)
2106 		return nvme_host_path_error(rq);
2107 	return ret;
2108 }
2109 
nvme_rdma_poll(struct blk_mq_hw_ctx * hctx,struct io_comp_batch * iob)2110 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob)
2111 {
2112 	struct nvme_rdma_queue *queue = hctx->driver_data;
2113 
2114 	return ib_process_cq_direct(queue->ib_cq, -1);
2115 }
2116 
nvme_rdma_check_pi_status(struct nvme_rdma_request * req)2117 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2118 {
2119 	struct request *rq = blk_mq_rq_from_pdu(req);
2120 	struct ib_mr_status mr_status;
2121 	int ret;
2122 
2123 	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2124 	if (ret) {
2125 		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2126 		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2127 		return;
2128 	}
2129 
2130 	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2131 		switch (mr_status.sig_err.err_type) {
2132 		case IB_SIG_BAD_GUARD:
2133 			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2134 			break;
2135 		case IB_SIG_BAD_REFTAG:
2136 			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2137 			break;
2138 		case IB_SIG_BAD_APPTAG:
2139 			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2140 			break;
2141 		}
2142 		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2143 		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2144 		       mr_status.sig_err.actual);
2145 	}
2146 }
2147 
nvme_rdma_complete_rq(struct request * rq)2148 static void nvme_rdma_complete_rq(struct request *rq)
2149 {
2150 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2151 	struct nvme_rdma_queue *queue = req->queue;
2152 	struct ib_device *ibdev = queue->device->dev;
2153 
2154 	if (req->use_sig_mr)
2155 		nvme_rdma_check_pi_status(req);
2156 
2157 	nvme_rdma_unmap_data(queue, rq);
2158 	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2159 			    DMA_TO_DEVICE);
2160 	nvme_complete_rq(rq);
2161 }
2162 
nvme_rdma_map_queues(struct blk_mq_tag_set * set)2163 static void nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2164 {
2165 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(set->driver_data);
2166 
2167 	nvmf_map_queues(set, &ctrl->ctrl, ctrl->io_queues);
2168 }
2169 
2170 static const struct blk_mq_ops nvme_rdma_mq_ops = {
2171 	.queue_rq	= nvme_rdma_queue_rq,
2172 	.complete	= nvme_rdma_complete_rq,
2173 	.init_request	= nvme_rdma_init_request,
2174 	.exit_request	= nvme_rdma_exit_request,
2175 	.init_hctx	= nvme_rdma_init_hctx,
2176 	.timeout	= nvme_rdma_timeout,
2177 	.map_queues	= nvme_rdma_map_queues,
2178 	.poll		= nvme_rdma_poll,
2179 };
2180 
2181 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2182 	.queue_rq	= nvme_rdma_queue_rq,
2183 	.complete	= nvme_rdma_complete_rq,
2184 	.init_request	= nvme_rdma_init_request,
2185 	.exit_request	= nvme_rdma_exit_request,
2186 	.init_hctx	= nvme_rdma_init_admin_hctx,
2187 	.timeout	= nvme_rdma_timeout,
2188 };
2189 
nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl * ctrl,bool shutdown)2190 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2191 {
2192 	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2193 	nvme_quiesce_admin_queue(&ctrl->ctrl);
2194 	nvme_disable_ctrl(&ctrl->ctrl, shutdown);
2195 	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2196 }
2197 
nvme_rdma_delete_ctrl(struct nvme_ctrl * ctrl)2198 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2199 {
2200 	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2201 }
2202 
nvme_rdma_reset_ctrl_work(struct work_struct * work)2203 static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2204 {
2205 	struct nvme_rdma_ctrl *ctrl =
2206 		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2207 	int ret;
2208 
2209 	nvme_stop_ctrl(&ctrl->ctrl);
2210 	nvme_rdma_shutdown_ctrl(ctrl, false);
2211 
2212 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2213 		/* state change failure should never happen */
2214 		WARN_ON_ONCE(1);
2215 		return;
2216 	}
2217 
2218 	ret = nvme_rdma_setup_ctrl(ctrl, false);
2219 	if (ret)
2220 		goto out_fail;
2221 
2222 	return;
2223 
2224 out_fail:
2225 	++ctrl->ctrl.nr_reconnects;
2226 	nvme_rdma_reconnect_or_remove(ctrl, ret);
2227 }
2228 
nvme_rdma_supports_pci_p2pdma(struct nvme_ctrl * ctrl)2229 static bool nvme_rdma_supports_pci_p2pdma(struct nvme_ctrl *ctrl)
2230 {
2231 	struct nvme_rdma_ctrl *r_ctrl = to_rdma_ctrl(ctrl);
2232 
2233 	return ib_dma_pci_p2p_dma_supported(r_ctrl->device->dev);
2234 }
2235 
2236 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2237 	.name			= "rdma",
2238 	.module			= THIS_MODULE,
2239 	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2240 	.reg_read32		= nvmf_reg_read32,
2241 	.reg_read64		= nvmf_reg_read64,
2242 	.reg_write32		= nvmf_reg_write32,
2243 	.subsystem_reset	= nvmf_subsystem_reset,
2244 	.free_ctrl		= nvme_rdma_free_ctrl,
2245 	.submit_async_event	= nvme_rdma_submit_async_event,
2246 	.delete_ctrl		= nvme_rdma_delete_ctrl,
2247 	.get_address		= nvmf_get_address,
2248 	.stop_ctrl		= nvme_rdma_stop_ctrl,
2249 	.get_virt_boundary	= nvme_get_virt_boundary,
2250 	.supports_pci_p2pdma	= nvme_rdma_supports_pci_p2pdma,
2251 };
2252 
2253 /*
2254  * Fails a connection request if it matches an existing controller
2255  * (association) with the same tuple:
2256  * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2257  *
2258  * if local address is not specified in the request, it will match an
2259  * existing controller with all the other parameters the same and no
2260  * local port address specified as well.
2261  *
2262  * The ports don't need to be compared as they are intrinsically
2263  * already matched by the port pointers supplied.
2264  */
2265 static bool
nvme_rdma_existing_controller(struct nvmf_ctrl_options * opts)2266 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2267 {
2268 	struct nvme_rdma_ctrl *ctrl;
2269 	bool found = false;
2270 
2271 	mutex_lock(&nvme_rdma_ctrl_mutex);
2272 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2273 		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2274 		if (found)
2275 			break;
2276 	}
2277 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2278 
2279 	return found;
2280 }
2281 
nvme_rdma_alloc_ctrl(struct device * dev,struct nvmf_ctrl_options * opts)2282 static struct nvme_rdma_ctrl *nvme_rdma_alloc_ctrl(struct device *dev,
2283 		struct nvmf_ctrl_options *opts)
2284 {
2285 	struct nvme_rdma_ctrl *ctrl;
2286 	int ret;
2287 
2288 	ctrl = kzalloc_obj(*ctrl);
2289 	if (!ctrl)
2290 		return ERR_PTR(-ENOMEM);
2291 	ctrl->ctrl.opts = opts;
2292 	/*
2293 	 * Safe to init list while allocating ctrl object.
2294 	 */
2295 	context_unsafe(INIT_LIST_HEAD(&ctrl->list));
2296 
2297 	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2298 		opts->trsvcid =
2299 			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2300 		if (!opts->trsvcid) {
2301 			ret = -ENOMEM;
2302 			goto out_free_ctrl;
2303 		}
2304 		opts->mask |= NVMF_OPT_TRSVCID;
2305 	}
2306 
2307 	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2308 			opts->traddr, opts->trsvcid, &ctrl->addr);
2309 	if (ret) {
2310 		pr_err("malformed address passed: %s:%s\n",
2311 			opts->traddr, opts->trsvcid);
2312 		goto out_free_ctrl;
2313 	}
2314 
2315 	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2316 		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2317 			opts->host_traddr, NULL, &ctrl->src_addr);
2318 		if (ret) {
2319 			pr_err("malformed src address passed: %s\n",
2320 			       opts->host_traddr);
2321 			goto out_free_ctrl;
2322 		}
2323 	}
2324 
2325 	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2326 		ret = -EALREADY;
2327 		goto out_free_ctrl;
2328 	}
2329 
2330 	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2331 			nvme_rdma_reconnect_ctrl_work);
2332 	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2333 	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2334 
2335 	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2336 				opts->nr_poll_queues + 1;
2337 	ctrl->ctrl.sqsize = opts->queue_size - 1;
2338 	ctrl->ctrl.kato = opts->kato;
2339 
2340 	ret = -ENOMEM;
2341 	ctrl->queues = kzalloc_objs(*ctrl->queues, ctrl->ctrl.queue_count);
2342 	if (!ctrl->queues)
2343 		goto out_free_ctrl;
2344 
2345 	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2346 				0 /* no quirks, we're perfect! */);
2347 	if (ret)
2348 		goto out_kfree_queues;
2349 
2350 	return ctrl;
2351 
2352 out_kfree_queues:
2353 	kfree(ctrl->queues);
2354 out_free_ctrl:
2355 	kfree(ctrl);
2356 	return ERR_PTR(ret);
2357 }
2358 
nvme_rdma_create_ctrl(struct device * dev,struct nvmf_ctrl_options * opts)2359 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2360 		struct nvmf_ctrl_options *opts)
2361 {
2362 	struct nvme_rdma_ctrl *ctrl;
2363 	bool changed;
2364 	int ret;
2365 
2366 	ctrl = nvme_rdma_alloc_ctrl(dev, opts);
2367 	if (IS_ERR(ctrl))
2368 		return ERR_CAST(ctrl);
2369 
2370 	ret = nvme_add_ctrl(&ctrl->ctrl);
2371 	if (ret)
2372 		goto out_put_ctrl;
2373 
2374 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2375 	WARN_ON_ONCE(!changed);
2376 
2377 	ret = nvme_rdma_setup_ctrl(ctrl, true);
2378 	if (ret)
2379 		goto out_uninit_ctrl;
2380 
2381 	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs, hostnqn: %s\n",
2382 		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
2383 
2384 	mutex_lock(&nvme_rdma_ctrl_mutex);
2385 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2386 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2387 
2388 	return &ctrl->ctrl;
2389 
2390 out_uninit_ctrl:
2391 	nvme_uninit_ctrl(&ctrl->ctrl);
2392 out_put_ctrl:
2393 	nvme_put_ctrl(&ctrl->ctrl);
2394 	if (ret > 0)
2395 		ret = -EIO;
2396 	return ERR_PTR(ret);
2397 }
2398 
2399 static struct nvmf_transport_ops nvme_rdma_transport = {
2400 	.name		= "rdma",
2401 	.module		= THIS_MODULE,
2402 	.required_opts	= NVMF_OPT_TRADDR,
2403 	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2404 			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2405 			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2406 			  NVMF_OPT_TOS,
2407 	.create_ctrl	= nvme_rdma_create_ctrl,
2408 };
2409 
nvme_rdma_remove_one(struct ib_device * ib_device,void * client_data)2410 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2411 {
2412 	struct nvme_rdma_ctrl *ctrl;
2413 	struct nvme_rdma_device *ndev;
2414 	bool found = false;
2415 
2416 	mutex_lock(&device_list_mutex);
2417 	list_for_each_entry(ndev, &device_list, entry) {
2418 		if (ndev->dev == ib_device) {
2419 			found = true;
2420 			break;
2421 		}
2422 	}
2423 	mutex_unlock(&device_list_mutex);
2424 
2425 	if (!found)
2426 		return;
2427 
2428 	/* Delete all controllers using this device */
2429 	mutex_lock(&nvme_rdma_ctrl_mutex);
2430 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2431 		if (ctrl->device->dev != ib_device)
2432 			continue;
2433 		nvme_delete_ctrl(&ctrl->ctrl);
2434 	}
2435 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2436 
2437 	flush_workqueue(nvme_delete_wq);
2438 }
2439 
2440 static struct ib_client nvme_rdma_ib_client = {
2441 	.name   = "nvme_rdma",
2442 	.remove = nvme_rdma_remove_one
2443 };
2444 
nvme_rdma_init_module(void)2445 static int __init nvme_rdma_init_module(void)
2446 {
2447 	int ret;
2448 
2449 	ret = ib_register_client(&nvme_rdma_ib_client);
2450 	if (ret)
2451 		return ret;
2452 
2453 	ret = nvmf_register_transport(&nvme_rdma_transport);
2454 	if (ret)
2455 		goto err_unreg_client;
2456 
2457 	return 0;
2458 
2459 err_unreg_client:
2460 	ib_unregister_client(&nvme_rdma_ib_client);
2461 	return ret;
2462 }
2463 
nvme_rdma_cleanup_module(void)2464 static void __exit nvme_rdma_cleanup_module(void)
2465 {
2466 	struct nvme_rdma_ctrl *ctrl;
2467 
2468 	nvmf_unregister_transport(&nvme_rdma_transport);
2469 	ib_unregister_client(&nvme_rdma_ib_client);
2470 
2471 	mutex_lock(&nvme_rdma_ctrl_mutex);
2472 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2473 		nvme_delete_ctrl(&ctrl->ctrl);
2474 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2475 	flush_workqueue(nvme_delete_wq);
2476 }
2477 
2478 module_init(nvme_rdma_init_module);
2479 module_exit(nvme_rdma_cleanup_module);
2480 
2481 MODULE_DESCRIPTION("NVMe host RDMA transport driver");
2482 MODULE_LICENSE("GPL v2");
2483 MODULE_ALIAS("nvme-rdma");
2484