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Searched refs:num_of_levels (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c2388 int num_of_levels = pcie_table->num_of_link_levels; in smu_v13_0_update_pcie_parameters() local
2393 if (!num_of_levels) in smu_v13_0_update_pcie_parameters()
2397 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v13_0_update_pcie_parameters()
2398 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters()
2400 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v13_0_update_pcie_parameters()
2401 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v13_0_update_pcie_parameters()
2404 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
2419 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_update_pcie_parameters()
H A Dsmu_v13_0_0_ppt.c3131 int num_of_levels; in smu_v13_0_0_update_pcie_parameters() local
3157 num_of_levels = pcie_table->num_of_link_levels; in smu_v13_0_0_update_pcie_parameters()
3158 if (!num_of_levels) in smu_v13_0_0_update_pcie_parameters()
3162 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v13_0_0_update_pcie_parameters()
3163 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v13_0_0_update_pcie_parameters()
3165 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v13_0_0_update_pcie_parameters()
3166 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v13_0_0_update_pcie_parameters()
3169 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_0_update_pcie_parameters()
3184 for (i = 0; i < num_of_levels; i++) { in smu_v13_0_0_update_pcie_parameters()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c1468 int num_of_levels; in smu_v14_0_2_update_pcie_parameters() local
1492 num_of_levels = pcie_table->num_of_link_levels; in smu_v14_0_2_update_pcie_parameters()
1493 if (!num_of_levels) in smu_v14_0_2_update_pcie_parameters()
1497 if (pcie_table->pcie_gen[num_of_levels - 1] < pcie_gen_cap) in smu_v14_0_2_update_pcie_parameters()
1498 pcie_gen_cap = pcie_table->pcie_gen[num_of_levels - 1]; in smu_v14_0_2_update_pcie_parameters()
1500 if (pcie_table->pcie_lane[num_of_levels - 1] < pcie_width_cap) in smu_v14_0_2_update_pcie_parameters()
1501 pcie_width_cap = pcie_table->pcie_lane[num_of_levels - 1]; in smu_v14_0_2_update_pcie_parameters()
1504 for (i = 0; i < num_of_levels; i++) { in smu_v14_0_2_update_pcie_parameters()
1519 for (i = 0; i < num_of_levels; i++) { in smu_v14_0_2_update_pcie_parameters()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c579 PPCLK_e clk_id, uint32_t *num_of_levels) in vega12_get_number_of_dpm_level() argument
586 num_of_levels); in vega12_get_number_of_dpm_level()
614 uint32_t i, num_of_levels, clk; in vega12_setup_single_dpm_table() local
616 ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega12_setup_single_dpm_table()
621 dpm_table->count = num_of_levels; in vega12_setup_single_dpm_table()
623 for (i = 0; i < num_of_levels; i++) { in vega12_setup_single_dpm_table()
H A Dvega20_hwmgr.c537 PPCLK_e clk_id, uint32_t *num_of_levels) in vega20_get_number_of_dpm_level() argument
544 num_of_levels); in vega20_get_number_of_dpm_level()
572 uint32_t i, num_of_levels, clk; in vega20_setup_single_dpm_table() local
574 ret = vega20_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels); in vega20_setup_single_dpm_table()
579 dpm_table->count = num_of_levels; in vega20_setup_single_dpm_table()
581 for (i = 0; i < num_of_levels; i++) { in vega20_setup_single_dpm_table()