| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_gt_ccs_mode.c | 17 static void __xe_gt_apply_ccs_mode(struct xe_gt *gt, u32 num_engines) in __xe_gt_apply_ccs_mode() argument
27 xe_assert(xe, num_engines && num_engines <= num_slices); in __xe_gt_apply_ccs_mode()
28 xe_assert(xe, !(num_slices % num_engines)); in __xe_gt_apply_ccs_mode()
48 for (width = num_slices / num_engines; width; width--) { in __xe_gt_apply_ccs_mode()
56 if (hwe->logical_instance >= num_engines) in __xe_gt_apply_ccs_mode()
80 mode, config, num_engines, num_slices); in __xe_gt_apply_ccs_mode()
117 u32 num_engines, num_slices; in ccs_mode_store() local
126 ret = kstrtou32(buff, 0, &num_engines); in ccs_mode_store()
135 if (!num_engines || num_engines > num_slices || num_slices % num_engines) { in ccs_mode_store()
137 num_engines, num_slices); in ccs_mode_store()
[all …]
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| H A D | selftest_guc_multi_lrc.c | 13 static void logical_sort(struct intel_engine_cs **engines, int num_engines) in logical_sort() argument
18 for (i = 0; i < num_engines; ++i) in logical_sort()
27 sizeof(struct intel_engine_cs *) * num_engines); in logical_sort()
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| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_heartbeat.c | 54 const size_t max_aes = accel_dev->hw_device->num_engines; in validate_hb_ctrs_cnt()
82 const size_t max_aes = accel_dev->hw_device->num_engines; in adf_heartbeat_check_ctrs()
165 const size_t max_aes = hw_device->num_engines; in adf_hb_get_status()
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| /linux/drivers/dma/idxd/ |
| H A D | defaults.c | 48 engine->group->num_engines++; in idxd_load_iaa_device_defaults()
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| H A D | sysfs.c | 53 engine->group->num_engines--; in engine_group_id_store()
62 prevg->num_engines--; in engine_group_id_store()
64 engine->group->num_engines++; in engine_group_id_store()
220 if (val < 4 * group->num_engines || in group_read_buffers_allowed_store()
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| H A D | registers.h | 92 u64 num_engines:8; member
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| H A D | idxd.h | 105 int num_engines; member
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| H A D | init.c | 567 idxd->max_engines = idxd->hw.engine_cap.num_engines; in idxd_read_caps()
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| H A D | device.c | 703 group->num_engines = 0; in idxd_groups_clear_state()
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| /linux/drivers/gpu/drm/omapdrm/ |
| H A D | omap_dmm_priv.h | 168 int num_engines; member
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_gt_types.h | 266 u8 num_engines; member
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| /linux/include/uapi/drm/ |
| H A D | xe_drm.h | 273 /** @num_engines: number of engines returned in @engines */
274 __u32 num_engines; member
720 * for (int i = 0; i < engines->num_engines; i++) {
1687 /** @num_engines: number of engines in @eci array */ member
1688 __u64 num_engines;
1715 * poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]);
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| H A D | habanalabs_accel.h | 1653 __u32 num_engines; member
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| H A D | i915_drm.h | 3378 __u32 num_engines; member
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf_types.h | 422 u32 num_engines; member
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| /linux/tools/testing/selftests/vfio/lib/drivers/dsa/ |
| H A D | dsa.c | 177 VFIO_ASSERT_GT((u32)engine_cap.num_engines, 0); in dsa_group_init()
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | sdma.h | 374 void sdma_clean(struct hfi1_devdata *dd, size_t num_engines);
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_device_queue_manager.c | 1650 int i, num_queues, num_engines, eng_offset = 0, start_engine; in allocate_sdma_queue() local
1655 num_engines = kfd_get_num_sdma_engines(dqm->dev); in allocate_sdma_queue()
1659 num_engines = kfd_get_num_xgmi_sdma_engines(dqm->dev); in allocate_sdma_queue()
1667 for (i = start_engine; i < num_queues; i += num_engines) { in allocate_sdma_queue()
1674 q->properties.sdma_queue_id = q->sdma_id / num_engines; in allocate_sdma_queue()
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| /linux/tools/include/uapi/drm/ |
| H A D | i915_drm.h | 3378 __u32 num_engines; member
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