| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_rm.c | 524 int num_dsc = 0; in _dpu_rm_dsc_alloc() local
530 num_dsc < top->num_dsc; dsc_idx++) { in _dpu_rm_dsc_alloc()
546 num_dsc++; in _dpu_rm_dsc_alloc()
550 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc()
552 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc()
564 int num_dsc = 0; in _dpu_rm_dsc_alloc_pair() local
570 num_dsc < top->num_dsc; dsc_idx += 2) { in _dpu_rm_dsc_alloc_pair()
602 num_dsc += 2; in _dpu_rm_dsc_alloc_pair()
606 if (num_dsc < top->num_dsc) { in _dpu_rm_dsc_alloc_pair()
608 num_dsc, top->num_dsc); in _dpu_rm_dsc_alloc_pair()
[all …]
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| H A D | dpu_encoder.c | 625 int i, intf_count = 0, num_dsc = 0; in dpu_encoder_use_dsc_merge() local
633 num_dsc++; in dpu_encoder_use_dsc_merge()
635 return (num_dsc > 0) && (num_dsc > intf_count); in dpu_encoder_use_dsc_merge()
690 topology->num_dsc = 2; in dpu_encoder_update_topology()
692 topology->num_dsc = 1; in dpu_encoder_update_topology()
1163 int num_ctl, num_pp, num_dsc, num_pp_per_intf; in dpu_encoder_virt_atomic_mode_set() local
1222 num_dsc = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, in dpu_encoder_virt_atomic_mode_set()
1225 for (i = 0; i < num_dsc; i++) { in dpu_encoder_virt_atomic_mode_set()
2028 int num_dsc = 0; in dpu_encoder_prep_dsc() local
2038 num_dsc++; in dpu_encoder_prep_dsc()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 272 unsigned int num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_translation_helper.c | 92 out->num_dsc = 4; in dml2_init_ip_params()
130 out->num_dsc = 4; in dml2_init_ip_params()
227 out->num_dsc = 4; in dml2_init_ip_params()
665 out->num_dsc = in_ip_params->num_dsc; in dml2_translate_ip_params()
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| H A D | display_mode_core_structs.h | 416 dml_uint_t num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 138 .num_dsc = 2,
1091 for (i = 0; i < (unsigned int)pool->res_cap->num_dsc; i++) { in dcn303_resource_destruct()
1524 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 141 .num_dsc = 5,
1147 for (i = 0; i < (unsigned int)pool->res_cap->num_dsc; i++) { in dcn302_resource_destruct()
1592 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 880 .num_dsc = 3,
1538 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn316_resource_destruct()
2141 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 898 .num_dsc = 4,
1603 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn314_resource_destruct()
2245 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 719 .num_dsc = 4,
1594 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn36_resource_destruct()
2263 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn36_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 886 .num_dsc = 3,
1543 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn31_resource_destruct()
2325 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 732 .num_dsc = 4,
1607 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn35_resource_destruct()
2293 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn35_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 885 .num_dsc = 3,
1545 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn315_resource_destruct()
2278 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn315_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 706 .num_dsc = 4,
1532 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn321_resource_destruct()
2126 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn321_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 712 .num_dsc = 4,
1587 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn351_resource_destruct()
2265 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn351_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/ |
| H A D | dcn60_resource.c | 585 .num_dsc = 4,
1677 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn60_resource_destruct()
2266 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn60_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 719 .num_dsc = 4,
1562 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn401_resource_destruct()
2349 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn401_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/ |
| H A D | dcn42_resource.c | 706 .num_dsc = 4,
1542 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn42_resource_destruct()
2334 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn42_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/ |
| H A D | dcn42b_resource.c | 761 .num_dsc = 3,
1530 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn42b_resource_destruct()
2310 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn42b_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 724 .num_dsc = 6,
1239 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn30_resource_destruct()
2713 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn30_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 716 .num_dsc = 4,
1557 for (i = 0; i < (unsigned int)pool->base.res_cap->num_dsc; i++) { in dcn32_resource_destruct()
2638 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn32_resource_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/ |
| H A D | dcn60_hwseq.c | 575 for (i = 0; i < (unsigned int)dc->res_pool->res_cap->num_dsc; i++) { in dcn60_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_shared_types.h | 54 unsigned int num_dsc; member
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 4375 return dc->res_pool->res_cap->num_dsc > 0; in dc_resource_is_dsc_encoding_supported()
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| H A D | dc.c | 1996 if (tg_inst < (unsigned int)dc->res_pool->res_cap->num_dsc) { in dc_validate_boot_timing()
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