Searched refs:native_mode (Results 1 – 14 of 14) sorted by relevance
168 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_panel_mode_fixup() local169 unsigned int hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup()170 unsigned int vblank = native_mode->vtotal - native_mode->vdisplay; in amdgpu_panel_mode_fixup()171 unsigned int hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup()172 unsigned int vover = native_mode->vsync_start - native_mode->vdisplay; in amdgpu_panel_mode_fixup()173 unsigned int hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()174 unsigned int vsync_width = native_mode->vsync_end - native_mode->vsync_start; in amdgpu_panel_mode_fixup()176 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()177 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()179 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()[all …]
1988 lvds->native_mode.clock = in amdgpu_atombios_encoder_get_lcd_info()1990 lvds->native_mode.hdisplay = in amdgpu_atombios_encoder_get_lcd_info()1992 lvds->native_mode.vdisplay = in amdgpu_atombios_encoder_get_lcd_info()1994 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()1996 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()1998 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in amdgpu_atombios_encoder_get_lcd_info()2000 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()2002 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()2004 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in amdgpu_atombios_encoder_get_lcd_info()2012 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in amdgpu_atombios_encoder_get_lcd_info()[all …]
326 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_panel_mode_fixup() local327 unsigned int hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup()328 unsigned int vblank = native_mode->vtotal - native_mode->vdisplay; in radeon_panel_mode_fixup()329 unsigned int hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup()330 unsigned int vover = native_mode->vsync_start - native_mode->vdisplay; in radeon_panel_mode_fixup()331 unsigned int hsync_width = native_mode->hsync_end - native_mode->hsync_start; in radeon_panel_mode_fixup()332 unsigned int vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()334 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()335 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()338 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()[all …]
66 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set() local113 if (native_mode->hdisplay == 0 || in radeon_legacy_rmx_mode_set()114 native_mode->vdisplay == 0) { in radeon_legacy_rmx_mode_set()118 if (xres > native_mode->hdisplay) in radeon_legacy_rmx_mode_set()119 xres = native_mode->hdisplay; in radeon_legacy_rmx_mode_set()120 if (yres > native_mode->vdisplay) in radeon_legacy_rmx_mode_set()121 yres = native_mode->vdisplay; in radeon_legacy_rmx_mode_set()123 if (xres == native_mode->hdisplay) in radeon_legacy_rmx_mode_set()125 if (yres == native_mode->vdisplay) in radeon_legacy_rmx_mode_set()137 / native_mode->hdisplay + 1; in radeon_legacy_rmx_mode_set()[all …]
1110 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()1114 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()1118 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()1122 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()1125 if ((lvds->native_mode.hdisplay < 640) || in radeon_legacy_get_lvds_info_from_regs()1126 (lvds->native_mode.vdisplay < 480)) { in radeon_legacy_get_lvds_info_from_regs()1127 lvds->native_mode.hdisplay = 640; in radeon_legacy_get_lvds_info_from_regs()1128 lvds->native_mode.vdisplay = 480; in radeon_legacy_get_lvds_info_from_regs()1148 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, in radeon_legacy_get_lvds_info_from_regs()1149 lvds->native_mode.vdisplay); in radeon_legacy_get_lvds_info_from_regs()[all …]
1640 lvds->native_mode.clock = in radeon_atombios_get_lvds_info()1642 lvds->native_mode.hdisplay = in radeon_atombios_get_lvds_info()1644 lvds->native_mode.vdisplay = in radeon_atombios_get_lvds_info()1646 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()1648 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()1650 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in radeon_atombios_get_lvds_info()1652 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()1654 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()1656 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()1664 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in radeon_atombios_get_lvds_info()[all …]
345 struct drm_display_mode native_mode; member387 struct drm_display_mode native_mode; member431 struct drm_display_mode native_mode; member456 struct drm_display_mode native_mode; member
148 struct device_node *native_mode; in of_get_display_timings() local178 native_mode = entry; in of_get_display_timings()196 disp->native_mode = 0; in of_get_display_timings()221 if (native_mode == entry) in of_get_display_timings()222 disp->native_mode = disp->num_timings; in of_get_display_timings()232 of_node_put(native_mode); in of_get_display_timings()236 disp->native_mode + 1); in of_get_display_timings()241 of_node_put(native_mode); in of_get_display_timings()
43 index = disp->native_mode; in of_get_videomode()
87 unsigned int native_mode; member
141 struct drm_display_mode *native_mode; member
6831 const struct drm_display_mode *native_mode, in decide_crtc_timing_for_drm_display_mode() argument6835 native_mode->clock == drm_mode->clock && in decide_crtc_timing_for_drm_display_mode()6836 native_mode->htotal == drm_mode->htotal && in decide_crtc_timing_for_drm_display_mode()6837 native_mode->vtotal == drm_mode->vtotal)) { in decide_crtc_timing_for_drm_display_mode()6838 if (native_mode->crtc_clock) in decide_crtc_timing_for_drm_display_mode()6839 copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode); in decide_crtc_timing_for_drm_display_mode()8387 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in dm_encoder_helper_atomic_check() local8390 result = drm_crtc_helper_mode_valid_fixed(encoder->crtc, adjusted_mode, native_mode); in dm_encoder_helper_atomic_check()8573 amdgpu_encoder->native_mode.clock = 0; in amdgpu_dm_get_native_mode()8582 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_dm_get_native_mode()[all …]
334 struct drm_display_mode *native_mode) in nv50_outp_atomic_check_view() argument344 if (!native_mode) in nv50_outp_atomic_check_view()355 if (mode->hdisplay == native_mode->hdisplay && in nv50_outp_atomic_check_view()356 mode->vdisplay == native_mode->vdisplay && in nv50_outp_atomic_check_view()359 mode = native_mode; in nv50_outp_atomic_check_view()366 mode = native_mode; in nv50_outp_atomic_check_view()417 nv_connector->native_mode); in nv50_outp_atomic_check()
156 if (timings->native_mode == i) in panel_connector_get_modes()