Searched refs:mul_mask (Results 1 – 8 of 8) sorted by relevance
| /linux/drivers/clk/at91/ |
| H A D | clk-pll.c | 21 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask)
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
360 .mul_mask = 0x7FF,
366 .mul_mask = 0xFF,
372 .mul_mask = 0x3F,
378 .mul_mask = 0x7F,
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| H A D | sam9x7.c | 143 .mul_mask = GENMASK(31, 24),
152 .mul_mask = GENMASK(31, 24),
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| H A D | clk-sam9x60-pll.c | 99 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set()
268 cmul = (val & core->layout->mul_mask) >> core->layout->mul_shift; in sam9x60_frac_pll_set_rate_chg()
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| H A D | pmc.h | 59 u32 mul_mask; member
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| H A D | sam9x60.c | 54 .mul_mask = GENMASK(31, 24),
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| H A D | sama7g5.c | 69 .mul_mask = GENMASK(31, 24),
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| /linux/drivers/clk/actions/ |
| H A D | owl-pll.c | 28 return mul & mul_mask(pll_hw); in owl_pll_calculate_mul()
93 val &= mul_mask(pll_hw); in owl_pll_recalc_rate()
105 val &= mul_mask(pll_hw); in owl_pll_recalc_rate()
177 reg &= ~mul_mask(pll_hw); in owl_pll_set_rate()
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| H A D | owl-pll.h | 99 #define mul_mask(m) ((1 << ((m)->width)) - 1) macro
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