xref: /linux/drivers/pinctrl/qcom/pinctrl-ipq5424.c (revision 2d32fba02e0e5b67fb3a4ea51dde80c0db83f1c1)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2016-2018,2020 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 
7 #include <linux/module.h>
8 #include <linux/of.h>
9 #include <linux/platform_device.h>
10 
11 #include "pinctrl-msm.h"
12 
13 #define REG_SIZE 0x1000
14 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)	\
15 	{					        \
16 		.grp = PINCTRL_PINGROUP("gpio" #id,     \
17 			gpio##id##_pins,                \
18 			ARRAY_SIZE(gpio##id##_pins)),   \
19 		.funcs = (int[]){			\
20 			msm_mux_gpio, /* gpio mode */	\
21 			msm_mux_##f1,			\
22 			msm_mux_##f2,			\
23 			msm_mux_##f3,			\
24 			msm_mux_##f4,			\
25 			msm_mux_##f5,			\
26 			msm_mux_##f6,			\
27 			msm_mux_##f7,			\
28 			msm_mux_##f8,			\
29 			msm_mux_##f9			\
30 		},				        \
31 		.nfuncs = 10,				\
32 		.ctl_reg = REG_SIZE * id,	        \
33 		.io_reg = 0x4 + REG_SIZE * id,		\
34 		.intr_cfg_reg = 0x8 + REG_SIZE * id,	\
35 		.intr_status_reg = 0xc + REG_SIZE * id,	\
36 		.intr_target_reg = 0x8 + REG_SIZE * id,	\
37 		.mux_bit = 2,			\
38 		.pull_bit = 0,			\
39 		.drv_bit = 6,			\
40 		.oe_bit = 9,			\
41 		.in_bit = 0,			\
42 		.out_bit = 1,			\
43 		.intr_enable_bit = 0,		\
44 		.intr_status_bit = 0,		\
45 		.intr_target_bit = 5,		\
46 		.intr_target_kpss_val = 3,      \
47 		.intr_raw_status_bit = 4,	\
48 		.intr_polarity_bit = 1,		\
49 		.intr_detection_bit = 2,	\
50 		.intr_detection_width = 2,	\
51 	}
52 
53 static const struct pinctrl_pin_desc ipq5424_pins[] = {
54 	PINCTRL_PIN(0, "GPIO_0"),
55 	PINCTRL_PIN(1, "GPIO_1"),
56 	PINCTRL_PIN(2, "GPIO_2"),
57 	PINCTRL_PIN(3, "GPIO_3"),
58 	PINCTRL_PIN(4, "GPIO_4"),
59 	PINCTRL_PIN(5, "GPIO_5"),
60 	PINCTRL_PIN(6, "GPIO_6"),
61 	PINCTRL_PIN(7, "GPIO_7"),
62 	PINCTRL_PIN(8, "GPIO_8"),
63 	PINCTRL_PIN(9, "GPIO_9"),
64 	PINCTRL_PIN(10, "GPIO_10"),
65 	PINCTRL_PIN(11, "GPIO_11"),
66 	PINCTRL_PIN(12, "GPIO_12"),
67 	PINCTRL_PIN(13, "GPIO_13"),
68 	PINCTRL_PIN(14, "GPIO_14"),
69 	PINCTRL_PIN(15, "GPIO_15"),
70 	PINCTRL_PIN(16, "GPIO_16"),
71 	PINCTRL_PIN(17, "GPIO_17"),
72 	PINCTRL_PIN(18, "GPIO_18"),
73 	PINCTRL_PIN(19, "GPIO_19"),
74 	PINCTRL_PIN(20, "GPIO_20"),
75 	PINCTRL_PIN(21, "GPIO_21"),
76 	PINCTRL_PIN(22, "GPIO_22"),
77 	PINCTRL_PIN(23, "GPIO_23"),
78 	PINCTRL_PIN(24, "GPIO_24"),
79 	PINCTRL_PIN(25, "GPIO_25"),
80 	PINCTRL_PIN(26, "GPIO_26"),
81 	PINCTRL_PIN(27, "GPIO_27"),
82 	PINCTRL_PIN(28, "GPIO_28"),
83 	PINCTRL_PIN(29, "GPIO_29"),
84 	PINCTRL_PIN(30, "GPIO_30"),
85 	PINCTRL_PIN(31, "GPIO_31"),
86 	PINCTRL_PIN(32, "GPIO_32"),
87 	PINCTRL_PIN(33, "GPIO_33"),
88 	PINCTRL_PIN(34, "GPIO_34"),
89 	PINCTRL_PIN(35, "GPIO_35"),
90 	PINCTRL_PIN(36, "GPIO_36"),
91 	PINCTRL_PIN(37, "GPIO_37"),
92 	PINCTRL_PIN(38, "GPIO_38"),
93 	PINCTRL_PIN(39, "GPIO_39"),
94 	PINCTRL_PIN(40, "GPIO_40"),
95 	PINCTRL_PIN(41, "GPIO_41"),
96 	PINCTRL_PIN(42, "GPIO_42"),
97 	PINCTRL_PIN(43, "GPIO_43"),
98 	PINCTRL_PIN(44, "GPIO_44"),
99 	PINCTRL_PIN(45, "GPIO_45"),
100 	PINCTRL_PIN(46, "GPIO_46"),
101 	PINCTRL_PIN(47, "GPIO_47"),
102 	PINCTRL_PIN(48, "GPIO_48"),
103 	PINCTRL_PIN(49, "GPIO_49"),
104 };
105 
106 #define DECLARE_MSM_GPIO_PINS(pin) \
107 	static const unsigned int gpio##pin##_pins[] = { pin }
108 DECLARE_MSM_GPIO_PINS(0);
109 DECLARE_MSM_GPIO_PINS(1);
110 DECLARE_MSM_GPIO_PINS(2);
111 DECLARE_MSM_GPIO_PINS(3);
112 DECLARE_MSM_GPIO_PINS(4);
113 DECLARE_MSM_GPIO_PINS(5);
114 DECLARE_MSM_GPIO_PINS(6);
115 DECLARE_MSM_GPIO_PINS(7);
116 DECLARE_MSM_GPIO_PINS(8);
117 DECLARE_MSM_GPIO_PINS(9);
118 DECLARE_MSM_GPIO_PINS(10);
119 DECLARE_MSM_GPIO_PINS(11);
120 DECLARE_MSM_GPIO_PINS(12);
121 DECLARE_MSM_GPIO_PINS(13);
122 DECLARE_MSM_GPIO_PINS(14);
123 DECLARE_MSM_GPIO_PINS(15);
124 DECLARE_MSM_GPIO_PINS(16);
125 DECLARE_MSM_GPIO_PINS(17);
126 DECLARE_MSM_GPIO_PINS(18);
127 DECLARE_MSM_GPIO_PINS(19);
128 DECLARE_MSM_GPIO_PINS(20);
129 DECLARE_MSM_GPIO_PINS(21);
130 DECLARE_MSM_GPIO_PINS(22);
131 DECLARE_MSM_GPIO_PINS(23);
132 DECLARE_MSM_GPIO_PINS(24);
133 DECLARE_MSM_GPIO_PINS(25);
134 DECLARE_MSM_GPIO_PINS(26);
135 DECLARE_MSM_GPIO_PINS(27);
136 DECLARE_MSM_GPIO_PINS(28);
137 DECLARE_MSM_GPIO_PINS(29);
138 DECLARE_MSM_GPIO_PINS(30);
139 DECLARE_MSM_GPIO_PINS(31);
140 DECLARE_MSM_GPIO_PINS(32);
141 DECLARE_MSM_GPIO_PINS(33);
142 DECLARE_MSM_GPIO_PINS(34);
143 DECLARE_MSM_GPIO_PINS(35);
144 DECLARE_MSM_GPIO_PINS(36);
145 DECLARE_MSM_GPIO_PINS(37);
146 DECLARE_MSM_GPIO_PINS(38);
147 DECLARE_MSM_GPIO_PINS(39);
148 DECLARE_MSM_GPIO_PINS(40);
149 DECLARE_MSM_GPIO_PINS(41);
150 DECLARE_MSM_GPIO_PINS(42);
151 DECLARE_MSM_GPIO_PINS(43);
152 DECLARE_MSM_GPIO_PINS(44);
153 DECLARE_MSM_GPIO_PINS(45);
154 DECLARE_MSM_GPIO_PINS(46);
155 DECLARE_MSM_GPIO_PINS(47);
156 DECLARE_MSM_GPIO_PINS(48);
157 DECLARE_MSM_GPIO_PINS(49);
158 
159 enum ipq5424_functions {
160 	msm_mux_atest_char,
161 	msm_mux_atest_char0,
162 	msm_mux_atest_char1,
163 	msm_mux_atest_char2,
164 	msm_mux_atest_char3,
165 	msm_mux_atest_tic,
166 	msm_mux_audio_pri,
167 	msm_mux_audio_pri0,
168 	msm_mux_audio_pri1,
169 	msm_mux_audio_sec,
170 	msm_mux_audio_sec0,
171 	msm_mux_audio_sec1,
172 	msm_mux_core_voltage,
173 	msm_mux_cri_trng0,
174 	msm_mux_cri_trng1,
175 	msm_mux_cri_trng2,
176 	msm_mux_cri_trng3,
177 	msm_mux_cxc_clk,
178 	msm_mux_cxc_data,
179 	msm_mux_dbg_out,
180 	msm_mux_gcc_plltest,
181 	msm_mux_gcc_tlmm,
182 	msm_mux_gpio,
183 	msm_mux_i2c0_scl,
184 	msm_mux_i2c0_sda,
185 	msm_mux_i2c1_scl,
186 	msm_mux_i2c1_sda,
187 	msm_mux_i2c11,
188 	msm_mux_mac0,
189 	msm_mux_mac1,
190 	msm_mux_mdc_mst,
191 	msm_mux_mdc_slv,
192 	msm_mux_mdio_mst,
193 	msm_mux_mdio_slv,
194 	msm_mux_pcie0_clk,
195 	msm_mux_pcie0_wake,
196 	msm_mux_pcie1_clk,
197 	msm_mux_pcie1_wake,
198 	msm_mux_pcie2_clk,
199 	msm_mux_pcie2_wake,
200 	msm_mux_pcie3_clk,
201 	msm_mux_pcie3_wake,
202 	msm_mux_pll_test,
203 	msm_mux_prng_rosc0,
204 	msm_mux_prng_rosc1,
205 	msm_mux_prng_rosc2,
206 	msm_mux_prng_rosc3,
207 	msm_mux_PTA0_0,
208 	msm_mux_PTA0_1,
209 	msm_mux_PTA0_2,
210 	msm_mux_PTA10,
211 	msm_mux_PTA11,
212 	msm_mux_pwm0,
213 	msm_mux_pwm1,
214 	msm_mux_pwm2,
215 	msm_mux_qdss_cti_trig_in_a0,
216 	msm_mux_qdss_cti_trig_out_a0,
217 	msm_mux_qdss_cti_trig_in_a1,
218 	msm_mux_qdss_cti_trig_out_a1,
219 	msm_mux_qdss_cti_trig_in_b0,
220 	msm_mux_qdss_cti_trig_out_b0,
221 	msm_mux_qdss_cti_trig_in_b1,
222 	msm_mux_qdss_cti_trig_out_b1,
223 	msm_mux_qdss_traceclk_a,
224 	msm_mux_qdss_tracectl_a,
225 	msm_mux_qdss_tracedata_a,
226 	msm_mux_qspi_clk,
227 	msm_mux_qspi_cs,
228 	msm_mux_qspi_data,
229 	msm_mux_resout,
230 	msm_mux_rx0,
231 	msm_mux_rx1,
232 	msm_mux_rx2,
233 	msm_mux_sdc_clk,
234 	msm_mux_sdc_cmd,
235 	msm_mux_sdc_data,
236 	msm_mux_spi0,
237 	msm_mux_spi1,
238 	msm_mux_spi10,
239 	msm_mux_spi11,
240 	msm_mux_tsens_max,
241 	msm_mux_uart0,
242 	msm_mux_uart1,
243 	msm_mux_wci_txd,
244 	msm_mux_wci_rxd,
245 	msm_mux_wsi_clk,
246 	msm_mux_wsi_data,
247 	msm_mux__,
248 };
249 
250 static const char * const gpio_groups[] = {
251 	"gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
252 	"gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
253 	"gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
254 	"gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
255 	"gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
256 	"gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
257 	"gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
258 };
259 
260 static const char * const sdc_data_groups[] = {
261 	"gpio0", "gpio1", "gpio2", "gpio3",
262 };
263 
264 static const char * const qspi_data_groups[] = {
265 	"gpio0", "gpio1", "gpio2", "gpio3",
266 };
267 
268 static const char * const pwm2_groups[] = {
269 	"gpio0", "gpio1", "gpio2", "gpio3",
270 };
271 
272 static const char * const wci_txd_groups[] = {
273 	"gpio0", "gpio1", "gpio8", "gpio10", "gpio11", "gpio40", "gpio41",
274 };
275 
276 static const char * const wci_rxd_groups[] = {
277 	"gpio0", "gpio1", "gpio8", "gpio10", "gpio11", "gpio40", "gpio41",
278 };
279 
280 static const char * const sdc_cmd_groups[] = {
281 	"gpio4",
282 };
283 
284 static const char * const qspi_cs_groups[] = {
285 	"gpio4",
286 };
287 
288 static const char * const qdss_cti_trig_out_a1_groups[] = {
289 	"gpio27",
290 };
291 
292 static const char * const sdc_clk_groups[] = {
293 	"gpio5",
294 };
295 
296 static const char * const qspi_clk_groups[] = {
297 	"gpio5",
298 };
299 
300 static const char * const spi0_groups[] = {
301 	"gpio6", "gpio7", "gpio8", "gpio9",
302 };
303 
304 static const char * const pwm1_groups[] = {
305 	"gpio6", "gpio7", "gpio8", "gpio9",
306 };
307 
308 static const char * const cri_trng0_groups[] = {
309 	"gpio6",
310 };
311 
312 static const char * const qdss_tracedata_a_groups[] = {
313 	"gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio12",
314 	"gpio13", "gpio14", "gpio15", "gpio20", "gpio21", "gpio36", "gpio37",
315 	"gpio38", "gpio39",
316 };
317 
318 static const char * const cri_trng1_groups[] = {
319 	"gpio7",
320 };
321 
322 static const char * const cri_trng2_groups[] = {
323 	"gpio8",
324 };
325 
326 static const char * const cri_trng3_groups[] = {
327 	"gpio9",
328 };
329 
330 static const char * const uart0_groups[] = {
331 	"gpio10", "gpio11", "gpio12", "gpio13",
332 };
333 
334 static const char * const pwm0_groups[] = {
335 	"gpio10", "gpio11", "gpio12", "gpio13",
336 };
337 
338 static const char * const prng_rosc0_groups[] = {
339 	"gpio12",
340 };
341 
342 static const char * const prng_rosc1_groups[] = {
343 	"gpio13",
344 };
345 
346 static const char * const i2c0_scl_groups[] = {
347 	"gpio14",
348 };
349 
350 static const char * const tsens_max_groups[] = {
351 	"gpio14",
352 };
353 
354 static const char * const prng_rosc2_groups[] = {
355 	"gpio14",
356 };
357 
358 static const char * const i2c0_sda_groups[] = {
359 	"gpio15",
360 };
361 
362 static const char * const prng_rosc3_groups[] = {
363 	"gpio15",
364 };
365 
366 static const char * const core_voltage_groups[] = {
367 	"gpio16", "gpio17",
368 };
369 
370 static const char * const i2c1_scl_groups[] = {
371 	"gpio16",
372 };
373 
374 static const char * const i2c1_sda_groups[] = {
375 	"gpio17",
376 };
377 
378 static const char * const mdc_slv_groups[] = {
379 	"gpio20",
380 };
381 
382 static const char * const atest_char0_groups[] = {
383 	"gpio20",
384 };
385 
386 static const char * const mdio_slv_groups[] = {
387 	"gpio21",
388 };
389 
390 static const char * const atest_char1_groups[] = {
391 	"gpio21",
392 };
393 
394 static const char * const mdc_mst_groups[] = {
395 	"gpio22",
396 };
397 
398 static const char * const atest_char2_groups[] = {
399 	"gpio22",
400 };
401 
402 static const char * const mdio_mst_groups[] = {
403 	"gpio23",
404 };
405 
406 static const char * const atest_char3_groups[] = {
407 	"gpio23",
408 };
409 
410 static const char * const pcie0_clk_groups[] = {
411 	"gpio24",
412 };
413 
414 static const char * const PTA10_groups[] = {
415 	"gpio24", "gpio26", "gpio27",
416 };
417 
418 static const char * const mac0_groups[] = {
419 	"gpio24", "gpio26",
420 };
421 
422 static const char * const atest_char_groups[] = {
423 	"gpio24",
424 };
425 
426 static const char * const pcie0_wake_groups[] = {
427 	"gpio26",
428 };
429 
430 static const char * const pcie1_clk_groups[] = {
431 	"gpio27",
432 };
433 
434 static const char * const i2c11_groups[] = {
435 	"gpio27", "gpio29",
436 };
437 
438 static const char * const pcie1_wake_groups[] = {
439 	"gpio29",
440 };
441 
442 static const char * const pcie2_clk_groups[] = {
443 	"gpio30",
444 };
445 
446 static const char * const mac1_groups[] = {
447 	"gpio30", "gpio32",
448 };
449 
450 static const char * const pcie2_wake_groups[] = {
451 	"gpio32",
452 };
453 
454 static const char * const PTA11_groups[] = {
455 	"gpio30", "gpio32", "gpio33",
456 };
457 
458 static const char * const audio_pri0_groups[] = {
459 	"gpio32", "gpio32",
460 };
461 
462 static const char * const pcie3_clk_groups[] = {
463 	"gpio33",
464 };
465 
466 static const char * const audio_pri1_groups[] = {
467 	"gpio33", "gpio33",
468 };
469 
470 static const char * const pcie3_wake_groups[] = {
471 	"gpio35",
472 };
473 
474 static const char * const audio_sec1_groups[] = {
475 	"gpio35", "gpio35",
476 };
477 
478 static const char * const audio_pri_groups[] = {
479 	"gpio36", "gpio37", "gpio38", "gpio39",
480 };
481 
482 static const char * const spi1_groups[] = {
483 	"gpio11", "gpio36", "gpio37", "gpio38", "gpio46",
484 };
485 
486 static const char * const audio_sec0_groups[] = {
487 	"gpio36", "gpio36",
488 };
489 
490 static const char * const rx1_groups[] = {
491 	"gpio38", "gpio46",
492 };
493 
494 static const char * const pll_test_groups[] = {
495 	"gpio38",
496 };
497 
498 static const char * const dbg_out_groups[] = {
499 	"gpio46",
500 };
501 
502 static const char * const PTA0_0_groups[] = {
503 	"gpio40",
504 };
505 
506 static const char * const atest_tic_groups[] = {
507 	"gpio40",
508 };
509 
510 static const char * const PTA0_1_groups[] = {
511 	"gpio41",
512 };
513 
514 static const char * const cxc_data_groups[] = {
515 	"gpio41",
516 };
517 
518 static const char * const PTA0_2_groups[] = {
519 	"gpio42",
520 };
521 
522 static const char * const cxc_clk_groups[] = {
523 	"gpio42",
524 };
525 
526 static const char * const uart1_groups[] = {
527 	"gpio43", "gpio44",
528 };
529 
530 static const char * const audio_sec_groups[] = {
531 	"gpio45", "gpio46", "gpio47", "gpio48",
532 };
533 
534 static const char * const gcc_plltest_groups[] = {
535 	"gpio43", "gpio45",
536 };
537 
538 static const char * const gcc_tlmm_groups[] = {
539 	"gpio44",
540 };
541 
542 static const char * const qdss_cti_trig_out_b1_groups[] = {
543 	"gpio33",
544 };
545 
546 static const char * const rx0_groups[] = {
547 	"gpio39", "gpio47",
548 };
549 
550 static const char * const qdss_traceclk_a_groups[] = {
551 	"gpio45",
552 };
553 
554 static const char * const qdss_tracectl_a_groups[] = {
555 	"gpio46",
556 };
557 
558 static const char * const qdss_cti_trig_out_a0_groups[] = {
559 	"gpio24",
560 };
561 
562 static const char * const qdss_cti_trig_in_a0_groups[] = {
563 	"gpio26",
564 };
565 
566 static const char * const resout_groups[] = {
567 	"gpio49",
568 };
569 
570 static const char * const qdss_cti_trig_in_a1_groups[] = {
571 	"gpio29",
572 };
573 
574 static const char * const qdss_cti_trig_out_b0_groups[] = {
575 	"gpio30",
576 };
577 
578 static const char * const qdss_cti_trig_in_b0_groups[] = {
579 	"gpio32",
580 };
581 
582 static const char * const qdss_cti_trig_in_b1_groups[] = {
583 	"gpio35",
584 };
585 
586 static const char * const spi10_groups[] = {
587 	"gpio45", "gpio47", "gpio48",
588 };
589 
590 static const char * const spi11_groups[] = {
591 	"gpio10", "gpio12", "gpio13",
592 };
593 
594 static const char * const wsi_clk_groups[] = {
595 	"gpio24", "gpio27",
596 };
597 
598 static const char * const wsi_data_groups[] = {
599 	"gpio26", "gpio29",
600 };
601 
602 static const char * const rx2_groups[] = {
603 	"gpio37", "gpio45",
604 };
605 
606 static const struct pinfunction ipq5424_functions[] = {
607 	MSM_PIN_FUNCTION(atest_char),
608 	MSM_PIN_FUNCTION(atest_char0),
609 	MSM_PIN_FUNCTION(atest_char1),
610 	MSM_PIN_FUNCTION(atest_char2),
611 	MSM_PIN_FUNCTION(atest_char3),
612 	MSM_PIN_FUNCTION(atest_tic),
613 	MSM_PIN_FUNCTION(audio_pri),
614 	MSM_PIN_FUNCTION(audio_pri0),
615 	MSM_PIN_FUNCTION(audio_pri1),
616 	MSM_PIN_FUNCTION(audio_sec),
617 	MSM_PIN_FUNCTION(audio_sec0),
618 	MSM_PIN_FUNCTION(audio_sec1),
619 	MSM_PIN_FUNCTION(core_voltage),
620 	MSM_PIN_FUNCTION(cri_trng0),
621 	MSM_PIN_FUNCTION(cri_trng1),
622 	MSM_PIN_FUNCTION(cri_trng2),
623 	MSM_PIN_FUNCTION(cri_trng3),
624 	MSM_PIN_FUNCTION(cxc_clk),
625 	MSM_PIN_FUNCTION(cxc_data),
626 	MSM_PIN_FUNCTION(dbg_out),
627 	MSM_PIN_FUNCTION(gcc_plltest),
628 	MSM_PIN_FUNCTION(gcc_tlmm),
629 	MSM_PIN_FUNCTION(gpio),
630 	MSM_PIN_FUNCTION(i2c0_scl),
631 	MSM_PIN_FUNCTION(i2c0_sda),
632 	MSM_PIN_FUNCTION(i2c1_scl),
633 	MSM_PIN_FUNCTION(i2c1_sda),
634 	MSM_PIN_FUNCTION(i2c11),
635 	MSM_PIN_FUNCTION(mac0),
636 	MSM_PIN_FUNCTION(mac1),
637 	MSM_PIN_FUNCTION(mdc_mst),
638 	MSM_PIN_FUNCTION(mdc_slv),
639 	MSM_PIN_FUNCTION(mdio_mst),
640 	MSM_PIN_FUNCTION(mdio_slv),
641 	MSM_PIN_FUNCTION(pcie0_clk),
642 	MSM_PIN_FUNCTION(pcie0_wake),
643 	MSM_PIN_FUNCTION(pcie1_clk),
644 	MSM_PIN_FUNCTION(pcie1_wake),
645 	MSM_PIN_FUNCTION(pcie2_clk),
646 	MSM_PIN_FUNCTION(pcie2_wake),
647 	MSM_PIN_FUNCTION(pcie3_clk),
648 	MSM_PIN_FUNCTION(pcie3_wake),
649 	MSM_PIN_FUNCTION(pll_test),
650 	MSM_PIN_FUNCTION(prng_rosc0),
651 	MSM_PIN_FUNCTION(prng_rosc1),
652 	MSM_PIN_FUNCTION(prng_rosc2),
653 	MSM_PIN_FUNCTION(prng_rosc3),
654 	MSM_PIN_FUNCTION(PTA0_0),
655 	MSM_PIN_FUNCTION(PTA0_1),
656 	MSM_PIN_FUNCTION(PTA0_2),
657 	MSM_PIN_FUNCTION(PTA10),
658 	MSM_PIN_FUNCTION(PTA11),
659 	MSM_PIN_FUNCTION(pwm0),
660 	MSM_PIN_FUNCTION(pwm1),
661 	MSM_PIN_FUNCTION(pwm2),
662 	MSM_PIN_FUNCTION(qdss_cti_trig_in_a0),
663 	MSM_PIN_FUNCTION(qdss_cti_trig_out_a0),
664 	MSM_PIN_FUNCTION(qdss_cti_trig_in_a1),
665 	MSM_PIN_FUNCTION(qdss_cti_trig_out_a1),
666 	MSM_PIN_FUNCTION(qdss_cti_trig_in_b0),
667 	MSM_PIN_FUNCTION(qdss_cti_trig_out_b0),
668 	MSM_PIN_FUNCTION(qdss_cti_trig_in_b1),
669 	MSM_PIN_FUNCTION(qdss_cti_trig_out_b1),
670 	MSM_PIN_FUNCTION(qdss_traceclk_a),
671 	MSM_PIN_FUNCTION(qdss_tracectl_a),
672 	MSM_PIN_FUNCTION(qdss_tracedata_a),
673 	MSM_PIN_FUNCTION(qspi_clk),
674 	MSM_PIN_FUNCTION(qspi_cs),
675 	MSM_PIN_FUNCTION(qspi_data),
676 	MSM_PIN_FUNCTION(resout),
677 	MSM_PIN_FUNCTION(rx0),
678 	MSM_PIN_FUNCTION(rx1),
679 	MSM_PIN_FUNCTION(rx2),
680 	MSM_PIN_FUNCTION(sdc_clk),
681 	MSM_PIN_FUNCTION(sdc_cmd),
682 	MSM_PIN_FUNCTION(sdc_data),
683 	MSM_PIN_FUNCTION(spi0),
684 	MSM_PIN_FUNCTION(spi1),
685 	MSM_PIN_FUNCTION(spi10),
686 	MSM_PIN_FUNCTION(spi11),
687 	MSM_PIN_FUNCTION(tsens_max),
688 	MSM_PIN_FUNCTION(uart0),
689 	MSM_PIN_FUNCTION(uart1),
690 	MSM_PIN_FUNCTION(wci_txd),
691 	MSM_PIN_FUNCTION(wci_rxd),
692 	MSM_PIN_FUNCTION(wsi_clk),
693 	MSM_PIN_FUNCTION(wsi_data),
694 };
695 
696 static const struct msm_pingroup ipq5424_groups[] = {
697 	PINGROUP(0, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
698 	PINGROUP(1, sdc_data, qspi_data, pwm2, wci_txd, wci_rxd, _, _, _, _),
699 	PINGROUP(2, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
700 	PINGROUP(3, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
701 	PINGROUP(4, sdc_cmd, qspi_cs, _, _, _, _, _, _, _),
702 	PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _),
703 	PINGROUP(6, spi0, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
704 	PINGROUP(7, spi0, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _, _),
705 	PINGROUP(8, spi0, pwm1, wci_txd, wci_rxd, _, cri_trng2, qdss_tracedata_a, _, _),
706 	PINGROUP(9, spi0, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _, _),
707 	PINGROUP(10, uart0, pwm0, spi11, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
708 	PINGROUP(11, uart0, pwm0, spi1, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
709 	PINGROUP(12, uart0, pwm0, spi11, _, prng_rosc0, qdss_tracedata_a, _, _, _),
710 	PINGROUP(13, uart0, pwm0, spi11, _, prng_rosc1, qdss_tracedata_a, _, _, _),
711 	PINGROUP(14, i2c0_scl, tsens_max, _, prng_rosc2, qdss_tracedata_a, _, _, _, _),
712 	PINGROUP(15, i2c0_sda, _, prng_rosc3, qdss_tracedata_a, _, _, _, _, _),
713 	PINGROUP(16, core_voltage, i2c1_scl, _, _, _, _, _, _, _),
714 	PINGROUP(17, core_voltage, i2c1_sda, _, _, _, _, _, _, _),
715 	PINGROUP(18, _, _, _, _, _, _, _, _, _),
716 	PINGROUP(19, _, _, _, _, _, _, _, _, _),
717 	PINGROUP(20, mdc_slv, atest_char0, _, qdss_tracedata_a, _, _, _, _, _),
718 	PINGROUP(21, mdio_slv, atest_char1, _, qdss_tracedata_a, _, _, _, _, _),
719 	PINGROUP(22, mdc_mst, atest_char2, _, _, _, _, _, _, _),
720 	PINGROUP(23, mdio_mst, atest_char3, _, _, _, _, _, _, _),
721 	PINGROUP(24, pcie0_clk, PTA10, mac0, _, wsi_clk, _, atest_char, qdss_cti_trig_out_a0, _),
722 	PINGROUP(25, _, _, _, _, _, _, _, _, _),
723 	PINGROUP(26, pcie0_wake, PTA10, mac0, _, wsi_data, _, qdss_cti_trig_in_a0, _, _),
724 	PINGROUP(27, pcie1_clk, i2c11, PTA10, wsi_clk, qdss_cti_trig_out_a1, _, _, _, _),
725 	PINGROUP(28, _, _, _, _, _, _, _, _, _),
726 	PINGROUP(29, pcie1_wake, i2c11, wsi_data, qdss_cti_trig_in_a1, _, _, _, _, _),
727 	PINGROUP(30, pcie2_clk, PTA11, mac1, qdss_cti_trig_out_b0, _, _, _, _, _),
728 	PINGROUP(31, _, _, _, _, _, _, _, _, _),
729 	PINGROUP(32, pcie2_wake, PTA11, mac1, audio_pri0, audio_pri0, qdss_cti_trig_in_b0, _, _, _),
730 	PINGROUP(33, pcie3_clk, PTA11, audio_pri1, audio_pri1, qdss_cti_trig_out_b1, _, _, _, _),
731 	PINGROUP(34, _, _, _, _, _, _, _, _, _),
732 	PINGROUP(35, pcie3_wake, audio_sec1, audio_sec1, qdss_cti_trig_in_b1, _, _, _, _, _),
733 	PINGROUP(36, audio_pri, spi1, audio_sec0, audio_sec0, qdss_tracedata_a, _, _, _, _),
734 	PINGROUP(37, audio_pri, spi1, rx2, qdss_tracedata_a, _, _, _, _, _),
735 	PINGROUP(38, audio_pri, spi1, pll_test, rx1, qdss_tracedata_a, _, _, _, _),
736 	PINGROUP(39, audio_pri, rx0, _, qdss_tracedata_a, _, _, _, _, _),
737 	PINGROUP(40, PTA0_0, wci_txd, wci_rxd, _, atest_tic, _, _, _, _),
738 	PINGROUP(41, PTA0_1, wci_txd, wci_rxd, cxc_data, _, _, _, _, _),
739 	PINGROUP(42, PTA0_2, cxc_clk, _, _, _, _, _, _, _),
740 	PINGROUP(43, uart1, gcc_plltest, _, _, _, _, _, _, _),
741 	PINGROUP(44, uart1, gcc_tlmm, _, _, _, _, _, _, _),
742 	PINGROUP(45, spi10, rx2, audio_sec, gcc_plltest, _, qdss_traceclk_a, _, _, _),
743 	PINGROUP(46, spi1, rx1, audio_sec, dbg_out, qdss_tracectl_a, _, _, _, _),
744 	PINGROUP(47, spi10, rx0, audio_sec, _, _, _, _, _, _),
745 	PINGROUP(48, spi10, audio_sec, _, _, _, _, _, _, _),
746 	PINGROUP(49, resout, _, _, _, _, _, _, _, _),
747 };
748 
749 static const struct msm_pinctrl_soc_data ipq5424_pinctrl = {
750 	.pins = ipq5424_pins,
751 	.npins = ARRAY_SIZE(ipq5424_pins),
752 	.functions = ipq5424_functions,
753 	.nfunctions = ARRAY_SIZE(ipq5424_functions),
754 	.groups = ipq5424_groups,
755 	.ngroups = ARRAY_SIZE(ipq5424_groups),
756 	.ngpios = 50,
757 };
758 
ipq5424_pinctrl_probe(struct platform_device * pdev)759 static int ipq5424_pinctrl_probe(struct platform_device *pdev)
760 {
761 	return msm_pinctrl_probe(pdev, &ipq5424_pinctrl);
762 }
763 
764 static const struct of_device_id ipq5424_pinctrl_of_match[] = {
765 	{ .compatible = "qcom,ipq5424-tlmm", },
766 	{ },
767 };
768 MODULE_DEVICE_TABLE(of, ipq5424_pinctrl_of_match);
769 
770 static struct platform_driver ipq5424_pinctrl_driver = {
771 	.driver = {
772 		.name = "ipq5424-tlmm",
773 		.of_match_table = ipq5424_pinctrl_of_match,
774 	},
775 	.probe = ipq5424_pinctrl_probe,
776 	.remove = msm_pinctrl_remove,
777 };
778 
ipq5424_pinctrl_init(void)779 static int __init ipq5424_pinctrl_init(void)
780 {
781 	return platform_driver_register(&ipq5424_pinctrl_driver);
782 }
783 arch_initcall(ipq5424_pinctrl_init);
784 
ipq5424_pinctrl_exit(void)785 static void __exit ipq5424_pinctrl_exit(void)
786 {
787 	platform_driver_unregister(&ipq5424_pinctrl_driver);
788 }
789 module_exit(ipq5424_pinctrl_exit);
790 
791 MODULE_DESCRIPTION("QTI IPQ5424 TLMM driver");
792 MODULE_LICENSE("GPL");
793