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Searched refs:mpllb (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c789 .mpllb = { 0x50a8, /* mpllb cfg0 */
814 .mpllb = { 0x308c, /* mpllb cfg0 */
839 .mpllb = { 0x108c, /* mpllb cfg0 */
864 .mpllb = { 0x10d2, /* mpllb cfg0 */
914 .mpllb = { 0x015f, /* mpllb cfg0 */
978 .mpllb = { 0x50e1,
1003 .mpllb = { 0x50fd,
1028 .mpllb = { 0x30a8,
1053 .mpllb = { 0x30e1,
1078 .mpllb = { 0x10af,
[all …]
H A Dintel_dpll_mgr.h257 u16 mpllb[11]; member
278 struct intel_mpllb_state mpllb; member
H A Dintel_ddi.c4090 intel_mpllb_readout_hw_state(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config()
4091 crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config()