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Searched refs:mpll_param (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.c1117 struct atom_mpll_param *mpll_param) in amdgpu_atombios_get_memory_pll_dividers() argument
1124 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in amdgpu_atombios_get_memory_pll_dividers()
1143 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in amdgpu_atombios_get_memory_pll_dividers()
1144 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in amdgpu_atombios_get_memory_pll_dividers()
1145 mpll_param->post_div = args.ucPostDiv; in amdgpu_atombios_get_memory_pll_dividers()
1146 mpll_param->dll_speed = args.ucDllSpeed; in amdgpu_atombios_get_memory_pll_dividers()
1147 mpll_param->bwcntl = args.ucBWCntl; in amdgpu_atombios_get_memory_pll_dividers()
1148 mpll_param->vco_mode = in amdgpu_atombios_get_memory_pll_dividers()
1150 mpll_param->yclk_sel = in amdgpu_atombios_get_memory_pll_dividers()
1152 mpll_param->qdr = in amdgpu_atombios_get_memory_pll_dividers()
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/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c1064 pp_atomctrl_memory_clock_param mpll_param; in iceland_calculate_mclk_params() local
1068 memory_clock, &mpll_param, strobe_mode); in iceland_calculate_mclk_params()
1073 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in iceland_calculate_mclk_params()
1077 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in iceland_calculate_mclk_params()
1079 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in iceland_calculate_mclk_params()
1081 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in iceland_calculate_mclk_params()
1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1090 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in iceland_calculate_mclk_params()
1092 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1118 if (1 == mpll_param.qdr) in iceland_calculate_mclk_params()
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H A Dci_smumgr.c1042 pp_atomctrl_memory_clock_param mpll_param; in ci_calculate_mclk_params() local
1046 memory_clock, &mpll_param, strobe_mode); in ci_calculate_mclk_params()
1050 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in ci_calculate_mclk_params()
1053 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in ci_calculate_mclk_params()
1055 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in ci_calculate_mclk_params()
1057 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in ci_calculate_mclk_params()
1060 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1064 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in ci_calculate_mclk_params()
1066 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1077 if (1 == mpll_param.qdr) in ci_calculate_mclk_params()
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H A Dtonga_smumgr.c807 pp_atomctrl_memory_clock_param mpll_param; in tonga_calculate_mclk_params() local
811 memory_clock, &mpll_param, strobe_mode); in tonga_calculate_mclk_params()
819 mpll_param.bw_ctrl); in tonga_calculate_mclk_params()
824 mpll_param.mpll_fb_divider.cl_kf); in tonga_calculate_mclk_params()
827 mpll_param.mpll_fb_divider.clk_frac); in tonga_calculate_mclk_params()
830 mpll_param.vco_mode); in tonga_calculate_mclk_params()
835 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
841 mpll_param.yclk_sel); in tonga_calculate_mclk_params()
844 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
870 if (1 == mpll_param.qdr) in tonga_calculate_mclk_params()
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H A Dvegam_smumgr.c966 struct pp_atomctrl_memory_clock_param_ai mpll_param; in vegam_calculate_mclk_params() local
969 clock, &mpll_param), in vegam_calculate_mclk_params()
973 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()
974 mem_level->Fcw_int = (uint16_t)mpll_param.ulMclk_fcw_int; in vegam_calculate_mclk_params()
975 mem_level->Fcw_frac = (uint16_t)mpll_param.ulMclk_fcw_frac; in vegam_calculate_mclk_params()
976 mem_level->Postdiv = (uint8_t)mpll_param.ulPostDiv; in vegam_calculate_mclk_params()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c2945 struct atom_mpll_param *mpll_param) in radeon_atom_get_memory_pll_dividers() argument
2952 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in radeon_atom_get_memory_pll_dividers()
2969 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in radeon_atom_get_memory_pll_dividers()
2970 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in radeon_atom_get_memory_pll_dividers()
2971 mpll_param->post_div = args.ucPostDiv; in radeon_atom_get_memory_pll_dividers()
2972 mpll_param->dll_speed = args.ucDllSpeed; in radeon_atom_get_memory_pll_dividers()
2973 mpll_param->bwcntl = args.ucBWCntl; in radeon_atom_get_memory_pll_dividers()
2974 mpll_param->vco_mode = in radeon_atom_get_memory_pll_dividers()
2976 mpll_param->yclk_sel = in radeon_atom_get_memory_pll_dividers()
2978 mpll_param->qdr = in radeon_atom_get_memory_pll_dividers()
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H A Dci_dpm.c2760 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2763 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2768 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in ci_calculate_mclk_params()
2771 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in ci_calculate_mclk_params()
2772 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in ci_calculate_mclk_params()
2775 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2779 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in ci_calculate_mclk_params()
2780 YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2789 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
2790 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
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H A Dsi_dpm.c4833 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
4836 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
4841 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
4844 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
4845 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
4848 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4852 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
4853 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4883 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5428 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
5431 ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
5436 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
5439 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
5440 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
5443 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5447 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
5448 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5478 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()