/linux/drivers/clk/mstar/ |
H A D | clk-msc313-mpll.c | 47 struct msc313_mpll *mpll = to_mpll(hw); in msc313_mpll_recalc_rate() local 51 regmap_field_read(mpll->input_div, &input_div); in msc313_mpll_recalc_rate() 52 regmap_field_read(mpll->output_div, &output_div); in msc313_mpll_recalc_rate() 53 regmap_field_read(mpll->loop_div_first, &loop_first); in msc313_mpll_recalc_rate() 54 regmap_field_read(mpll->loop_div_second, &loop_second); in msc313_mpll_recalc_rate() 74 struct msc313_mpll *mpll; in msc313_mpll_probe() local 82 mpll = devm_kzalloc(dev, sizeof(*mpll), GFP_KERNEL); in msc313_mpll_probe() 83 if (!mpll) in msc313_mpll_probe() 94 mpll->input_div = devm_regmap_field_alloc(dev, regmap, config1_input_div_first); in msc313_mpll_probe() 95 if (IS_ERR(mpll->input_div)) in msc313_mpll_probe() [all …]
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H A D | Makefile | 7 obj-$(CONFIG_MSTAR_MSC313_MPLL) += clk-msc313-mpll.o
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/linux/drivers/clk/meson/ |
H A D | clk-mpll.c | 79 struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk); in mpll_recalc_rate() local 83 sdm = meson_parm_read(clk->map, &mpll->sdm); in mpll_recalc_rate() 84 n2 = meson_parm_read(clk->map, &mpll->n2); in mpll_recalc_rate() 93 struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk); in mpll_determine_rate() local 98 mpll->flags); in mpll_determine_rate() 113 struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk); in mpll_set_rate() local 116 params_from_rate(rate, parent_rate, &sdm, &n2, mpll->flags); in mpll_set_rate() 119 meson_parm_write(clk->map, &mpll->sdm, sdm); in mpll_set_rate() 122 meson_parm_write(clk->map, &mpll->n2, n2); in mpll_set_rate() 130 struct meson_clk_mpll_data *mpll = meson_clk_mpll_data(clk); in mpll_init() local [all …]
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H A D | Makefile | 9 obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o
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/linux/drivers/gpu/drm/radeon/ |
H A D | radeon_clocks.c | 72 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock() local 78 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock() 112 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF() local 150 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF() 151 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF() 187 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_get_clock_info() local 219 if (mpll->reference_div < 2) in radeon_get_clock_info() 220 mpll->reference_div = spll->reference_div; in radeon_get_clock_info() 234 mpll->reference_freq = 1432; in radeon_get_clock_info() 239 mpll->reference_freq = 2700; in radeon_get_clock_info() [all …]
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H A D | radeon_combios.c | 721 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_combios_get_clock_info() local 762 mpll->reference_freq = RBIOS16(pll_info + 0x26); in radeon_combios_get_clock_info() 763 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info() 764 mpll->pll_out_min = RBIOS32(pll_info + 0x2a); in radeon_combios_get_clock_info() 765 mpll->pll_out_max = RBIOS32(pll_info + 0x2e); in radeon_combios_get_clock_info() 768 mpll->pll_in_min = RBIOS32(pll_info + 0x5a); in radeon_combios_get_clock_info() 769 mpll->pll_in_max = RBIOS32(pll_info + 0x5e); in radeon_combios_get_clock_info() 772 mpll->pll_in_min = 40; in radeon_combios_get_clock_info() 773 mpll->pll_in_max = 500; in radeon_combios_get_clock_info()
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H A D | radeon_atombios.c | 1136 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_atom_get_clock_info() local 1215 mpll->reference_freq = in radeon_atom_get_clock_info() 1218 mpll->reference_freq = in radeon_atom_get_clock_info() 1220 mpll->reference_div = 0; in radeon_atom_get_clock_info() 1222 mpll->pll_out_min = in radeon_atom_get_clock_info() 1224 mpll->pll_out_max = in radeon_atom_get_clock_info() 1228 if (mpll->pll_out_min == 0) { in radeon_atom_get_clock_info() 1230 mpll->pll_out_min = 64800; in radeon_atom_get_clock_info() 1232 mpll->pll_out_min = 20000; in radeon_atom_get_clock_info() 1235 mpll->pll_in_min = in radeon_atom_get_clock_info() [all …]
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H A D | rv740_dpm.c | 250 u32 reference_clock = rdev->clock.mpll.reference_freq; in rv740_populate_mclk_value()
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/linux/arch/arm/boot/dts/sigmastar/ |
H A D | mstar-v7.dtsi | 9 #include <dt-bindings/clock/mstar-msc313-mpll.h> 153 mpll: mpll@206000 { label 154 compatible = "mstar,msc313-mpll"; 164 clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
H A D | nv04.c | 288 bool mpll = Preg == 0x4020; in setPLL_double_lowregs() local 291 uint32_t Pval = (oldPval & (mpll ? ~(0x77 << 16) : ~(7 << 16))) | in setPLL_double_lowregs() 306 if (mpll) { in setPLL_double_lowregs() 322 Pval |= mpll ? 1 << 12 : 1 << 8; in setPLL_double_lowregs() 326 if (mpll) { in setPLL_double_lowregs() 340 if (mpll) { in setPLL_double_lowregs() 349 if (mpll) { in setPLL_double_lowregs()
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_atomfirmware.c | 709 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atomfirmware_get_clock_info() local 768 mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz); in amdgpu_atomfirmware_get_clock_info() 770 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info() 771 mpll->min_post_div = 1; in amdgpu_atomfirmware_get_clock_info() 772 mpll->max_post_div = 1; in amdgpu_atomfirmware_get_clock_info() 773 mpll->min_ref_div = 2; in amdgpu_atomfirmware_get_clock_info() 774 mpll->max_ref_div = 0xff; in amdgpu_atomfirmware_get_clock_info() 775 mpll->min_feedback_div = 4; in amdgpu_atomfirmware_get_clock_info() 776 mpll->max_feedback_div = 0xff; in amdgpu_atomfirmware_get_clock_info() 777 mpll->best_vco = 0; in amdgpu_atomfirmware_get_clock_info()
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H A D | amdgpu_atombios.c | 571 struct amdgpu_pll *mpll = &adev->clock.mpll; in amdgpu_atombios_get_clock_info() local 643 mpll->reference_freq = in amdgpu_atombios_get_clock_info() 645 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info() 647 mpll->pll_out_min = in amdgpu_atombios_get_clock_info() 649 mpll->pll_out_max = in amdgpu_atombios_get_clock_info() 653 if (mpll->pll_out_min == 0) in amdgpu_atombios_get_clock_info() 654 mpll->pll_out_min = 64800; in amdgpu_atombios_get_clock_info() 656 mpll->pll_in_min = in amdgpu_atombios_get_clock_info() 658 mpll->pll_in_max = in amdgpu_atombios_get_clock_info() 666 mpll->min_post_div = 1; in amdgpu_atombios_get_clock_info() [all …]
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-ipq8064-v2.0.dtsi | 62 qcom,mpll = <5>; 68 qcom,mpll = <5>;
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/linux/arch/arm64/boot/dts/sprd/ |
H A D | sharkl3.dtsi | 91 mpll: mpll@0 { label 92 compatible = "sprd,sc9863a-mpll";
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/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-ipq806x-usb.c | 125 u32 mpll; member 406 data |= SSPHY_MPLL(phy_dwc3->mpll); in qcom_ipq806x_usb_ss_phy_init() 532 if (device_property_read_u32(&pdev->dev, "qcom,mpll", &phy_dwc3->mpll)) in qcom_ipq806x_usb_phy_probe() 533 phy_dwc3->mpll = SSPHY_MPLL_VALUE; in qcom_ipq806x_usb_phy_probe()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
H A D | ramnv50.c | 225 struct nvbios_pll mpll; in nv50_ram_calc() local 327 ret = nvbios_pll_parse(bios, 0x004008, &mpll); in nv50_ram_calc() 328 mpll.vco2.max_freq = 0; in nv50_ram_calc() 330 ret = nv04_pll_calc(subdev, &mpll, freq, in nv50_ram_calc() 348 r004008 |= (mpll.bias_p << 19) | (P << 22) | (P << 16); in nv50_ram_calc()
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/linux/drivers/clk/imx/ |
H A D | clk-imx35.c | 64 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator 108 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX35, "mpll", "ckih", base + MX35_CCM_MPCTL); in _mx35_clocks_init() 111 clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4); in _mx35_clocks_init()
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H A D | clk-imx31.c | 39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator 58 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX31, "mpll", "ckih", base + MXC_CCM_MPCTL); in _mx31_clocks_init()
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H A D | clk-imx25.c | 54 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator 82 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); in __mx25_clocks_init()
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/linux/drivers/clk/samsung/ |
H A D | clk-exynos5410.c | 64 apll, cpll, epll, mpll, enumerator 249 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK,
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H A D | clk-s5pv210.c | 69 mpll, enumerator 718 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll", 730 [mpll] = PLL(pll_4502, FOUT_MPLL, "fout_mpll", "fin_pll",
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H A D | clk-exynos5250.c | 108 apll, mpll, cpll, epll, vpll, gpll, bpll, enumerator 738 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK,
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H A D | clk-exynos4.c | 150 apll, mpll, epll, vpll, enumerator 1154 [mpll] = PLL(pll_4508, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", 1165 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll",
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H A D | clk-exynos5420.c | 153 apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll, enumerator 1481 [mpll] = PLL(pll_2550, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK,
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | mvebu-core-clock.txt | 38 3 = mpll (MPLL Clock)
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