| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_mpc.c | 62 static void mpc201_init_mpcc(struct mpcc *mpcc, int mpcc_inst) in mpc201_init_mpcc() argument
64 mpcc->mpcc_id = mpcc_inst; in mpc201_init_mpcc()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | pg_cntl.h | 45 void (*mpcc_pg_control)(struct pg_cntl *pg_cntl, unsigned int mpcc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| H A D | dcn35_pg_cntl.c | 348 unsigned int mpcc_inst, bool power_on) in pg_cntl35_mpcc_pg_control() argument
353 if (mpcc_inst < MAX_PIPES) in pg_cntl35_mpcc_pg_control()
354 pg_cntl->pg_pipe_res_enable[PG_MPCC][mpcc_inst] = power_on; in pg_cntl35_mpcc_pg_control()
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| H A D | dcn35_pg_cntl.h | 179 unsigned int mpcc_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 95 unsigned int mpcc_id = pipe_ctx->plane_res.mpcc_inst; in dcn401_program_gamut_remap()
3035 hwss_add_opp_set_mpcc_disconnect_pending(seq_state, opp, pipe_ctx->plane_res.mpcc_inst, true); in dcn401_plane_atomic_disconnect_sequence()
3145 int mpcc_inst = -1; in dcn401_program_all_writeback_pipes_in_tree_sequence() local
3156 mpcc_inst = pipe_ctx->plane_res.mpcc_inst; in dcn401_program_all_writeback_pipes_in_tree_sequence()
3161 if (mpcc_inst == -1) { in dcn401_program_all_writeback_pipes_in_tree_sequence()
3177 dcn401_enable_writeback_sequence(dc, wb_info, context, mpcc_inst, seq_state); in dcn401_program_all_writeback_pipes_in_tree_sequence()
3190 int mpcc_inst, in dcn401_enable_writeback_sequence() argument
3215 hwss_add_mpc_set_dwb_mux(seq_state, dc->res_pool->mpc, wb_info->dwb_pipe_inst, mpcc_inst); in dcn401_enable_writeback_sequence()
3784 static struct hubp *get_hubp_by_inst(struct resource_pool *res_pool, int mpcc_inst) in get_hubp_by_inst() argument
3789 if (res_pool->hubps[i]->inst == mpcc_inst) in get_hubp_by_inst()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 318 pipe_ctx->plane_res.mpcc_inst = dpp->inst; in dcn201_init_hw()
326 res_pool->opps[i]->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true; in dcn201_init_hw()
414 opp->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true; in dcn201_plane_atomic_disconnect()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dmub_psr.c | 341 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst; in dmub_psr_copy_settings()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2187 int mpcc_inst; in hwss_wait_for_outstanding_hw_updates() local
2208 mpcc_inst = hubp->inst; in hwss_wait_for_outstanding_hw_updates()
2212 (dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst])) { in hwss_wait_for_outstanding_hw_updates()
2213 dc->res_pool->mpc->funcs->wait_for_idle(dc->res_pool->mpc, mpcc_inst); in hwss_wait_for_outstanding_hw_updates()
2214 dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst] = false; in hwss_wait_for_outstanding_hw_updates()
2550 int mpcc_inst = params->opp_set_mpcc_disconnect_pending_params.mpcc_inst; in hwss_opp_set_mpcc_disconnect_pending() local
2553 opp->mpcc_disconnect_pending[mpcc_inst] = pending; in hwss_opp_set_mpcc_disconnect_pending()
3209 struct output_pixel_processor *opp, int mpcc_inst, bool pending) in hwss_add_opp_set_mpcc_disconnect_pending() argument
3214 …->steps[*seq_state->num_steps].params.opp_set_mpcc_disconnect_pending_params.mpcc_inst = mpcc_inst; in hwss_add_opp_set_mpcc_disconnect_pending()
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| H A D | dc_resource.c | 2627 split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_split_pipe()
3807 pipe_ctx->plane_res.mpcc_inst = pool->dpps[id_src[i]]->inst; in acquire_resource_from_hw_enabled_state()
3812 pool->mpc->funcs->read_mpcc_state(pool->mpc, pipe_ctx->plane_res.mpcc_inst, &s); in acquire_resource_from_hw_enabled_state()
3815 pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].dpp_id = in acquire_resource_from_hw_enabled_state()
3819 pool->mpc->mpcc_array[pipe_ctx->plane_res.mpcc_inst].mpcc_bot = in acquire_resource_from_hw_enabled_state()
3951 pipe_ctx->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in acquire_otg_master_pipe_for_stream()
5579 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_stream.h | 106 int mpcc_inst; member
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| H A D | dc.h | 2055 int mpcc_inst);
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1532 next_odm_pipe->plane_res.mpcc_inst = pool->dpps[next_odm_pipe->pipe_idx]->inst; in dcn20_split_stream_for_odm()
1589 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in dcn20_split_stream_for_mpc()
2219 sec_dpp_pipe->plane_res.mpcc_inst = pool->dpps[sec_dpp_pipe->pipe_idx]->inst; in dcn20_acquire_free_pipe_for_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 2817 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2876 free_pipe->plane_res.mpcc_inst = in dcn32_acquire_free_pipe_as_secondary_dpp_pipe()
2909 free_pipe->plane_res.mpcc_inst = pool->dpps[free_pipe_idx]->inst; in dcn32_acquire_free_pipe_as_secondary_opp_head()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 1058 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn201_acquire_free_pipe_for_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/ |
| H A D | dcn10_resource.c | 1142 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_free_pipe_for_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1572 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dcn30_split_stream_for_mpc_or_odm()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 1855 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dcn32_split_stream_for_mpc_or_odm()
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