| /linux/arch/x86/kernel/ |
| H A D | mpparse.c | 140 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) in smp_check_mpc() argument
143 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { in smp_check_mpc()
145 mpc->signature[0], mpc->signature[1], in smp_check_mpc()
146 mpc->signature[2], mpc->signature[3]); in smp_check_mpc()
149 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { in smp_check_mpc()
153 if (mpc->spec != 0x01 && mpc->spec != 0x04) { in smp_check_mpc()
154 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); in smp_check_mpc()
157 if (!mpc->lapic) { in smp_check_mpc()
161 memcpy(oem, mpc->oem, 8); in smp_check_mpc()
165 memcpy(str, mpc->productid, 12); in smp_check_mpc()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 297 res_pool->mpc->funcs->mpc_init(res_pool->mpc); in dcn201_init_hw()
385 struct mpc *mpc = dc->res_pool->mpc; in dcn201_plane_atomic_disconnect() local
394 if (mpc->funcs->get_mpcc_for_dpp_from_secondary) in dcn201_plane_atomic_disconnect()
395 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp_from_secondary(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
398 if (mpcc_to_remove != NULL && mpc->funcs->remove_mpcc_from_secondary) { in dcn201_plane_atomic_disconnect()
399 mpc->funcs->remove_mpcc_from_secondary(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
404 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
406 mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
433 struct mpc *mpc = dc->res_pool->mpc; in dcn201_update_mpcc() local
490 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn201_update_mpcc()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/mpc/dcn20/ |
| H A D | dcn20_mpc.h | 261 struct mpc base;
278 struct mpc *mpc,
283 struct mpc *mpc,
288 struct mpc *mpc,
293 struct mpc *mpc,
299 struct mpc *mpc,
305 struct mpc *mpc,
309 void mpc2_assert_idle_mpcc(struct mpc *mpc, int id);
310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 876 block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
883 block_sequence[*num_steps].params.set_output_csc_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
890 block_sequence[*num_steps].params.set_ocsc_default_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
1496 struct mpc *mpc, in hwss_add_mpc_power_on_mpc_mem_pwr() argument
1501 seq_state->steps[*seq_state->num_steps].params.power_on_mpc_mem_pwr_params.mpc = mpc; in hwss_add_mpc_power_on_mpc_mem_pwr()
1513 struct mpc *mpc, in hwss_add_mpc_set_output_csc() argument
1519 seq_state->steps[*seq_state->num_steps].params.set_output_csc_params.mpc = mpc; in hwss_add_mpc_set_output_csc()
1532 struct mpc *mpc, in hwss_add_mpc_set_ocsc_default() argument
1538 seq_state->steps[*seq_state->num_steps].params.set_ocsc_default_params.mpc = mpc; in hwss_add_mpc_set_ocsc_default()
1992 struct mpc *mpc = params->power_on_mpc_mem_pwr_params.mpc; in hwss_power_on_mpc_mem_pwr() local
[all …]
|
| /linux/drivers/net/ethernet/microsoft/mana/ |
| H A D | mana_en.c | 668 void mana_pre_dealloc_rxbufs(struct mana_port_context *mpc) in mana_pre_dealloc_rxbufs() argument
673 dev = mpc->ac->gdma_dev->gdma_context->dev; in mana_pre_dealloc_rxbufs()
675 if (!mpc->rxbufs_pre) in mana_pre_dealloc_rxbufs()
678 if (!mpc->das_pre) in mana_pre_dealloc_rxbufs()
681 while (mpc->rxbpre_total) { in mana_pre_dealloc_rxbufs()
682 i = --mpc->rxbpre_total; in mana_pre_dealloc_rxbufs()
683 dma_unmap_single(dev, mpc->das_pre[i], mpc->rxbpre_datasize, in mana_pre_dealloc_rxbufs()
685 put_page(virt_to_head_page(mpc->rxbufs_pre[i])); in mana_pre_dealloc_rxbufs()
688 kfree(mpc->das_pre); in mana_pre_dealloc_rxbufs()
689 mpc->das_pre = NULL; in mana_pre_dealloc_rxbufs()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 96 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn401_program_gamut_remap() local
111 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
117 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
133 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
395 struct mpc *mpc = dc->res_pool->mpc; in dcn401_set_mcm_luts() local
404 mpc->funcs->get_lut_mode(mpc, MCM_LUT_1DLUT, mpcc_id, &lut_enable, &lut_bank_a); in dcn401_set_mcm_luts()
406 mpc->funcs->get_lut_mode(mpc, MCM_LUT_SHAPER, mpcc_id, &lut_enable, &lut_bank_a); in dcn401_set_mcm_luts()
409 mpc->funcs->get_lut_mode(mpc, MCM_LUT_3DLUT, mpcc_id, &lut_enable, &lut_bank_a); in dcn401_set_mcm_luts()
418 mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id); in dcn401_set_mcm_luts()
441 if (mpc->funcs->program_lut_mode) in dcn401_set_mcm_luts()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 728 static struct mpc *dcn201_mpc_create(struct dc_context *ctx, uint32_t num_mpcc) in dcn201_mpc_create()
951 if (pool->base.mpc != NULL) { in dcn201_resource_destruct()
952 kfree(TO_DCN201_MPC(pool->base.mpc)); in dcn201_resource_destruct()
953 pool->base.mpc = NULL; in dcn201_resource_destruct()
1179 dc->caps.color.mpc.gamut_remap = 0; in dcn201_resource_construct()
1180 dc->caps.color.mpc.num_3dluts = 0; in dcn201_resource_construct()
1181 dc->caps.color.mpc.shared_3d_lut = 0; in dcn201_resource_construct()
1182 dc->caps.color.mpc.ogam_ram = 1; in dcn201_resource_construct()
1183 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn201_resource_construct()
1184 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn201_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_mpc.c | 43 struct mpc *mpc, in mpc201_set_out_rate_control() argument
49 struct dcn201_mpc *mpc201 = TO_DCN201_MPC(mpc); in mpc201_set_out_rate_control()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 644 static struct mpc *dcn303_mpc_create(struct dc_context *ctx, int num_mpcc, int num_rmu) in dcn303_mpc_create()
988 if (pool->mpc != NULL) { in dcn303_resource_destruct()
989 kfree(TO_DCN20_MPC(pool->mpc)); in dcn303_resource_destruct()
990 pool->mpc = NULL; in dcn303_resource_destruct()
1246 dc->caps.color.mpc.gamut_remap = 1; in dcn303_resource_construct()
1247 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn303_resource_construct()
1248 dc->caps.color.mpc.ogam_ram = 1; in dcn303_resource_construct()
1249 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn303_resource_construct()
1250 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn303_resource_construct()
1251 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn303_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 680 static struct mpc *dcn302_mpc_create(struct dc_context *ctx, int num_mpcc, int num_rmu) in dcn302_mpc_create()
1044 if (pool->mpc != NULL) { in dcn302_resource_destruct()
1045 kfree(TO_DCN20_MPC(pool->mpc)); in dcn302_resource_destruct()
1046 pool->mpc = NULL; in dcn302_resource_destruct()
1302 dc->caps.color.mpc.gamut_remap = 1; in dcn302_resource_construct()
1303 dc->caps.color.mpc.num_3dluts = pool->res_cap->num_mpc_3dlut; //3 in dcn302_resource_construct()
1304 dc->caps.color.mpc.ogam_ram = 1; in dcn302_resource_construct()
1305 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn302_resource_construct()
1306 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn302_resource_construct()
1307 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn302_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn10/ |
| H A D | dcn10_resource.c | 699 static struct mpc *dcn10_mpc_create(struct dc_context *ctx) in dcn10_mpc_create()
941 if (pool->base.mpc != NULL) { in dcn10_resource_destruct()
942 kfree(TO_DCN10_MPC(pool->base.mpc)); in dcn10_resource_destruct()
943 pool->base.mpc = NULL; in dcn10_resource_destruct()
1432 dc->caps.color.mpc.gamut_remap = 0; in dcn10_resource_construct()
1433 dc->caps.color.mpc.num_3dluts = 0; in dcn10_resource_construct()
1434 dc->caps.color.mpc.shared_3d_lut = 0; in dcn10_resource_construct()
1435 dc->caps.color.mpc.ogam_ram = 0; in dcn10_resource_construct()
1436 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn10_resource_construct()
1437 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn10_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 692 if (pool->base.mpc != NULL) { in dcn21_resource_destruct()
693 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn21_resource_destruct()
694 pool->base.mpc = NULL; in dcn21_resource_destruct()
1095 static struct mpc *dcn21_mpc_create(struct dc_context *ctx) in dcn21_mpc_create()
1490 dc->caps.color.mpc.gamut_remap = 0; in dcn21_resource_construct()
1491 dc->caps.color.mpc.num_3dluts = 0; in dcn21_resource_construct()
1492 dc->caps.color.mpc.shared_3d_lut = 0; in dcn21_resource_construct()
1493 dc->caps.color.mpc.ogam_ram = 1; in dcn21_resource_construct()
1494 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn21_resource_construct()
1495 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn21_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 797 static struct mpc *dcn301_mpc_create( in dcn301_mpc_create()
1090 if (pool->base.mpc != NULL) { in dcn301_destruct()
1091 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn301_destruct()
1092 pool->base.mpc = NULL; in dcn301_destruct()
1508 dc->caps.color.mpc.gamut_remap = 1; in dcn301_resource_construct()
1509 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn301_resource_construct()
1510 dc->caps.color.mpc.ogam_ram = 1; in dcn301_resource_construct()
1511 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn301_resource_construct()
1512 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn301_resource_construct()
1513 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn301_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 920 .mpc = true,
1078 static struct mpc *dcn31_mpc_create( in dcn31_mpc_create()
1479 if (pool->base.mpc != NULL) { in dcn314_resource_destruct()
1480 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn314_resource_destruct()
1481 pool->base.mpc = NULL; in dcn314_resource_destruct()
1916 dc->caps.color.mpc.gamut_remap = 1; in dcn314_resource_construct()
1917 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn314_resource_construct()
1918 dc->caps.color.mpc.ogam_ram = 1; in dcn314_resource_construct()
1919 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn314_resource_construct()
1920 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn314_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 895 .mpc = true,
1012 static struct mpc *dcn31_mpc_create( in dcn31_mpc_create()
1416 if (pool->base.mpc != NULL) { in dcn316_resource_destruct()
1417 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn316_resource_destruct()
1418 pool->base.mpc = NULL; in dcn316_resource_destruct()
1835 dc->caps.color.mpc.gamut_remap = 1; in dcn316_resource_construct()
1836 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn316_resource_construct()
1837 dc->caps.color.mpc.ogam_ram = 1; in dcn316_resource_construct()
1838 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn316_resource_construct()
1839 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn316_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 738 .mpc = true,
946 static struct mpc *dcn35_mpc_create( in dcn35_mpc_create()
1471 if (pool->base.mpc != NULL) { in dcn351_resource_destruct()
1472 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn351_resource_destruct()
1473 pool->base.mpc = NULL; in dcn351_resource_destruct()
1923 dc->caps.color.mpc.gamut_remap = 1; in dcn351_resource_construct()
1924 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn351_resource_construct()
1925 dc->caps.color.mpc.ogam_ram = 1; in dcn351_resource_construct()
1926 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn351_resource_construct()
1927 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn351_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 758 .mpc = true,
966 static struct mpc *dcn35_mpc_create( in dcn35_mpc_create()
1491 if (pool->base.mpc != NULL) { in dcn35_resource_destruct()
1492 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn35_resource_destruct()
1493 pool->base.mpc = NULL; in dcn35_resource_destruct()
1950 dc->caps.color.mpc.gamut_remap = 1; in dcn35_resource_construct()
1951 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn35_resource_construct()
1952 dc->caps.color.mpc.ogam_ram = 1; in dcn35_resource_construct()
1953 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn35_resource_construct()
1954 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn35_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 745 .mpc = true,
953 static struct mpc *dcn35_mpc_create( in dcn35_mpc_create()
1478 if (pool->base.mpc != NULL) { in dcn36_resource_destruct()
1479 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn36_resource_destruct()
1480 pool->base.mpc = NULL; in dcn36_resource_destruct()
1920 dc->caps.color.mpc.gamut_remap = 1; in dcn36_resource_construct()
1921 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn36_resource_construct()
1922 dc->caps.color.mpc.ogam_ram = 1; in dcn36_resource_construct()
1923 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn36_resource_construct()
1924 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn36_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 724 .mpc = false,
972 static struct mpc *dcn321_mpc_create( in dcn321_mpc_create()
1408 if (pool->base.mpc != NULL) { in dcn321_resource_destruct()
1409 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn321_resource_destruct()
1410 pool->base.mpc = NULL; in dcn321_resource_destruct()
1803 dc->caps.color.mpc.gamut_remap = 1; in dcn321_resource_construct()
1804 …dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //4, configurable to be before … in dcn321_resource_construct()
1805 dc->caps.color.mpc.ogam_ram = 1; in dcn321_resource_construct()
1806 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn321_resource_construct()
1807 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn321_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 900 .mpc = true,
1020 static struct mpc *dcn31_mpc_create( in dcn31_mpc_create()
1420 if (pool->base.mpc != NULL) { in dcn31_resource_destruct()
1421 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn31_resource_destruct()
1422 pool->base.mpc = NULL; in dcn31_resource_destruct()
1989 dc->caps.color.mpc.gamut_remap = 1; in dcn31_resource_construct()
1990 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn31_resource_construct()
1991 dc->caps.color.mpc.ogam_ram = 1; in dcn31_resource_construct()
1992 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn31_resource_construct()
1993 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn31_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 900 .mpc = true,
1019 static struct mpc *dcn31_mpc_create( in dcn31_mpc_create()
1421 if (pool->base.mpc != NULL) { in dcn315_resource_destruct()
1422 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn315_resource_destruct()
1423 pool->base.mpc = NULL; in dcn315_resource_destruct()
1959 dc->caps.color.mpc.gamut_remap = 1; in dcn315_resource_construct()
1960 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //2 in dcn315_resource_construct()
1961 dc->caps.color.mpc.ogam_ram = 1; in dcn315_resource_construct()
1962 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn315_resource_construct()
1963 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn315_resource_construct()
[all …]
|
| /linux/drivers/infiniband/hw/mana/ |
| H A D | main.c | 12 struct mana_port_context *mpc; in mana_ib_uncfg_vport() local
16 mpc = netdev_priv(ndev); in mana_ib_uncfg_vport()
24 mana_uncfg_vport(mpc); in mana_ib_uncfg_vport()
32 struct mana_port_context *mpc; in mana_ib_cfg_vport() local
37 mpc = netdev_priv(ndev); in mana_ib_cfg_vport()
49 err = mana_cfg_vport(mpc, pd->pdn, doorbell_id); in mana_ib_cfg_vport()
60 pd->tx_shortform_allowed = mpc->tx_shortform_allowed; in mana_ib_cfg_vport()
61 pd->tx_vp_offset = mpc->tx_vp_offset; in mana_ib_cfg_vport()
64 mpc->port_handle, pd->pdn, doorbell_id); in mana_ib_cfg_vport()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 842 static struct mpc *dcn30_mpc_create( in dcn30_mpc_create()
1119 if (pool->base.mpc != NULL) { in dcn30_resource_destruct()
1120 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn30_resource_destruct()
1121 pool->base.mpc = NULL; in dcn30_resource_destruct()
2381 dc->caps.color.mpc.gamut_remap = 1; in dcn30_resource_construct()
2382 dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //3 in dcn30_resource_construct()
2383 dc->caps.color.mpc.ogam_ram = 1; in dcn30_resource_construct()
2384 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn30_resource_construct()
2385 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn30_resource_construct()
2386 dc->caps.color.mpc.ogam_rom_caps.gamma2_2 = 0; in dcn30_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 867 struct mpc *dcn20_mpc_create(struct dc_context *ctx) in dcn20_mpc_create()
1128 if (pool->base.mpc != NULL) { in dcn20_resource_destruct()
1129 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn20_resource_destruct()
1130 pool->base.mpc = NULL; in dcn20_resource_destruct()
2513 dc->caps.color.mpc.gamut_remap = 0; in dcn20_resource_construct()
2514 dc->caps.color.mpc.num_3dluts = 0; in dcn20_resource_construct()
2515 dc->caps.color.mpc.shared_3d_lut = 0; in dcn20_resource_construct()
2516 dc->caps.color.mpc.ogam_ram = 1; in dcn20_resource_construct()
2517 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn20_resource_construct()
2518 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn20_resource_construct()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 733 .mpc = false,
983 static struct mpc *dcn32_mpc_create( in dcn32_mpc_create()
1432 if (pool->base.mpc != NULL) { in dcn32_resource_destruct()
1433 kfree(TO_DCN20_MPC(pool->base.mpc)); in dcn32_resource_destruct()
1434 pool->base.mpc = NULL; in dcn32_resource_destruct()
2310 dc->caps.color.mpc.gamut_remap = 1; in dcn32_resource_construct()
2311 …dc->caps.color.mpc.num_3dluts = pool->base.res_cap->num_mpc_3dlut; //4, configurable to be before … in dcn32_resource_construct()
2312 dc->caps.color.mpc.ogam_ram = 1; in dcn32_resource_construct()
2313 dc->caps.color.mpc.ogam_rom_caps.srgb = 0; in dcn32_resource_construct()
2314 dc->caps.color.mpc.ogam_rom_caps.bt2020 = 0; in dcn32_resource_construct()
[all …]
|