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Searched refs:mode_val (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/soc/renesas/
H A Dr9a09g056-sys.c59 u32 prr_val, mode_val; in rzv2n_sys_print_id() local
63 mode_val = readl(sysc_base + SYS_LSI_MODE); in rzv2n_sys_print_id()
68 feature_flags |= (mode_val & SYS_LSI_MODE_SEC_EN) ? SYS_RZV2N_FEATURE_SEC : 0; in rzv2n_sys_print_id()
78 if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ) in rzv2n_sys_print_id()
H A Dr9a09g047-sys.c58 u32 prr_val, mode_val; in rzg3e_sys_print_id() local
61 mode_val = readl(sysc_base + SYS_LSI_MODE); in rzg3e_sys_print_id()
73 if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ) in rzg3e_sys_print_id()
H A Dr9a09g057-sys.c66 u32 prr_val, mode_val; in rzv2h_sys_print_id() local
69 mode_val = readl(sysc_base + SYS_LSI_MODE); in rzv2h_sys_print_id()
81 if (FIELD_GET(SYS_LSI_MODE_STAT_BOOTPLLCA55, mode_val) != SYS_LSI_MODE_CA55_1_7GHZ) in rzv2h_sys_print_id()
/linux/drivers/regulator/
H A Drt6160-regulator.c99 unsigned int mode_val; in rt6160_set_mode() local
103 mode_val = RT6160_FPWM_MASK; in rt6160_set_mode()
106 mode_val = 0; in rt6160_set_mode()
113 return regmap_update_bits(regmap, RT6160_REG_CNTL, RT6160_FPWM_MASK, mode_val); in rt6160_set_mode()
H A Drt5759-regulator.c60 unsigned int mode_val; in rt5759_set_mode() local
64 mode_val = 0; in rt5759_set_mode()
67 mode_val = RT5759_FPWM_MASK; in rt5759_set_mode()
74 mode_val); in rt5759_set_mode()
H A Drtq2208-regulator.c133 unsigned int mode_val; in rtq2208_get_mode() local
136 ret = regmap_read(rdev->regmap, rdesc->mode_reg, &mode_val); in rtq2208_get_mode()
140 return (mode_val & rdesc->mode_mask) ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL; in rtq2208_get_mode()
H A Dcpcap-regulator.c98 mode_mask, volt_mask, mode_val, off_val, \ argument
114 .enable_val = (mode_val), \
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6328.c34 unsigned mode_val:1; member
238 .mode_val = 1, \
331 bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6328_pinctrl_set_mux()
H A Dpinctrl-bcm6318.c35 unsigned mode_val:1; member
302 .mode_val = 1, \
417 bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6318_pinctrl_set_mux()
/linux/drivers/media/usb/gspca/
H A Dkinect.c280 uint8_t mode_val; in sd_start_video() local
288 mode_val = 0x03; in sd_start_video()
293 mode_val = 0x01; in sd_start_video()
338 write_register(gspca_dev, 0x05, mode_val); in sd_start_video()
/linux/drivers/hwmon/
H A Dnct7802.c1044 u8 *mode_val) in nct7802_get_channel_config() argument
1067 *mode_val &= ~MODE_LTD_EN; in nct7802_get_channel_config()
1069 *mode_val |= MODE_LTD_EN; in nct7802_get_channel_config()
1077 *mode_val &= ~(MODE_RTD_MASK << MODE_BIT_OFFSET_RTD(reg - 1)); in nct7802_get_channel_config()
1088 *mode_val |= (RTD_MODE_VOLTAGE & MODE_RTD_MASK) in nct7802_get_channel_config()
1121 *mode_val |= (md & MODE_RTD_MASK) << MODE_BIT_OFFSET_RTD(reg - 1); in nct7802_get_channel_config()
1131 u8 mode_mask = MODE_LTD_EN, mode_val = MODE_LTD_EN; in nct7802_configure_channels() local
1137 &mode_val); in nct7802_configure_channels()
1143 return regmap_update_bits(data->regmap, REG_MODE, mode_mask, mode_val); in nct7802_configure_channels()
/linux/drivers/leds/
H A Dleds-lm3530.c86 enum lm3530_mode mode_val; member
150 return mode_map[i].mode_val; in lm3530_get_mode_from_str()
358 if (drvdata->mode == mode_map[i].mode_val) in mode_show()
/linux/sound/soc/codecs/
H A Dwm8998.c110 unsigned int mux, inmode, src_val, mode_val; in wm8998_inmux_put() local
130 mode_val = 1 << ARIZONA_IN1_MODE_SHIFT; in wm8998_inmux_put()
132 mode_val = 0; in wm8998_inmux_put()
139 ARIZONA_IN1_MODE_MASK, mode_val); in wm8998_inmux_put()
H A Dwcd937x.c1223 u32 mode_val; in wcd937x_rx_hph_mode_put() local
1225 mode_val = ucontrol->value.enumerated.item[0]; in wcd937x_rx_hph_mode_put()
1227 if (!mode_val) in wcd937x_rx_hph_mode_put()
1228 mode_val = CLS_AB; in wcd937x_rx_hph_mode_put()
1230 if (mode_val == wcd937x->hph_mode) in wcd937x_rx_hph_mode_put()
1233 switch (mode_val) { in wcd937x_rx_hph_mode_put()
1242 wcd937x->hph_mode = mode_val; in wcd937x_rx_hph_mode_put()
H A Dwcd939x.c1480 u32 mode_val; in wcd939x_rx_hph_mode_put() local
1482 mode_val = ucontrol->value.enumerated.item[0]; in wcd939x_rx_hph_mode_put()
1484 if (mode_val == wcd939x->hph_mode) in wcd939x_rx_hph_mode_put()
1488 switch (mode_val) { in wcd939x_rx_hph_mode_put()
1496 wcd939x->hph_mode = mode_val; in wcd939x_rx_hph_mode_put()
1500 switch (mode_val) { in wcd939x_rx_hph_mode_put()
1510 wcd939x->hph_mode = mode_val; in wcd939x_rx_hph_mode_put()
H A Dwcd9335.c2247 u32 mode_val; in wcd9335_rx_hph_mode_put()
2249 mode_val = ucontrol->value.enumerated.item[0]; in wcd9335_rx_hph_mode_put()
2251 if (mode_val == 0) { in wcd9335_rx_hph_mode_put()
2253 mode_val = CLS_H_HIFI; in wcd9335_rx_hph_mode_put()
2255 wcd->hph_mode = mode_val;
2243 u32 mode_val; wcd9335_rx_hph_mode_put() local
/linux/drivers/clk/qcom/
H A Dclk-alpha-pll.c1068 u32 mode_val, opmode_val; in trion_pll_is_enabled() local
1071 ret = regmap_read(regmap, PLL_MODE(pll), &mode_val); in trion_pll_is_enabled()
1076 return ((opmode_val & PLL_RUN) && (mode_val & PLL_OUTCTRL)); in trion_pll_is_enabled()