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Searched refs:mmVML2_MEM_ECC_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h252 #define mmVML2_MEM_ECC_CNTL macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4.c696 WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0); in gfx_v9_4_query_utc_edc_status()
709 data = RREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL); in gfx_v9_4_query_utc_edc_status()
930 WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0); in gfx_v9_4_reset_ras_error_count()
943 RREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL); in gfx_v9_4_reset_ras_error_count()