Searched refs:mmUVD_RBC_RB_RPTR_ADDR (Results 1 – 17 of 17) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_4_0_d.h | 72 #define mmUVD_RBC_RB_RPTR_ADDR 0x3DAA macro
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| H A D | uvd_4_2_d.h | 75 #define mmUVD_RBC_RB_RPTR_ADDR 0x3daa macro
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| H A D | uvd_3_1_d.h | 77 #define mmUVD_RBC_RB_RPTR_ADDR 0x3daa macro
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| H A D | uvd_5_0_d.h | 81 #define mmUVD_RBC_RB_RPTR_ADDR 0x3daa macro
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| H A D | uvd_6_0_d.h | 97 #define mmUVD_RBC_RB_RPTR_ADDR 0x3daa macro
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| H A D | uvd_7_0_offset.h | 206 #define mmUVD_RBC_RB_RPTR_ADDR … macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 392 #define mmUVD_RBC_RB_RPTR_ADDR … macro
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| H A D | vcn_2_5_offset.h | 787 #define mmUVD_RBC_RB_RPTR_ADDR … macro
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| H A D | vcn_2_0_0_offset.h | 692 #define mmUVD_RBC_RB_RPTR_ADDR … macro
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| H A D | vcn_3_0_0_offset.h | 1171 #define mmUVD_RBC_RB_RPTR_ADDR … macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | uvd_v5_0.c | 434 WREG32(mmUVD_RBC_RB_RPTR_ADDR, (upper_32_bits(ring->gpu_addr) >> 2)); in uvd_v5_0_start()
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| H A D | vcn_v1_0.c | 964 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, in vcn_v1_0_start_spg_mode()
1122 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, in vcn_v1_0_start_dpg_mode()
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| H A D | uvd_v6_0.c | 849 WREG32(mmUVD_RBC_RB_RPTR_ADDR, (upper_32_bits(ring->gpu_addr) >> 2)); in uvd_v6_0_start()
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| H A D | uvd_v7_0.c | 1096 WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR_ADDR, in uvd_v7_0_start()
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| H A D | vcn_v2_0.c | 947 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR_ADDR, in vcn_v2_0_start_dpg_mode()
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| H A D | vcn_v2_5.c | 983 WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR_ADDR, in vcn_v2_5_start_dpg_mode()
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| H A D | vcn_v3_0.c | 1105 WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR_ADDR, in vcn_v3_0_start_dpg_mode()
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