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Searched refs:mmUTCL1_CGTT_CLK_CTRL (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h10209 #define mmUTCL1_CGTT_CLK_CTRL … macro
H A Dgc_10_3_0_offset.h9909 #define mmUTCL1_CGTT_CLK_CTRL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c493 SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CGTT_CLK_CTRL, 0xfeff0fff, 0x40000100),